diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 19:34:42 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 19:34:42 -0400 |
commit | bac9789e535a6353854e19532d1db3d5580cb58c (patch) | |
tree | dca23a91c9a021bc4a9015d33fd0b63f9ff927a1 | |
parent | fb8a85fabdc83cfabfd30f79e6b15135e88d16f9 (diff) | |
parent | a27beb5820d1a52b1e2863a4ae5545a1dd4ab35a (diff) |
Merge branch 'remotes/lorenzo/pci/rcar'
- Use BIT() when appropriate in rcar (Marek Vasut)
- Use u32 to match rcar hardware register widths (Marek Vasut)
- Use BITS_PER_BYTE when appropriate in rcar (Marek Vasut)
- Remove unnecessary casts in rcar (Marek Vasut)
- Fix 64-bit MSI target addresses in rcar (Marek Vasut)
- Check for __get_free_pages() failure in rcar (Kangjie Lu)
- Fix shadowed rcar "irq" variable (Wolfram Sang)
* remotes/lorenzo/pci/rcar:
PCI: rcar: Do not shadow the 'irq' variable
PCI: rcar: Fix a potential NULL pointer dereference
PCI: rcar: Fix 64bit MSI message address handling
PCI: rcar: Clean up debug messages
PCI: rcar: Replace (8 * n) with (BITS_PER_BYTE * n)
PCI: rcar: Replace various variable types with unsigned ones for register values
PCI: rcar: Replace unsigned long with u32/unsigned int in register accessors
PCI: rcar: Clean up remaining macros defining bits
# Conflicts:
# drivers/pci/controller/pcie-rcar.c
-rw-r--r-- | drivers/pci/controller/pcie-rcar.c | 64 |
1 files changed, 34 insertions, 30 deletions
diff --git a/drivers/pci/controller/pcie-rcar.c b/drivers/pci/controller/pcie-rcar.c index 6a4e435bd35f..f6a669a9af41 100644 --- a/drivers/pci/controller/pcie-rcar.c +++ b/drivers/pci/controller/pcie-rcar.c | |||
@@ -47,14 +47,14 @@ | |||
47 | /* Transfer control */ | 47 | /* Transfer control */ |
48 | #define PCIETCTLR 0x02000 | 48 | #define PCIETCTLR 0x02000 |
49 | #define DL_DOWN BIT(3) | 49 | #define DL_DOWN BIT(3) |
50 | #define CFINIT 1 | 50 | #define CFINIT BIT(0) |
51 | #define PCIETSTR 0x02004 | 51 | #define PCIETSTR 0x02004 |
52 | #define DATA_LINK_ACTIVE 1 | 52 | #define DATA_LINK_ACTIVE BIT(0) |
53 | #define PCIEERRFR 0x02020 | 53 | #define PCIEERRFR 0x02020 |
54 | #define UNSUPPORTED_REQUEST BIT(4) | 54 | #define UNSUPPORTED_REQUEST BIT(4) |
55 | #define PCIEMSIFR 0x02044 | 55 | #define PCIEMSIFR 0x02044 |
56 | #define PCIEMSIALR 0x02048 | 56 | #define PCIEMSIALR 0x02048 |
57 | #define MSIFE 1 | 57 | #define MSIFE BIT(0) |
58 | #define PCIEMSIAUR 0x0204c | 58 | #define PCIEMSIAUR 0x0204c |
59 | #define PCIEMSIIER 0x02050 | 59 | #define PCIEMSIIER 0x02050 |
60 | 60 | ||
@@ -154,14 +154,13 @@ struct rcar_pcie { | |||
154 | struct rcar_msi msi; | 154 | struct rcar_msi msi; |
155 | }; | 155 | }; |
156 | 156 | ||
157 | static void rcar_pci_write_reg(struct rcar_pcie *pcie, unsigned long val, | 157 | static void rcar_pci_write_reg(struct rcar_pcie *pcie, u32 val, |
158 | unsigned long reg) | 158 | unsigned int reg) |
159 | { | 159 | { |
160 | writel(val, pcie->base + reg); | 160 | writel(val, pcie->base + reg); |
161 | } | 161 | } |
162 | 162 | ||
163 | static unsigned long rcar_pci_read_reg(struct rcar_pcie *pcie, | 163 | static u32 rcar_pci_read_reg(struct rcar_pcie *pcie, unsigned int reg) |
164 | unsigned long reg) | ||
165 | { | 164 | { |
166 | return readl(pcie->base + reg); | 165 | return readl(pcie->base + reg); |
167 | } | 166 | } |
@@ -173,7 +172,7 @@ enum { | |||
173 | 172 | ||
174 | static void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) | 173 | static void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) |
175 | { | 174 | { |
176 | int shift = 8 * (where & 3); | 175 | unsigned int shift = BITS_PER_BYTE * (where & 3); |
177 | u32 val = rcar_pci_read_reg(pcie, where & ~3); | 176 | u32 val = rcar_pci_read_reg(pcie, where & ~3); |
178 | 177 | ||
179 | val &= ~(mask << shift); | 178 | val &= ~(mask << shift); |
@@ -183,7 +182,7 @@ static void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) | |||
183 | 182 | ||
184 | static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) | 183 | static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) |
185 | { | 184 | { |
186 | int shift = 8 * (where & 3); | 185 | unsigned int shift = BITS_PER_BYTE * (where & 3); |
187 | u32 val = rcar_pci_read_reg(pcie, where & ~3); | 186 | u32 val = rcar_pci_read_reg(pcie, where & ~3); |
188 | 187 | ||
189 | return val >> shift; | 188 | return val >> shift; |
@@ -194,7 +193,7 @@ static int rcar_pcie_config_access(struct rcar_pcie *pcie, | |||
194 | unsigned char access_type, struct pci_bus *bus, | 193 | unsigned char access_type, struct pci_bus *bus, |
195 | unsigned int devfn, int where, u32 *data) | 194 | unsigned int devfn, int where, u32 *data) |
196 | { | 195 | { |
197 | int dev, func, reg, index; | 196 | unsigned int dev, func, reg, index; |
198 | 197 | ||
199 | dev = PCI_SLOT(devfn); | 198 | dev = PCI_SLOT(devfn); |
200 | func = PCI_FUNC(devfn); | 199 | func = PCI_FUNC(devfn); |
@@ -283,12 +282,12 @@ static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn, | |||
283 | } | 282 | } |
284 | 283 | ||
285 | if (size == 1) | 284 | if (size == 1) |
286 | *val = (*val >> (8 * (where & 3))) & 0xff; | 285 | *val = (*val >> (BITS_PER_BYTE * (where & 3))) & 0xff; |
287 | else if (size == 2) | 286 | else if (size == 2) |
288 | *val = (*val >> (8 * (where & 2))) & 0xffff; | 287 | *val = (*val >> (BITS_PER_BYTE * (where & 2))) & 0xffff; |
289 | 288 | ||
290 | dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08lx\n", | 289 | dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", |
291 | bus->number, devfn, where, size, (unsigned long)*val); | 290 | bus->number, devfn, where, size, *val); |
292 | 291 | ||
293 | return ret; | 292 | return ret; |
294 | } | 293 | } |
@@ -298,23 +297,24 @@ static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn, | |||
298 | int where, int size, u32 val) | 297 | int where, int size, u32 val) |
299 | { | 298 | { |
300 | struct rcar_pcie *pcie = bus->sysdata; | 299 | struct rcar_pcie *pcie = bus->sysdata; |
301 | int shift, ret; | 300 | unsigned int shift; |
302 | u32 data; | 301 | u32 data; |
302 | int ret; | ||
303 | 303 | ||
304 | ret = rcar_pcie_config_access(pcie, RCAR_PCI_ACCESS_READ, | 304 | ret = rcar_pcie_config_access(pcie, RCAR_PCI_ACCESS_READ, |
305 | bus, devfn, where, &data); | 305 | bus, devfn, where, &data); |
306 | if (ret != PCIBIOS_SUCCESSFUL) | 306 | if (ret != PCIBIOS_SUCCESSFUL) |
307 | return ret; | 307 | return ret; |
308 | 308 | ||
309 | dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08lx\n", | 309 | dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", |
310 | bus->number, devfn, where, size, (unsigned long)val); | 310 | bus->number, devfn, where, size, val); |
311 | 311 | ||
312 | if (size == 1) { | 312 | if (size == 1) { |
313 | shift = 8 * (where & 3); | 313 | shift = BITS_PER_BYTE * (where & 3); |
314 | data &= ~(0xff << shift); | 314 | data &= ~(0xff << shift); |
315 | data |= ((val & 0xff) << shift); | 315 | data |= ((val & 0xff) << shift); |
316 | } else if (size == 2) { | 316 | } else if (size == 2) { |
317 | shift = 8 * (where & 2); | 317 | shift = BITS_PER_BYTE * (where & 2); |
318 | data &= ~(0xffff << shift); | 318 | data &= ~(0xffff << shift); |
319 | data |= ((val & 0xffff) << shift); | 319 | data |= ((val & 0xffff) << shift); |
320 | } else | 320 | } else |
@@ -509,10 +509,10 @@ static int phy_wait_for_ack(struct rcar_pcie *pcie) | |||
509 | } | 509 | } |
510 | 510 | ||
511 | static void phy_write_reg(struct rcar_pcie *pcie, | 511 | static void phy_write_reg(struct rcar_pcie *pcie, |
512 | unsigned int rate, unsigned int addr, | 512 | unsigned int rate, u32 addr, |
513 | unsigned int lane, unsigned int data) | 513 | unsigned int lane, u32 data) |
514 | { | 514 | { |
515 | unsigned long phyaddr; | 515 | u32 phyaddr; |
516 | 516 | ||
517 | phyaddr = WRITE_CMD | | 517 | phyaddr = WRITE_CMD | |
518 | ((rate & 1) << RATE_POS) | | 518 | ((rate & 1) << RATE_POS) | |
@@ -740,15 +740,15 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *data) | |||
740 | 740 | ||
741 | while (reg) { | 741 | while (reg) { |
742 | unsigned int index = find_first_bit(®, 32); | 742 | unsigned int index = find_first_bit(®, 32); |
743 | unsigned int irq; | 743 | unsigned int msi_irq; |
744 | 744 | ||
745 | /* clear the interrupt */ | 745 | /* clear the interrupt */ |
746 | rcar_pci_write_reg(pcie, 1 << index, PCIEMSIFR); | 746 | rcar_pci_write_reg(pcie, 1 << index, PCIEMSIFR); |
747 | 747 | ||
748 | irq = irq_find_mapping(msi->domain, index); | 748 | msi_irq = irq_find_mapping(msi->domain, index); |
749 | if (irq) { | 749 | if (msi_irq) { |
750 | if (test_bit(index, msi->used)) | 750 | if (test_bit(index, msi->used)) |
751 | generic_handle_irq(irq); | 751 | generic_handle_irq(msi_irq); |
752 | else | 752 | else |
753 | dev_info(dev, "unhandled MSI\n"); | 753 | dev_info(dev, "unhandled MSI\n"); |
754 | } else { | 754 | } else { |
@@ -892,7 +892,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie *pcie) | |||
892 | { | 892 | { |
893 | struct device *dev = pcie->dev; | 893 | struct device *dev = pcie->dev; |
894 | struct rcar_msi *msi = &pcie->msi; | 894 | struct rcar_msi *msi = &pcie->msi; |
895 | unsigned long base; | 895 | phys_addr_t base; |
896 | int err, i; | 896 | int err, i; |
897 | 897 | ||
898 | mutex_init(&msi->lock); | 898 | mutex_init(&msi->lock); |
@@ -931,10 +931,14 @@ static int rcar_pcie_enable_msi(struct rcar_pcie *pcie) | |||
931 | 931 | ||
932 | /* setup MSI data target */ | 932 | /* setup MSI data target */ |
933 | msi->pages = __get_free_pages(GFP_KERNEL, 0); | 933 | msi->pages = __get_free_pages(GFP_KERNEL, 0); |
934 | if (!msi->pages) { | ||
935 | err = -ENOMEM; | ||
936 | goto err; | ||
937 | } | ||
934 | base = virt_to_phys((void *)msi->pages); | 938 | base = virt_to_phys((void *)msi->pages); |
935 | 939 | ||
936 | rcar_pci_write_reg(pcie, base | MSIFE, PCIEMSIALR); | 940 | rcar_pci_write_reg(pcie, lower_32_bits(base) | MSIFE, PCIEMSIALR); |
937 | rcar_pci_write_reg(pcie, 0, PCIEMSIAUR); | 941 | rcar_pci_write_reg(pcie, upper_32_bits(base), PCIEMSIAUR); |
938 | 942 | ||
939 | /* enable all MSI interrupts */ | 943 | /* enable all MSI interrupts */ |
940 | rcar_pci_write_reg(pcie, 0xffffffff, PCIEMSIIER); | 944 | rcar_pci_write_reg(pcie, 0xffffffff, PCIEMSIIER); |
@@ -1120,7 +1124,7 @@ static int rcar_pcie_probe(struct platform_device *pdev) | |||
1120 | { | 1124 | { |
1121 | struct device *dev = &pdev->dev; | 1125 | struct device *dev = &pdev->dev; |
1122 | struct rcar_pcie *pcie; | 1126 | struct rcar_pcie *pcie; |
1123 | unsigned int data; | 1127 | u32 data; |
1124 | int err; | 1128 | int err; |
1125 | int (*phy_init_fn)(struct rcar_pcie *); | 1129 | int (*phy_init_fn)(struct rcar_pcie *); |
1126 | struct pci_host_bridge *bridge; | 1130 | struct pci_host_bridge *bridge; |