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authorRobin Murphy <robin.murphy@arm.com>2016-09-26 11:50:55 -0400
committerRussell King <rmk+kernel@armlinux.org.uk>2016-09-29 11:57:43 -0400
commitba6dea4f7cedb4b1c17e36f4087675d817c2e24b (patch)
tree9bd09872a666fa24a3b698765d15a0d44b495314
parent1a57c286d8ced1e4144c6201a19bbb70827edee6 (diff)
ARM: 8616/1: dt: Respect property size when parsing CPUs
Whilst MPIDR values themselves are less than 32 bits, it is still perfectly valid for a DT to have #address-cells > 1 in the CPUs node, resulting in the "reg" property having leading zero cell(s). In that situation, the big-endian nature of the data conspires with the current behaviour of only reading the first cell to cause the kernel to think all CPUs have ID 0, and become resoundingly unhappy as a consequence. Take the full property length into account when parsing CPUs so as to be correct under any circumstances. Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/kernel/devtree.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 40ecd5f514a2..f676febbb270 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -88,6 +88,8 @@ void __init arm_dt_init_cpu_maps(void)
88 return; 88 return;
89 89
90 for_each_child_of_node(cpus, cpu) { 90 for_each_child_of_node(cpus, cpu) {
91 const __be32 *cell;
92 int prop_bytes;
91 u32 hwid; 93 u32 hwid;
92 94
93 if (of_node_cmp(cpu->type, "cpu")) 95 if (of_node_cmp(cpu->type, "cpu"))
@@ -99,7 +101,8 @@ void __init arm_dt_init_cpu_maps(void)
99 * properties is considered invalid to build the 101 * properties is considered invalid to build the
100 * cpu_logical_map. 102 * cpu_logical_map.
101 */ 103 */
102 if (of_property_read_u32(cpu, "reg", &hwid)) { 104 cell = of_get_property(cpu, "reg", &prop_bytes);
105 if (!cell || prop_bytes < sizeof(*cell)) {
103 pr_debug(" * %s missing reg property\n", 106 pr_debug(" * %s missing reg property\n",
104 cpu->full_name); 107 cpu->full_name);
105 of_node_put(cpu); 108 of_node_put(cpu);
@@ -107,10 +110,15 @@ void __init arm_dt_init_cpu_maps(void)
107 } 110 }
108 111
109 /* 112 /*
110 * 8 MSBs must be set to 0 in the DT since the reg property 113 * Bits n:24 must be set to 0 in the DT since the reg property
111 * defines the MPIDR[23:0]. 114 * defines the MPIDR[23:0].
112 */ 115 */
113 if (hwid & ~MPIDR_HWID_BITMASK) { 116 do {
117 hwid = be32_to_cpu(*cell++);
118 prop_bytes -= sizeof(*cell);
119 } while (!hwid && prop_bytes > 0);
120
121 if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
114 of_node_put(cpu); 122 of_node_put(cpu);
115 return; 123 return;
116 } 124 }