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authorOlof Johansson <olof@lixom.net>2014-03-09 14:33:01 -0400
committerOlof Johansson <olof@lixom.net>2014-03-09 14:33:01 -0400
commitb989e36aaa0c00ad3d88af149b2a6eb1a2f760b5 (patch)
treed3c092d70b963694a5bbb85c32310701be4527f4
parent516561a5ea1e444f831efe97f7f5a6be7fa24b03 (diff)
parent86feafebbec2b510daf36ffbdbe10228ed890b00 (diff)
Merge tag 'exynos-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Samsung exynos clock related DT updates for v3.15 from Kukjim Kim: - use macros instead of hard coded numbers for clock bindings NOTE: this is based on v3.15-next/dt-samsung * tag 'exynos-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: use macros in clock bindings for exynos5440 ARM: dts: use macros in clock bindings for exynos5420 ARM: dts: use macros in clock bindings for exynos5250 ARM: dts: use macros in clock bindings for exynos4
Diffstat
-rw-r--r--Documentation/devicetree/bindings/clock/exynos4-clock.txt259
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5250-clock.txt163
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5420-clock.txt184
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5440-clock.txt45
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi73
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi9
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi34
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi105
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi95
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi33
10 files changed, 207 insertions, 793 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
index a2ac2d9ac71a..f5a5b19ed3b2 100644
--- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
@@ -15,259 +15,12 @@ Required Properties:
15 15
16- #clock-cells: should be 1. 16- #clock-cells: should be 1.
17 17
18The following is the list of clocks generated by the controller. Each clock is 18Each clock is assigned an identifier and client nodes can use this identifier
19assigned an identifier and client nodes use this identifier to specify the 19to specify the clock which they consume.
20clock which they consume. Some of the clocks are available only on a particular
21Exynos4 SoC and this is specified where applicable.
22
23
24 [Core Clocks]
25
26 Clock ID SoC (if specific)
27 -----------------------------------------------
28
29 xxti 1
30 xusbxti 2
31 fin_pll 3
32 fout_apll 4
33 fout_mpll 5
34 fout_epll 6
35 fout_vpll 7
36 sclk_apll 8
37 sclk_mpll 9
38 sclk_epll 10
39 sclk_vpll 11
40 arm_clk 12
41 aclk200 13
42 aclk100 14
43 aclk160 15
44 aclk133 16
45 mout_mpll_user_t 17 Exynos4x12
46 mout_mpll_user_c 18 Exynos4x12
47 mout_core 19
48 mout_apll 20
49
50
51 [Clock Gate for Special Clocks]
52
53 Clock ID SoC (if specific)
54 -----------------------------------------------
55
56 sclk_fimc0 128
57 sclk_fimc1 129
58 sclk_fimc2 130
59 sclk_fimc3 131
60 sclk_cam0 132
61 sclk_cam1 133
62 sclk_csis0 134
63 sclk_csis1 135
64 sclk_hdmi 136
65 sclk_mixer 137
66 sclk_dac 138
67 sclk_pixel 139
68 sclk_fimd0 140
69 sclk_mdnie0 141 Exynos4412
70 sclk_mdnie_pwm0 12 142 Exynos4412
71 sclk_mipi0 143
72 sclk_audio0 144
73 sclk_mmc0 145
74 sclk_mmc1 146
75 sclk_mmc2 147
76 sclk_mmc3 148
77 sclk_mmc4 149
78 sclk_sata 150 Exynos4210
79 sclk_uart0 151
80 sclk_uart1 152
81 sclk_uart2 153
82 sclk_uart3 154
83 sclk_uart4 155
84 sclk_audio1 156
85 sclk_audio2 157
86 sclk_spdif 158
87 sclk_spi0 159
88 sclk_spi1 160
89 sclk_spi2 161
90 sclk_slimbus 162
91 sclk_fimd1 163 Exynos4210
92 sclk_mipi1 164 Exynos4210
93 sclk_pcm1 165
94 sclk_pcm2 166
95 sclk_i2s1 167
96 sclk_i2s2 168
97 sclk_mipihsi 169 Exynos4412
98 sclk_mfc 170
99 sclk_pcm0 171
100 sclk_g3d 172
101 sclk_pwm_isp 173 Exynos4x12
102 sclk_spi0_isp 174 Exynos4x12
103 sclk_spi1_isp 175 Exynos4x12
104 sclk_uart_isp 176 Exynos4x12
105 sclk_fimg2d 177
106
107 [Peripheral Clock Gates]
108
109 Clock ID SoC (if specific)
110 -----------------------------------------------
111
112 fimc0 256
113 fimc1 257
114 fimc2 258
115 fimc3 259
116 csis0 260
117 csis1 261
118 jpeg 262
119 smmu_fimc0 263
120 smmu_fimc1 264
121 smmu_fimc2 265
122 smmu_fimc3 266
123 smmu_jpeg 267
124 vp 268
125 mixer 269
126 tvenc 270 Exynos4210
127 hdmi 271
128 smmu_tv 272
129 mfc 273
130 smmu_mfcl 274
131 smmu_mfcr 275
132 g3d 276
133 g2d 277
134 rotator 278 Exynos4210
135 mdma 279 Exynos4210
136 smmu_g2d 280 Exynos4210
137 smmu_rotator 281 Exynos4210
138 smmu_mdma 282 Exynos4210
139 fimd0 283
140 mie0 284
141 mdnie0 285 Exynos4412
142 dsim0 286
143 smmu_fimd0 287
144 fimd1 288 Exynos4210
145 mie1 289 Exynos4210
146 dsim1 290 Exynos4210
147 smmu_fimd1 291 Exynos4210
148 pdma0 292
149 pdma1 293
150 pcie_phy 294
151 sata_phy 295 Exynos4210
152 tsi 296
153 sdmmc0 297
154 sdmmc1 298
155 sdmmc2 299
156 sdmmc3 300
157 sdmmc4 301
158 sata 302 Exynos4210
159 sromc 303
160 usb_host 304
161 usb_device 305
162 pcie 306
163 onenand 307
164 nfcon 308
165 smmu_pcie 309
166 gps 310
167 smmu_gps 311
168 uart0 312
169 uart1 313
170 uart2 314
171 uart3 315
172 uart4 316
173 i2c0 317
174 i2c1 318
175 i2c2 319
176 i2c3 320
177 i2c4 321
178 i2c5 322
179 i2c6 323
180 i2c7 324
181 i2c_hdmi 325
182 tsadc 326
183 spi0 327
184 spi1 328
185 spi2 329
186 i2s1 330
187 i2s2 331
188 pcm0 332
189 i2s0 333
190 pcm1 334
191 pcm2 335
192 pwm 336
193 slimbus 337
194 spdif 338
195 ac97 339
196 modemif 340
197 chipid 341
198 sysreg 342
199 hdmi_cec 343
200 mct 344
201 wdt 345
202 rtc 346
203 keyif 347
204 audss 348
205 mipi_hsi 349 Exynos4210
206 mdma2 350 Exynos4210
207 pixelasyncm0 351
208 pixelasyncm1 352
209 fimc_lite0 353 Exynos4x12
210 fimc_lite1 354 Exynos4x12
211 ppmuispx 355 Exynos4x12
212 ppmuispmx 356 Exynos4x12
213 fimc_isp 357 Exynos4x12
214 fimc_drc 358 Exynos4x12
215 fimc_fd 359 Exynos4x12
216 mcuisp 360 Exynos4x12
217 gicisp 361 Exynos4x12
218 smmu_isp 362 Exynos4x12
219 smmu_drc 363 Exynos4x12
220 smmu_fd 364 Exynos4x12
221 smmu_lite0 365 Exynos4x12
222 smmu_lite1 366 Exynos4x12
223 mcuctl_isp 367 Exynos4x12
224 mpwm_isp 368 Exynos4x12
225 i2c0_isp 369 Exynos4x12
226 i2c1_isp 370 Exynos4x12
227 mtcadc_isp 371 Exynos4x12
228 pwm_isp 372 Exynos4x12
229 wdt_isp 373 Exynos4x12
230 uart_isp 374 Exynos4x12
231 asyncaxim 375 Exynos4x12
232 smmu_ispcx 376 Exynos4x12
233 spi0_isp 377 Exynos4x12
234 spi1_isp 378 Exynos4x12
235 pwm_isp_sclk 379 Exynos4x12
236 spi0_isp_sclk 380 Exynos4x12
237 spi1_isp_sclk 381 Exynos4x12
238 uart_isp_sclk 382 Exynos4x12
239 tmu_apbif 383
240
241 [Mux Clocks]
242
243 Clock ID SoC (if specific)
244 -----------------------------------------------
245
246 mout_fimc0 384
247 mout_fimc1 385
248 mout_fimc2 386
249 mout_fimc3 387
250 mout_cam0 388
251 mout_cam1 389
252 mout_csis0 390
253 mout_csis1 391
254 mout_g3d0 392
255 mout_g3d1 393
256 mout_g3d 394
257 aclk400_mcuisp 395 Exynos4x12
258
259 [Div Clocks]
260
261 Clock ID SoC (if specific)
262 -----------------------------------------------
263
264 div_isp0 450 Exynos4x12
265 div_isp1 451 Exynos4x12
266 div_mcuisp0 452 Exynos4x12
267 div_mcuisp1 453 Exynos4x12
268 div_aclk200 454 Exynos4x12
269 div_aclk400_mcuisp 455 Exynos4x12
270 20
21All available clocks are defined as preprocessor macros in
22dt-bindings/clock/exynos4.h header and can be used in device
23tree sources.
271 24
272Example 1: An example of a clock controller node is listed below. 25Example 1: An example of a clock controller node is listed below.
273 26
@@ -285,6 +38,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
285 compatible = "samsung,exynos4210-uart"; 38 compatible = "samsung,exynos4210-uart";
286 reg = <0x13820000 0x100>; 39 reg = <0x13820000 0x100>;
287 interrupts = <0 54 0>; 40 interrupts = <0 54 0>;
288 clocks = <&clock 314>, <&clock 153>; 41 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
289 clock-names = "uart", "clk_uart_baud0"; 42 clock-names = "uart", "clk_uart_baud0";
290 }; 43 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 72ce617dea82..536eacd1063f 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -13,163 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19
20
21 [Core Clocks]
22
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32
33 sclk_cam_bayer 128
34 sclk_cam0 129
35 sclk_cam1 130
36 sclk_gscl_wa 131
37 sclk_gscl_wb 132
38 sclk_fimd1 133
39 sclk_mipi1 134
40 sclk_dp 135
41 sclk_hdmi 136
42 sclk_pixel 137
43 sclk_audio0 138
44 sclk_mmc0 139
45 sclk_mmc1 140
46 sclk_mmc2 141
47 sclk_mmc3 142
48 sclk_sata 143
49 sclk_usb3 144
50 sclk_jpeg 145
51 sclk_uart0 146
52 sclk_uart1 147
53 sclk_uart2 148
54 sclk_uart3 149
55 sclk_pwm 150
56 sclk_audio1 151
57 sclk_audio2 152
58 sclk_spdif 153
59 sclk_spi0 154
60 sclk_spi1 155
61 sclk_spi2 156
62 div_i2s1 157
63 div_i2s2 158
64 sclk_hdmiphy 159
65 div_pcm0 160
66
67
68 [Peripheral Clock Gates]
69
70 Clock ID
71 ----------------------------
72
73 gscl0 256
74 gscl1 257
75 gscl2 258
76 gscl3 259
77 gscl_wa 260
78 gscl_wb 261
79 smmu_gscl0 262
80 smmu_gscl1 263
81 smmu_gscl2 264
82 smmu_gscl3 265
83 mfc 266
84 smmu_mfcl 267
85 smmu_mfcr 268
86 rotator 269
87 jpeg 270
88 mdma1 271
89 smmu_rotator 272
90 smmu_jpeg 273
91 smmu_mdma1 274
92 pdma0 275
93 pdma1 276
94 sata 277
95 usbotg 278
96 mipi_hsi 279
97 sdmmc0 280
98 sdmmc1 281
99 sdmmc2 282
100 sdmmc3 283
101 sromc 284
102 usb2 285
103 usb3 286
104 sata_phyctrl 287
105 sata_phyi2c 288
106 uart0 289
107 uart1 290
108 uart2 291
109 uart3 292
110 uart4 293
111 i2c0 294
112 i2c1 295
113 i2c2 296
114 i2c3 297
115 i2c4 298
116 i2c5 299
117 i2c6 300
118 i2c7 301
119 i2c_hdmi 302
120 adc 303
121 spi0 304
122 spi1 305
123 spi2 306
124 i2s1 307
125 i2s2 308
126 pcm1 309
127 pcm2 310
128 pwm 311
129 spdif 312
130 ac97 313
131 hsi2c0 314
132 hsi2c1 315
133 hs12c2 316
134 hs12c3 317
135 chipid 318
136 sysreg 319
137 pmu 320
138 cmu_top 321
139 cmu_core 322
140 cmu_mem 323
141 tzpc0 324
142 tzpc1 325
143 tzpc2 326
144 tzpc3 327
145 tzpc4 328
146 tzpc5 329
147 tzpc6 330
148 tzpc7 331
149 tzpc8 332
150 tzpc9 333
151 hdmi_cec 334
152 mct 335
153 wdt 336
154 rtc 337
155 tmu 338
156 fimd1 339
157 mie1 340
158 dsim0 341
159 dp 342
160 mixer 343
161 hdmi 344
162 g2d 345
163 mdma0 346
164 smmu_mdma0 347
165
166
167 [Clock Muxes]
168
169 Clock ID
170 ----------------------------
171 mout_hdmi 1024
172 18
19All available clocks are defined as preprocessor macros in
20dt-bindings/clock/exynos5250.h header and can be used in device
21tree sources.
173 22
174Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
175 24
@@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
187 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
188 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
189 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
190 clocks = <&clock 314>, <&clock 153>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
191 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
192 }; 41 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
index 458f34789e5d..ca88c97a8562 100644
--- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
@@ -13,184 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19 18
20 19All available clocks are defined as preprocessor macros in
21 [Core Clocks] 20dt-bindings/clock/exynos5420.h header and can be used in device
22 21tree sources.
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32 sclk_uart0 128
33 sclk_uart1 129
34 sclk_uart2 130
35 sclk_uart3 131
36 sclk_mmc0 132
37 sclk_mmc1 133
38 sclk_mmc2 134
39 sclk_spi0 135
40 sclk_spi1 136
41 sclk_spi2 137
42 sclk_i2s1 138
43 sclk_i2s2 139
44 sclk_pcm1 140
45 sclk_pcm2 141
46 sclk_spdif 142
47 sclk_hdmi 143
48 sclk_pixel 144
49 sclk_dp1 145
50 sclk_mipi1 146
51 sclk_fimd1 147
52 sclk_maudio0 148
53 sclk_maupcm0 149
54 sclk_usbd300 150
55 sclk_usbd301 151
56 sclk_usbphy300 152
57 sclk_usbphy301 153
58 sclk_unipro 154
59 sclk_pwm 155
60 sclk_gscl_wa 156
61 sclk_gscl_wb 157
62 sclk_hdmiphy 158
63
64 [Peripheral Clock Gates]
65
66 Clock ID
67 ----------------------------
68
69 aclk66_peric 256
70 uart0 257
71 uart1 258
72 uart2 259
73 uart3 260
74 i2c0 261
75 i2c1 262
76 i2c2 263
77 i2c3 264
78 i2c4 265
79 i2c5 266
80 i2c6 267
81 i2c7 268
82 i2c_hdmi 269
83 tsadc 270
84 spi0 271
85 spi1 272
86 spi2 273
87 keyif 274
88 i2s1 275
89 i2s2 276
90 pcm1 277
91 pcm2 278
92 pwm 279
93 spdif 280
94 i2c8 281
95 i2c9 282
96 i2c10 283
97 aclk66_psgen 300
98 chipid 301
99 sysreg 302
100 tzpc0 303
101 tzpc1 304
102 tzpc2 305
103 tzpc3 306
104 tzpc4 307
105 tzpc5 308
106 tzpc6 309
107 tzpc7 310
108 tzpc8 311
109 tzpc9 312
110 hdmi_cec 313
111 seckey 314
112 mct 315
113 wdt 316
114 rtc 317
115 tmu 318
116 tmu_gpu 319
117 pclk66_gpio 330
118 aclk200_fsys2 350
119 mmc0 351
120 mmc1 352
121 mmc2 353
122 sromc 354
123 ufs 355
124 aclk200_fsys 360
125 tsi 361
126 pdma0 362
127 pdma1 363
128 rtic 364
129 usbh20 365
130 usbd300 366
131 usbd301 377
132 aclk400_mscl 380
133 mscl0 381
134 mscl1 382
135 mscl2 383
136 smmu_mscl0 384
137 smmu_mscl1 385
138 smmu_mscl2 386
139 aclk333 400
140 mfc 401
141 smmu_mfcl 402
142 smmu_mfcr 403
143 aclk200_disp1 410
144 dsim1 411
145 dp1 412
146 hdmi 413
147 aclk300_disp1 420
148 fimd1 421
149 smmu_fimd1 422
150 aclk166 430
151 mixer 431
152 aclk266 440
153 rotator 441
154 mdma1 442
155 smmu_rotator 443
156 smmu_mdma1 444
157 aclk300_jpeg 450
158 jpeg 451
159 jpeg2 452
160 smmu_jpeg 453
161 aclk300_gscl 460
162 smmu_gscl0 461
163 smmu_gscl1 462
164 gscl_wa 463
165 gscl_wb 464
166 gscl0 465
167 gscl1 466
168 clk_3aa 467
169 aclk266_g2d 470
170 sss 471
171 slim_sss 472
172 mdma0 473
173 aclk333_g2d 480
174 g2d 481
175 aclk333_432_gscl 490
176 smmu_3aa 491
177 smmu_fimcl0 492
178 smmu_fimcl1 493
179 smmu_fimcl3 494
180 fimc_lite3 495
181 aclk_g3d 500
182 g3d 501
183 smmu_mixer 502
184
185 Mux ID
186 ----------------------------
187
188 mout_hdmi 640
189
190 Divider ID
191 ----------------------------
192
193 dout_pixel 768
194 22
195Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
196 24
@@ -208,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
208 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
209 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
210 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
211 clocks = <&clock 259>, <&clock 130>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
212 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
213 }; 41 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
index 9955dc9c7d96..5f7005f73058 100644
--- a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
@@ -12,45 +12,12 @@ Required Properties:
12 12
13- #clock-cells: should be 1. 13- #clock-cells: should be 1.
14 14
15The following is the list of clocks generated by the controller. Each clock is 15Each clock is assigned an identifier and client nodes can use this identifier
16assigned an identifier and client nodes use this identifier to specify the 16to specify the clock which they consume.
17clock which they consume. 17
18 18All available clocks are defined as preprocessor macros in
19 19dt-bindings/clock/exynos5440.h header and can be used in device
20 [Core Clocks] 20tree sources.
21
22 Clock ID
23 ----------------------------
24
25 xtal 1
26 arm_clk 2
27
28 [Peripheral Clock Gates]
29
30 Clock ID
31 ----------------------------
32
33 spi_baud 16
34 pb0_250 17
35 pr0_250 18
36 pr1_250 19
37 b_250 20
38 b_125 21
39 b_200 22
40 sata 23
41 usb 24
42 gmac0 25
43 cs250 26
44 pb0_250_o 27
45 pr0_250_o 28
46 pr1_250_o 29
47 b_250_o 30
48 b_125_o 31
49 b_200_o 32
50 sata_o 33
51 usb_o 34
52 gmac0_o 35
53 cs250_o 36
54 21
55Example: An example of a clock controller node is listed below. 22Example: An example of a clock controller node is listed below.
56 23
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 08452e183b57..28b5ec79f339 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -19,6 +19,7 @@
19 * published by the Free Software Foundation. 19 * published by the Free Software Foundation.
20 */ 20 */
21 21
22#include <dt-bindings/clock/exynos4.h>
22#include "skeleton.dtsi" 23#include "skeleton.dtsi"
23 24
24/ { 25/ {
@@ -119,7 +120,7 @@
119 compatible = "samsung,exynos4210-fimc"; 120 compatible = "samsung,exynos4210-fimc";
120 reg = <0x11800000 0x1000>; 121 reg = <0x11800000 0x1000>;
121 interrupts = <0 84 0>; 122 interrupts = <0 84 0>;
122 clocks = <&clock 256>, <&clock 128>; 123 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
123 clock-names = "fimc", "sclk_fimc"; 124 clock-names = "fimc", "sclk_fimc";
124 samsung,power-domain = <&pd_cam>; 125 samsung,power-domain = <&pd_cam>;
125 samsung,sysreg = <&sys_reg>; 126 samsung,sysreg = <&sys_reg>;
@@ -130,7 +131,7 @@
130 compatible = "samsung,exynos4210-fimc"; 131 compatible = "samsung,exynos4210-fimc";
131 reg = <0x11810000 0x1000>; 132 reg = <0x11810000 0x1000>;
132 interrupts = <0 85 0>; 133 interrupts = <0 85 0>;
133 clocks = <&clock 257>, <&clock 129>; 134 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
134 clock-names = "fimc", "sclk_fimc"; 135 clock-names = "fimc", "sclk_fimc";
135 samsung,power-domain = <&pd_cam>; 136 samsung,power-domain = <&pd_cam>;
136 samsung,sysreg = <&sys_reg>; 137 samsung,sysreg = <&sys_reg>;
@@ -141,7 +142,7 @@
141 compatible = "samsung,exynos4210-fimc"; 142 compatible = "samsung,exynos4210-fimc";
142 reg = <0x11820000 0x1000>; 143 reg = <0x11820000 0x1000>;
143 interrupts = <0 86 0>; 144 interrupts = <0 86 0>;
144 clocks = <&clock 258>, <&clock 130>; 145 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
145 clock-names = "fimc", "sclk_fimc"; 146 clock-names = "fimc", "sclk_fimc";
146 samsung,power-domain = <&pd_cam>; 147 samsung,power-domain = <&pd_cam>;
147 samsung,sysreg = <&sys_reg>; 148 samsung,sysreg = <&sys_reg>;
@@ -152,7 +153,7 @@
152 compatible = "samsung,exynos4210-fimc"; 153 compatible = "samsung,exynos4210-fimc";
153 reg = <0x11830000 0x1000>; 154 reg = <0x11830000 0x1000>;
154 interrupts = <0 87 0>; 155 interrupts = <0 87 0>;
155 clocks = <&clock 259>, <&clock 131>; 156 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
156 clock-names = "fimc", "sclk_fimc"; 157 clock-names = "fimc", "sclk_fimc";
157 samsung,power-domain = <&pd_cam>; 158 samsung,power-domain = <&pd_cam>;
158 samsung,sysreg = <&sys_reg>; 159 samsung,sysreg = <&sys_reg>;
@@ -163,7 +164,7 @@
163 compatible = "samsung,exynos4210-csis"; 164 compatible = "samsung,exynos4210-csis";
164 reg = <0x11880000 0x4000>; 165 reg = <0x11880000 0x4000>;
165 interrupts = <0 78 0>; 166 interrupts = <0 78 0>;
166 clocks = <&clock 260>, <&clock 134>; 167 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
167 clock-names = "csis", "sclk_csis"; 168 clock-names = "csis", "sclk_csis";
168 bus-width = <4>; 169 bus-width = <4>;
169 samsung,power-domain = <&pd_cam>; 170 samsung,power-domain = <&pd_cam>;
@@ -178,7 +179,7 @@
178 compatible = "samsung,exynos4210-csis"; 179 compatible = "samsung,exynos4210-csis";
179 reg = <0x11890000 0x4000>; 180 reg = <0x11890000 0x4000>;
180 interrupts = <0 80 0>; 181 interrupts = <0 80 0>;
181 clocks = <&clock 261>, <&clock 135>; 182 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
182 clock-names = "csis", "sclk_csis"; 183 clock-names = "csis", "sclk_csis";
183 bus-width = <2>; 184 bus-width = <2>;
184 samsung,power-domain = <&pd_cam>; 185 samsung,power-domain = <&pd_cam>;
@@ -194,7 +195,7 @@
194 compatible = "samsung,s3c2410-wdt"; 195 compatible = "samsung,s3c2410-wdt";
195 reg = <0x10060000 0x100>; 196 reg = <0x10060000 0x100>;
196 interrupts = <0 43 0>; 197 interrupts = <0 43 0>;
197 clocks = <&clock 345>; 198 clocks = <&clock CLK_WDT>;
198 clock-names = "watchdog"; 199 clock-names = "watchdog";
199 status = "disabled"; 200 status = "disabled";
200 }; 201 };
@@ -203,7 +204,7 @@
203 compatible = "samsung,s3c6410-rtc"; 204 compatible = "samsung,s3c6410-rtc";
204 reg = <0x10070000 0x100>; 205 reg = <0x10070000 0x100>;
205 interrupts = <0 44 0>, <0 45 0>; 206 interrupts = <0 44 0>, <0 45 0>;
206 clocks = <&clock 346>; 207 clocks = <&clock CLK_RTC>;
207 clock-names = "rtc"; 208 clock-names = "rtc";
208 status = "disabled"; 209 status = "disabled";
209 }; 210 };
@@ -212,7 +213,7 @@
212 compatible = "samsung,s5pv210-keypad"; 213 compatible = "samsung,s5pv210-keypad";
213 reg = <0x100A0000 0x100>; 214 reg = <0x100A0000 0x100>;
214 interrupts = <0 109 0>; 215 interrupts = <0 109 0>;
215 clocks = <&clock 347>; 216 clocks = <&clock CLK_KEYIF>;
216 clock-names = "keypad"; 217 clock-names = "keypad";
217 status = "disabled"; 218 status = "disabled";
218 }; 219 };
@@ -221,7 +222,7 @@
221 compatible = "samsung,exynos4210-sdhci"; 222 compatible = "samsung,exynos4210-sdhci";
222 reg = <0x12510000 0x100>; 223 reg = <0x12510000 0x100>;
223 interrupts = <0 73 0>; 224 interrupts = <0 73 0>;
224 clocks = <&clock 297>, <&clock 145>; 225 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
225 clock-names = "hsmmc", "mmc_busclk.2"; 226 clock-names = "hsmmc", "mmc_busclk.2";
226 status = "disabled"; 227 status = "disabled";
227 }; 228 };
@@ -230,7 +231,7 @@
230 compatible = "samsung,exynos4210-sdhci"; 231 compatible = "samsung,exynos4210-sdhci";
231 reg = <0x12520000 0x100>; 232 reg = <0x12520000 0x100>;
232 interrupts = <0 74 0>; 233 interrupts = <0 74 0>;
233 clocks = <&clock 298>, <&clock 146>; 234 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
234 clock-names = "hsmmc", "mmc_busclk.2"; 235 clock-names = "hsmmc", "mmc_busclk.2";
235 status = "disabled"; 236 status = "disabled";
236 }; 237 };
@@ -239,7 +240,7 @@
239 compatible = "samsung,exynos4210-sdhci"; 240 compatible = "samsung,exynos4210-sdhci";
240 reg = <0x12530000 0x100>; 241 reg = <0x12530000 0x100>;
241 interrupts = <0 75 0>; 242 interrupts = <0 75 0>;
242 clocks = <&clock 299>, <&clock 147>; 243 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
243 clock-names = "hsmmc", "mmc_busclk.2"; 244 clock-names = "hsmmc", "mmc_busclk.2";
244 status = "disabled"; 245 status = "disabled";
245 }; 246 };
@@ -248,7 +249,7 @@
248 compatible = "samsung,exynos4210-sdhci"; 249 compatible = "samsung,exynos4210-sdhci";
249 reg = <0x12540000 0x100>; 250 reg = <0x12540000 0x100>;
250 interrupts = <0 76 0>; 251 interrupts = <0 76 0>;
251 clocks = <&clock 300>, <&clock 148>; 252 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
252 clock-names = "hsmmc", "mmc_busclk.2"; 253 clock-names = "hsmmc", "mmc_busclk.2";
253 status = "disabled"; 254 status = "disabled";
254 }; 255 };
@@ -257,7 +258,7 @@
257 compatible = "samsung,exynos4210-ehci"; 258 compatible = "samsung,exynos4210-ehci";
258 reg = <0x12580000 0x100>; 259 reg = <0x12580000 0x100>;
259 interrupts = <0 70 0>; 260 interrupts = <0 70 0>;
260 clocks = <&clock 304>; 261 clocks = <&clock CLK_USB_HOST>;
261 clock-names = "usbhost"; 262 clock-names = "usbhost";
262 status = "disabled"; 263 status = "disabled";
263 }; 264 };
@@ -266,7 +267,7 @@
266 compatible = "samsung,exynos4210-ohci"; 267 compatible = "samsung,exynos4210-ohci";
267 reg = <0x12590000 0x100>; 268 reg = <0x12590000 0x100>;
268 interrupts = <0 70 0>; 269 interrupts = <0 70 0>;
269 clocks = <&clock 304>; 270 clocks = <&clock CLK_USB_HOST>;
270 clock-names = "usbhost"; 271 clock-names = "usbhost";
271 status = "disabled"; 272 status = "disabled";
272 }; 273 };
@@ -276,7 +277,7 @@
276 reg = <0x13400000 0x10000>; 277 reg = <0x13400000 0x10000>;
277 interrupts = <0 94 0>; 278 interrupts = <0 94 0>;
278 samsung,power-domain = <&pd_mfc>; 279 samsung,power-domain = <&pd_mfc>;
279 clocks = <&clock 273>; 280 clocks = <&clock CLK_MFC>;
280 clock-names = "mfc"; 281 clock-names = "mfc";
281 status = "disabled"; 282 status = "disabled";
282 }; 283 };
@@ -285,7 +286,7 @@
285 compatible = "samsung,exynos4210-uart"; 286 compatible = "samsung,exynos4210-uart";
286 reg = <0x13800000 0x100>; 287 reg = <0x13800000 0x100>;
287 interrupts = <0 52 0>; 288 interrupts = <0 52 0>;
288 clocks = <&clock 312>, <&clock 151>; 289 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
289 clock-names = "uart", "clk_uart_baud0"; 290 clock-names = "uart", "clk_uart_baud0";
290 status = "disabled"; 291 status = "disabled";
291 }; 292 };
@@ -294,7 +295,7 @@
294 compatible = "samsung,exynos4210-uart"; 295 compatible = "samsung,exynos4210-uart";
295 reg = <0x13810000 0x100>; 296 reg = <0x13810000 0x100>;
296 interrupts = <0 53 0>; 297 interrupts = <0 53 0>;
297 clocks = <&clock 313>, <&clock 152>; 298 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
298 clock-names = "uart", "clk_uart_baud0"; 299 clock-names = "uart", "clk_uart_baud0";
299 status = "disabled"; 300 status = "disabled";
300 }; 301 };
@@ -303,7 +304,7 @@
303 compatible = "samsung,exynos4210-uart"; 304 compatible = "samsung,exynos4210-uart";
304 reg = <0x13820000 0x100>; 305 reg = <0x13820000 0x100>;
305 interrupts = <0 54 0>; 306 interrupts = <0 54 0>;
306 clocks = <&clock 314>, <&clock 153>; 307 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
307 clock-names = "uart", "clk_uart_baud0"; 308 clock-names = "uart", "clk_uart_baud0";
308 status = "disabled"; 309 status = "disabled";
309 }; 310 };
@@ -312,7 +313,7 @@
312 compatible = "samsung,exynos4210-uart"; 313 compatible = "samsung,exynos4210-uart";
313 reg = <0x13830000 0x100>; 314 reg = <0x13830000 0x100>;
314 interrupts = <0 55 0>; 315 interrupts = <0 55 0>;
315 clocks = <&clock 315>, <&clock 154>; 316 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
316 clock-names = "uart", "clk_uart_baud0"; 317 clock-names = "uart", "clk_uart_baud0";
317 status = "disabled"; 318 status = "disabled";
318 }; 319 };
@@ -323,7 +324,7 @@
323 compatible = "samsung,s3c2440-i2c"; 324 compatible = "samsung,s3c2440-i2c";
324 reg = <0x13860000 0x100>; 325 reg = <0x13860000 0x100>;
325 interrupts = <0 58 0>; 326 interrupts = <0 58 0>;
326 clocks = <&clock 317>; 327 clocks = <&clock CLK_I2C0>;
327 clock-names = "i2c"; 328 clock-names = "i2c";
328 pinctrl-names = "default"; 329 pinctrl-names = "default";
329 pinctrl-0 = <&i2c0_bus>; 330 pinctrl-0 = <&i2c0_bus>;
@@ -336,7 +337,7 @@
336 compatible = "samsung,s3c2440-i2c"; 337 compatible = "samsung,s3c2440-i2c";
337 reg = <0x13870000 0x100>; 338 reg = <0x13870000 0x100>;
338 interrupts = <0 59 0>; 339 interrupts = <0 59 0>;
339 clocks = <&clock 318>; 340 clocks = <&clock CLK_I2C1>;
340 clock-names = "i2c"; 341 clock-names = "i2c";
341 pinctrl-names = "default"; 342 pinctrl-names = "default";
342 pinctrl-0 = <&i2c1_bus>; 343 pinctrl-0 = <&i2c1_bus>;
@@ -349,7 +350,7 @@
349 compatible = "samsung,s3c2440-i2c"; 350 compatible = "samsung,s3c2440-i2c";
350 reg = <0x13880000 0x100>; 351 reg = <0x13880000 0x100>;
351 interrupts = <0 60 0>; 352 interrupts = <0 60 0>;
352 clocks = <&clock 319>; 353 clocks = <&clock CLK_I2C2>;
353 clock-names = "i2c"; 354 clock-names = "i2c";
354 status = "disabled"; 355 status = "disabled";
355 }; 356 };
@@ -360,7 +361,7 @@
360 compatible = "samsung,s3c2440-i2c"; 361 compatible = "samsung,s3c2440-i2c";
361 reg = <0x13890000 0x100>; 362 reg = <0x13890000 0x100>;
362 interrupts = <0 61 0>; 363 interrupts = <0 61 0>;
363 clocks = <&clock 320>; 364 clocks = <&clock CLK_I2C3>;
364 clock-names = "i2c"; 365 clock-names = "i2c";
365 status = "disabled"; 366 status = "disabled";
366 }; 367 };
@@ -371,7 +372,7 @@
371 compatible = "samsung,s3c2440-i2c"; 372 compatible = "samsung,s3c2440-i2c";
372 reg = <0x138A0000 0x100>; 373 reg = <0x138A0000 0x100>;
373 interrupts = <0 62 0>; 374 interrupts = <0 62 0>;
374 clocks = <&clock 321>; 375 clocks = <&clock CLK_I2C4>;
375 clock-names = "i2c"; 376 clock-names = "i2c";
376 status = "disabled"; 377 status = "disabled";
377 }; 378 };
@@ -382,7 +383,7 @@
382 compatible = "samsung,s3c2440-i2c"; 383 compatible = "samsung,s3c2440-i2c";
383 reg = <0x138B0000 0x100>; 384 reg = <0x138B0000 0x100>;
384 interrupts = <0 63 0>; 385 interrupts = <0 63 0>;
385 clocks = <&clock 322>; 386 clocks = <&clock CLK_I2C5>;
386 clock-names = "i2c"; 387 clock-names = "i2c";
387 status = "disabled"; 388 status = "disabled";
388 }; 389 };
@@ -393,7 +394,7 @@
393 compatible = "samsung,s3c2440-i2c"; 394 compatible = "samsung,s3c2440-i2c";
394 reg = <0x138C0000 0x100>; 395 reg = <0x138C0000 0x100>;
395 interrupts = <0 64 0>; 396 interrupts = <0 64 0>;
396 clocks = <&clock 323>; 397 clocks = <&clock CLK_I2C6>;
397 clock-names = "i2c"; 398 clock-names = "i2c";
398 status = "disabled"; 399 status = "disabled";
399 }; 400 };
@@ -404,7 +405,7 @@
404 compatible = "samsung,s3c2440-i2c"; 405 compatible = "samsung,s3c2440-i2c";
405 reg = <0x138D0000 0x100>; 406 reg = <0x138D0000 0x100>;
406 interrupts = <0 65 0>; 407 interrupts = <0 65 0>;
407 clocks = <&clock 324>; 408 clocks = <&clock CLK_I2C7>;
408 clock-names = "i2c"; 409 clock-names = "i2c";
409 status = "disabled"; 410 status = "disabled";
410 }; 411 };
@@ -417,7 +418,7 @@
417 dma-names = "tx", "rx"; 418 dma-names = "tx", "rx";
418 #address-cells = <1>; 419 #address-cells = <1>;
419 #size-cells = <0>; 420 #size-cells = <0>;
420 clocks = <&clock 327>, <&clock 159>; 421 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
421 clock-names = "spi", "spi_busclk0"; 422 clock-names = "spi", "spi_busclk0";
422 pinctrl-names = "default"; 423 pinctrl-names = "default";
423 pinctrl-0 = <&spi0_bus>; 424 pinctrl-0 = <&spi0_bus>;
@@ -432,7 +433,7 @@
432 dma-names = "tx", "rx"; 433 dma-names = "tx", "rx";
433 #address-cells = <1>; 434 #address-cells = <1>;
434 #size-cells = <0>; 435 #size-cells = <0>;
435 clocks = <&clock 328>, <&clock 160>; 436 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
436 clock-names = "spi", "spi_busclk0"; 437 clock-names = "spi", "spi_busclk0";
437 pinctrl-names = "default"; 438 pinctrl-names = "default";
438 pinctrl-0 = <&spi1_bus>; 439 pinctrl-0 = <&spi1_bus>;
@@ -447,7 +448,7 @@
447 dma-names = "tx", "rx"; 448 dma-names = "tx", "rx";
448 #address-cells = <1>; 449 #address-cells = <1>;
449 #size-cells = <0>; 450 #size-cells = <0>;
450 clocks = <&clock 329>, <&clock 161>; 451 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
451 clock-names = "spi", "spi_busclk0"; 452 clock-names = "spi", "spi_busclk0";
452 pinctrl-names = "default"; 453 pinctrl-names = "default";
453 pinctrl-0 = <&spi2_bus>; 454 pinctrl-0 = <&spi2_bus>;
@@ -458,7 +459,7 @@
458 compatible = "samsung,exynos4210-pwm"; 459 compatible = "samsung,exynos4210-pwm";
459 reg = <0x139D0000 0x1000>; 460 reg = <0x139D0000 0x1000>;
460 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 461 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
461 clocks = <&clock 336>; 462 clocks = <&clock CLK_PWM>;
462 clock-names = "timers"; 463 clock-names = "timers";
463 #pwm-cells = <2>; 464 #pwm-cells = <2>;
464 status = "disabled"; 465 status = "disabled";
@@ -475,7 +476,7 @@
475 compatible = "arm,pl330", "arm,primecell"; 476 compatible = "arm,pl330", "arm,primecell";
476 reg = <0x12680000 0x1000>; 477 reg = <0x12680000 0x1000>;
477 interrupts = <0 35 0>; 478 interrupts = <0 35 0>;
478 clocks = <&clock 292>; 479 clocks = <&clock CLK_PDMA0>;
479 clock-names = "apb_pclk"; 480 clock-names = "apb_pclk";
480 #dma-cells = <1>; 481 #dma-cells = <1>;
481 #dma-channels = <8>; 482 #dma-channels = <8>;
@@ -486,7 +487,7 @@
486 compatible = "arm,pl330", "arm,primecell"; 487 compatible = "arm,pl330", "arm,primecell";
487 reg = <0x12690000 0x1000>; 488 reg = <0x12690000 0x1000>;
488 interrupts = <0 36 0>; 489 interrupts = <0 36 0>;
489 clocks = <&clock 293>; 490 clocks = <&clock CLK_PDMA1>;
490 clock-names = "apb_pclk"; 491 clock-names = "apb_pclk";
491 #dma-cells = <1>; 492 #dma-cells = <1>;
492 #dma-channels = <8>; 493 #dma-channels = <8>;
@@ -497,7 +498,7 @@
497 compatible = "arm,pl330", "arm,primecell"; 498 compatible = "arm,pl330", "arm,primecell";
498 reg = <0x12850000 0x1000>; 499 reg = <0x12850000 0x1000>;
499 interrupts = <0 34 0>; 500 interrupts = <0 34 0>;
500 clocks = <&clock 279>; 501 clocks = <&clock CLK_MDMA>;
501 clock-names = "apb_pclk"; 502 clock-names = "apb_pclk";
502 #dma-cells = <1>; 503 #dma-cells = <1>;
503 #dma-channels = <8>; 504 #dma-channels = <8>;
@@ -511,7 +512,7 @@
511 reg = <0x11c00000 0x20000>; 512 reg = <0x11c00000 0x20000>;
512 interrupt-names = "fifo", "vsync", "lcd_sys"; 513 interrupt-names = "fifo", "vsync", "lcd_sys";
513 interrupts = <11 0>, <11 1>, <11 2>; 514 interrupts = <11 0>, <11 1>, <11 2>;
514 clocks = <&clock 140>, <&clock 283>; 515 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
515 clock-names = "sclk_fimd", "fimd"; 516 clock-names = "sclk_fimd", "fimd";
516 samsung,power-domain = <&pd_lcd0>; 517 samsung,power-domain = <&pd_lcd0>;
517 status = "disabled"; 518 status = "disabled";
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 48ecd7a755ab..cb0e768dc6d4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -53,7 +53,7 @@
53 reg = <0x10050000 0x800>; 53 reg = <0x10050000 0x800>;
54 interrupt-parent = <&mct_map>; 54 interrupt-parent = <&mct_map>;
55 interrupts = <0>, <1>, <2>, <3>, <4>, <5>; 55 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
56 clocks = <&clock 3>, <&clock 344>; 56 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
57 clock-names = "fin_pll", "mct"; 57 clock-names = "fin_pll", "mct";
58 58
59 mct_map: mct-map { 59 mct_map: mct-map {
@@ -109,7 +109,7 @@
109 interrupt-parent = <&combiner>; 109 interrupt-parent = <&combiner>;
110 reg = <0x100C0000 0x100>; 110 reg = <0x100C0000 0x100>;
111 interrupts = <2 4>; 111 interrupts = <2 4>;
112 clocks = <&clock 383>; 112 clocks = <&clock CLK_TMU_APBIF>;
113 clock-names = "tmu_apbif"; 113 clock-names = "tmu_apbif";
114 status = "disabled"; 114 status = "disabled";
115 }; 115 };
@@ -118,13 +118,14 @@
118 compatible = "samsung,s5pv210-g2d"; 118 compatible = "samsung,s5pv210-g2d";
119 reg = <0x12800000 0x1000>; 119 reg = <0x12800000 0x1000>;
120 interrupts = <0 89 0>; 120 interrupts = <0 89 0>;
121 clocks = <&clock 177>, <&clock 277>; 121 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
122 clock-names = "sclk_fimg2d", "fimg2d"; 122 clock-names = "sclk_fimg2d", "fimg2d";
123 status = "disabled"; 123 status = "disabled";
124 }; 124 };
125 125
126 camera { 126 camera {
127 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; 127 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
128 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
128 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; 129 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
129 130
130 fimc_0: fimc@11800000 { 131 fimc_0: fimc@11800000 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 5c412aa14738..e0eb6bb64c34 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -47,7 +47,7 @@
47 reg = <0x10050000 0x800>; 47 reg = <0x10050000 0x800>;
48 interrupt-parent = <&mct_map>; 48 interrupt-parent = <&mct_map>;
49 interrupts = <0>, <1>, <2>, <3>, <4>; 49 interrupts = <0>, <1>, <2>, <3>, <4>;
50 clocks = <&clock 3>, <&clock 344>; 50 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
51 clock-names = "fin_pll", "mct"; 51 clock-names = "fin_pll", "mct";
52 52
53 mct_map: mct-map { 53 mct_map: mct-map {
@@ -97,13 +97,14 @@
97 compatible = "samsung,exynos4212-g2d"; 97 compatible = "samsung,exynos4212-g2d";
98 reg = <0x10800000 0x1000>; 98 reg = <0x10800000 0x1000>;
99 interrupts = <0 89 0>; 99 interrupts = <0 89 0>;
100 clocks = <&clock 177>, <&clock 277>; 100 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
101 clock-names = "sclk_fimg2d", "fimg2d"; 101 clock-names = "sclk_fimg2d", "fimg2d";
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104 104
105 camera { 105 camera {
106 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; 106 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
107 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
107 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; 108 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
108 109
109 fimc_0: fimc@11800000 { 110 fimc_0: fimc@11800000 {
@@ -145,7 +146,7 @@
145 reg = <0x12390000 0x1000>; 146 reg = <0x12390000 0x1000>;
146 interrupts = <0 105 0>; 147 interrupts = <0 105 0>;
147 samsung,power-domain = <&pd_isp>; 148 samsung,power-domain = <&pd_isp>;
148 clocks = <&clock 353>; 149 clocks = <&clock CLK_FIMC_LITE0>;
149 clock-names = "flite"; 150 clock-names = "flite";
150 status = "disabled"; 151 status = "disabled";
151 }; 152 };
@@ -155,7 +156,7 @@
155 reg = <0x123A0000 0x1000>; 156 reg = <0x123A0000 0x1000>;
156 interrupts = <0 106 0>; 157 interrupts = <0 106 0>;
157 samsung,power-domain = <&pd_isp>; 158 samsung,power-domain = <&pd_isp>;
158 clocks = <&clock 354>; 159 clocks = <&clock CLK_FIMC_LITE1>;
159 clock-names = "flite"; 160 clock-names = "flite";
160 status = "disabled"; 161 status = "disabled";
161 }; 162 };
@@ -165,12 +166,19 @@
165 reg = <0x12000000 0x260000>; 166 reg = <0x12000000 0x260000>;
166 interrupts = <0 90 0>, <0 95 0>; 167 interrupts = <0 90 0>, <0 95 0>;
167 samsung,power-domain = <&pd_isp>; 168 samsung,power-domain = <&pd_isp>;
168 clocks = <&clock 353>, <&clock 354>, <&clock 355>, 169 clocks = <&clock CLK_FIMC_LITE0>,
169 <&clock 356>, <&clock 17>, <&clock 357>, 170 <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
170 <&clock 358>, <&clock 359>, <&clock 360>, 171 <&clock CLK_PPMUISPMX>,
171 <&clock 450>,<&clock 451>, <&clock 452>, 172 <&clock CLK_MOUT_MPLL_USER_T>,
172 <&clock 453>, <&clock 176>, <&clock 13>, 173 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
173 <&clock 454>, <&clock 395>, <&clock 455>; 174 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
175 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>,
176 <&clock CLK_DIV_MCUISP0>,
177 <&clock CLK_DIV_MCUISP1>,
178 <&clock CLK_SCLK_UART_ISP>,
179 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
180 <&clock CLK_ACLK400_MCUISP>,
181 <&clock CLK_DIV_ACLK400_MCUISP>;
174 clock-names = "lite0", "lite1", "ppmuispx", 182 clock-names = "lite0", "lite1", "ppmuispx",
175 "ppmuispmx", "mpll", "isp", 183 "ppmuispmx", "mpll", "isp",
176 "drc", "fd", "mcuisp", 184 "drc", "fd", "mcuisp",
@@ -190,7 +198,7 @@
190 i2c1_isp: i2c-isp@12140000 { 198 i2c1_isp: i2c-isp@12140000 {
191 compatible = "samsung,exynos4212-i2c-isp"; 199 compatible = "samsung,exynos4212-i2c-isp";
192 reg = <0x12140000 0x100>; 200 reg = <0x12140000 0x100>;
193 clocks = <&clock 370>; 201 clocks = <&clock CLK_I2C1_ISP>;
194 clock-names = "i2c_isp"; 202 clock-names = "i2c_isp";
195 #address-cells = <1>; 203 #address-cells = <1>;
196 #size-cells = <0>; 204 #size-cells = <0>;
@@ -205,7 +213,7 @@
205 #address-cells = <1>; 213 #address-cells = <1>;
206 #size-cells = <0>; 214 #size-cells = <0>;
207 fifo-depth = <0x80>; 215 fifo-depth = <0x80>;
208 clocks = <&clock 301>, <&clock 149>; 216 clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
209 clock-names = "biu", "ciu"; 217 clock-names = "biu", "ciu";
210 status = "disabled"; 218 status = "disabled";
211 }; 219 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 8f6300fb2315..987cfbe9634b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,6 +17,7 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18*/ 18*/
19 19
20#include <dt-bindings/clock/exynos5250.h>
20#include "exynos5.dtsi" 21#include "exynos5.dtsi"
21#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
22 23
@@ -90,7 +91,8 @@
90 compatible = "samsung,exynos5250-audss-clock"; 91 compatible = "samsung,exynos5250-audss-clock";
91 reg = <0x03810000 0x0C>; 92 reg = <0x03810000 0x0C>;
92 #clock-cells = <1>; 93 #clock-cells = <1>;
93 clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>; 94 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
95 <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
94 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 96 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
95 }; 97 };
96 98
@@ -115,7 +117,7 @@
115 interrupt-parent = <&mct_map>; 117 interrupt-parent = <&mct_map>;
116 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 118 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
117 <4 0>, <5 0>; 119 <4 0>, <5 0>;
118 clocks = <&clock 1>, <&clock 335>; 120 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
119 clock-names = "fin_pll", "mct"; 121 clock-names = "fin_pll", "mct";
120 122
121 mct_map: mct-map { 123 mct_map: mct-map {
@@ -176,7 +178,7 @@
176 compatible = "samsung,exynos5250-wdt"; 178 compatible = "samsung,exynos5250-wdt";
177 reg = <0x101D0000 0x100>; 179 reg = <0x101D0000 0x100>;
178 interrupts = <0 42 0>; 180 interrupts = <0 42 0>;
179 clocks = <&clock 336>; 181 clocks = <&clock CLK_WDT>;
180 clock-names = "watchdog"; 182 clock-names = "watchdog";
181 samsung,syscon-phandle = <&pmu_system_controller>; 183 samsung,syscon-phandle = <&pmu_system_controller>;
182 }; 184 };
@@ -185,7 +187,7 @@
185 compatible = "samsung,exynos5250-g2d"; 187 compatible = "samsung,exynos5250-g2d";
186 reg = <0x10850000 0x1000>; 188 reg = <0x10850000 0x1000>;
187 interrupts = <0 91 0>; 189 interrupts = <0 91 0>;
188 clocks = <&clock 345>; 190 clocks = <&clock CLK_G2D>;
189 clock-names = "fimg2d"; 191 clock-names = "fimg2d";
190 }; 192 };
191 193
@@ -194,12 +196,12 @@
194 reg = <0x11000000 0x10000>; 196 reg = <0x11000000 0x10000>;
195 interrupts = <0 96 0>; 197 interrupts = <0 96 0>;
196 samsung,power-domain = <&pd_mfc>; 198 samsung,power-domain = <&pd_mfc>;
197 clocks = <&clock 266>; 199 clocks = <&clock CLK_MFC>;
198 clock-names = "mfc"; 200 clock-names = "mfc";
199 }; 201 };
200 202
201 rtc@101E0000 { 203 rtc@101E0000 {
202 clocks = <&clock 337>; 204 clocks = <&clock CLK_RTC>;
203 clock-names = "rtc"; 205 clock-names = "rtc";
204 status = "disabled"; 206 status = "disabled";
205 }; 207 };
@@ -208,27 +210,27 @@
208 compatible = "samsung,exynos5250-tmu"; 210 compatible = "samsung,exynos5250-tmu";
209 reg = <0x10060000 0x100>; 211 reg = <0x10060000 0x100>;
210 interrupts = <0 65 0>; 212 interrupts = <0 65 0>;
211 clocks = <&clock 338>; 213 clocks = <&clock CLK_TMU>;
212 clock-names = "tmu_apbif"; 214 clock-names = "tmu_apbif";
213 }; 215 };
214 216
215 serial@12C00000 { 217 serial@12C00000 {
216 clocks = <&clock 289>, <&clock 146>; 218 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
217 clock-names = "uart", "clk_uart_baud0"; 219 clock-names = "uart", "clk_uart_baud0";
218 }; 220 };
219 221
220 serial@12C10000 { 222 serial@12C10000 {
221 clocks = <&clock 290>, <&clock 147>; 223 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
222 clock-names = "uart", "clk_uart_baud0"; 224 clock-names = "uart", "clk_uart_baud0";
223 }; 225 };
224 226
225 serial@12C20000 { 227 serial@12C20000 {
226 clocks = <&clock 291>, <&clock 148>; 228 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
227 clock-names = "uart", "clk_uart_baud0"; 229 clock-names = "uart", "clk_uart_baud0";
228 }; 230 };
229 231
230 serial@12C30000 { 232 serial@12C30000 {
231 clocks = <&clock 292>, <&clock 149>; 233 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
232 clock-names = "uart", "clk_uart_baud0"; 234 clock-names = "uart", "clk_uart_baud0";
233 }; 235 };
234 236
@@ -236,7 +238,7 @@
236 compatible = "samsung,exynos5-sata-ahci"; 238 compatible = "samsung,exynos5-sata-ahci";
237 reg = <0x122F0000 0x1ff>; 239 reg = <0x122F0000 0x1ff>;
238 interrupts = <0 115 0>; 240 interrupts = <0 115 0>;
239 clocks = <&clock 277>, <&clock 143>; 241 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
240 clock-names = "sata", "sclk_sata"; 242 clock-names = "sata", "sclk_sata";
241 }; 243 };
242 244
@@ -251,7 +253,7 @@
251 interrupts = <0 56 0>; 253 interrupts = <0 56 0>;
252 #address-cells = <1>; 254 #address-cells = <1>;
253 #size-cells = <0>; 255 #size-cells = <0>;
254 clocks = <&clock 294>; 256 clocks = <&clock CLK_I2C0>;
255 clock-names = "i2c"; 257 clock-names = "i2c";
256 pinctrl-names = "default"; 258 pinctrl-names = "default";
257 pinctrl-0 = <&i2c0_bus>; 259 pinctrl-0 = <&i2c0_bus>;
@@ -264,7 +266,7 @@
264 interrupts = <0 57 0>; 266 interrupts = <0 57 0>;
265 #address-cells = <1>; 267 #address-cells = <1>;
266 #size-cells = <0>; 268 #size-cells = <0>;
267 clocks = <&clock 295>; 269 clocks = <&clock CLK_I2C1>;
268 clock-names = "i2c"; 270 clock-names = "i2c";
269 pinctrl-names = "default"; 271 pinctrl-names = "default";
270 pinctrl-0 = <&i2c1_bus>; 272 pinctrl-0 = <&i2c1_bus>;
@@ -277,7 +279,7 @@
277 interrupts = <0 58 0>; 279 interrupts = <0 58 0>;
278 #address-cells = <1>; 280 #address-cells = <1>;
279 #size-cells = <0>; 281 #size-cells = <0>;
280 clocks = <&clock 296>; 282 clocks = <&clock CLK_I2C2>;
281 clock-names = "i2c"; 283 clock-names = "i2c";
282 pinctrl-names = "default"; 284 pinctrl-names = "default";
283 pinctrl-0 = <&i2c2_bus>; 285 pinctrl-0 = <&i2c2_bus>;
@@ -290,7 +292,7 @@
290 interrupts = <0 59 0>; 292 interrupts = <0 59 0>;
291 #address-cells = <1>; 293 #address-cells = <1>;
292 #size-cells = <0>; 294 #size-cells = <0>;
293 clocks = <&clock 297>; 295 clocks = <&clock CLK_I2C3>;
294 clock-names = "i2c"; 296 clock-names = "i2c";
295 pinctrl-names = "default"; 297 pinctrl-names = "default";
296 pinctrl-0 = <&i2c3_bus>; 298 pinctrl-0 = <&i2c3_bus>;
@@ -303,7 +305,7 @@
303 interrupts = <0 60 0>; 305 interrupts = <0 60 0>;
304 #address-cells = <1>; 306 #address-cells = <1>;
305 #size-cells = <0>; 307 #size-cells = <0>;
306 clocks = <&clock 298>; 308 clocks = <&clock CLK_I2C4>;
307 clock-names = "i2c"; 309 clock-names = "i2c";
308 pinctrl-names = "default"; 310 pinctrl-names = "default";
309 pinctrl-0 = <&i2c4_bus>; 311 pinctrl-0 = <&i2c4_bus>;
@@ -316,7 +318,7 @@
316 interrupts = <0 61 0>; 318 interrupts = <0 61 0>;
317 #address-cells = <1>; 319 #address-cells = <1>;
318 #size-cells = <0>; 320 #size-cells = <0>;
319 clocks = <&clock 299>; 321 clocks = <&clock CLK_I2C5>;
320 clock-names = "i2c"; 322 clock-names = "i2c";
321 pinctrl-names = "default"; 323 pinctrl-names = "default";
322 pinctrl-0 = <&i2c5_bus>; 324 pinctrl-0 = <&i2c5_bus>;
@@ -329,7 +331,7 @@
329 interrupts = <0 62 0>; 331 interrupts = <0 62 0>;
330 #address-cells = <1>; 332 #address-cells = <1>;
331 #size-cells = <0>; 333 #size-cells = <0>;
332 clocks = <&clock 300>; 334 clocks = <&clock CLK_I2C6>;
333 clock-names = "i2c"; 335 clock-names = "i2c";
334 pinctrl-names = "default"; 336 pinctrl-names = "default";
335 pinctrl-0 = <&i2c6_bus>; 337 pinctrl-0 = <&i2c6_bus>;
@@ -342,7 +344,7 @@
342 interrupts = <0 63 0>; 344 interrupts = <0 63 0>;
343 #address-cells = <1>; 345 #address-cells = <1>;
344 #size-cells = <0>; 346 #size-cells = <0>;
345 clocks = <&clock 301>; 347 clocks = <&clock CLK_I2C7>;
346 clock-names = "i2c"; 348 clock-names = "i2c";
347 pinctrl-names = "default"; 349 pinctrl-names = "default";
348 pinctrl-0 = <&i2c7_bus>; 350 pinctrl-0 = <&i2c7_bus>;
@@ -355,7 +357,7 @@
355 interrupts = <0 64 0>; 357 interrupts = <0 64 0>;
356 #address-cells = <1>; 358 #address-cells = <1>;
357 #size-cells = <0>; 359 #size-cells = <0>;
358 clocks = <&clock 302>; 360 clocks = <&clock CLK_I2C_HDMI>;
359 clock-names = "i2c"; 361 clock-names = "i2c";
360 status = "disabled"; 362 status = "disabled";
361 }; 363 };
@@ -365,7 +367,7 @@
365 reg = <0x121D0000 0x100>; 367 reg = <0x121D0000 0x100>;
366 #address-cells = <1>; 368 #address-cells = <1>;
367 #size-cells = <0>; 369 #size-cells = <0>;
368 clocks = <&clock 288>; 370 clocks = <&clock CLK_SATA_PHYI2C>;
369 clock-names = "i2c"; 371 clock-names = "i2c";
370 status = "disabled"; 372 status = "disabled";
371 }; 373 };
@@ -380,7 +382,7 @@
380 dma-names = "tx", "rx"; 382 dma-names = "tx", "rx";
381 #address-cells = <1>; 383 #address-cells = <1>;
382 #size-cells = <0>; 384 #size-cells = <0>;
383 clocks = <&clock 304>, <&clock 154>; 385 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
384 clock-names = "spi", "spi_busclk0"; 386 clock-names = "spi", "spi_busclk0";
385 pinctrl-names = "default"; 387 pinctrl-names = "default";
386 pinctrl-0 = <&spi0_bus>; 388 pinctrl-0 = <&spi0_bus>;
@@ -396,7 +398,7 @@
396 dma-names = "tx", "rx"; 398 dma-names = "tx", "rx";
397 #address-cells = <1>; 399 #address-cells = <1>;
398 #size-cells = <0>; 400 #size-cells = <0>;
399 clocks = <&clock 305>, <&clock 155>; 401 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
400 clock-names = "spi", "spi_busclk0"; 402 clock-names = "spi", "spi_busclk0";
401 pinctrl-names = "default"; 403 pinctrl-names = "default";
402 pinctrl-0 = <&spi1_bus>; 404 pinctrl-0 = <&spi1_bus>;
@@ -412,7 +414,7 @@
412 dma-names = "tx", "rx"; 414 dma-names = "tx", "rx";
413 #address-cells = <1>; 415 #address-cells = <1>;
414 #size-cells = <0>; 416 #size-cells = <0>;
415 clocks = <&clock 306>, <&clock 156>; 417 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
416 clock-names = "spi", "spi_busclk0"; 418 clock-names = "spi", "spi_busclk0";
417 pinctrl-names = "default"; 419 pinctrl-names = "default";
418 pinctrl-0 = <&spi2_bus>; 420 pinctrl-0 = <&spi2_bus>;
@@ -424,7 +426,7 @@
424 #address-cells = <1>; 426 #address-cells = <1>;
425 #size-cells = <0>; 427 #size-cells = <0>;
426 reg = <0x12200000 0x1000>; 428 reg = <0x12200000 0x1000>;
427 clocks = <&clock 280>, <&clock 139>; 429 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
428 clock-names = "biu", "ciu"; 430 clock-names = "biu", "ciu";
429 fifo-depth = <0x80>; 431 fifo-depth = <0x80>;
430 status = "disabled"; 432 status = "disabled";
@@ -436,7 +438,7 @@
436 #address-cells = <1>; 438 #address-cells = <1>;
437 #size-cells = <0>; 439 #size-cells = <0>;
438 reg = <0x12210000 0x1000>; 440 reg = <0x12210000 0x1000>;
439 clocks = <&clock 281>, <&clock 140>; 441 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
440 clock-names = "biu", "ciu"; 442 clock-names = "biu", "ciu";
441 fifo-depth = <0x80>; 443 fifo-depth = <0x80>;
442 status = "disabled"; 444 status = "disabled";
@@ -448,7 +450,7 @@
448 #address-cells = <1>; 450 #address-cells = <1>;
449 #size-cells = <0>; 451 #size-cells = <0>;
450 reg = <0x12220000 0x1000>; 452 reg = <0x12220000 0x1000>;
451 clocks = <&clock 282>, <&clock 141>; 453 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
452 clock-names = "biu", "ciu"; 454 clock-names = "biu", "ciu";
453 fifo-depth = <0x80>; 455 fifo-depth = <0x80>;
454 status = "disabled"; 456 status = "disabled";
@@ -460,7 +462,7 @@
460 interrupts = <0 78 0>; 462 interrupts = <0 78 0>;
461 #address-cells = <1>; 463 #address-cells = <1>;
462 #size-cells = <0>; 464 #size-cells = <0>;
463 clocks = <&clock 283>, <&clock 142>; 465 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
464 clock-names = "biu", "ciu"; 466 clock-names = "biu", "ciu";
465 fifo-depth = <0x80>; 467 fifo-depth = <0x80>;
466 status = "disabled"; 468 status = "disabled";
@@ -490,7 +492,7 @@
490 dmas = <&pdma1 12 492 dmas = <&pdma1 12
491 &pdma1 11>; 493 &pdma1 11>;
492 dma-names = "tx", "rx"; 494 dma-names = "tx", "rx";
493 clocks = <&clock 307>, <&clock 157>; 495 clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
494 clock-names = "iis", "i2s_opclk0"; 496 clock-names = "iis", "i2s_opclk0";
495 pinctrl-names = "default"; 497 pinctrl-names = "default";
496 pinctrl-0 = <&i2s1_bus>; 498 pinctrl-0 = <&i2s1_bus>;
@@ -503,7 +505,7 @@
503 dmas = <&pdma0 12 505 dmas = <&pdma0 12
504 &pdma0 11>; 506 &pdma0 11>;
505 dma-names = "tx", "rx"; 507 dma-names = "tx", "rx";
506 clocks = <&clock 308>, <&clock 158>; 508 clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
507 clock-names = "iis", "i2s_opclk0"; 509 clock-names = "iis", "i2s_opclk0";
508 pinctrl-names = "default"; 510 pinctrl-names = "default";
509 pinctrl-0 = <&i2s2_bus>; 511 pinctrl-0 = <&i2s2_bus>;
@@ -511,7 +513,7 @@
511 513
512 usb@12000000 { 514 usb@12000000 {
513 compatible = "samsung,exynos5250-dwusb3"; 515 compatible = "samsung,exynos5250-dwusb3";
514 clocks = <&clock 286>; 516 clocks = <&clock CLK_USB3>;
515 clock-names = "usbdrd30"; 517 clock-names = "usbdrd30";
516 #address-cells = <1>; 518 #address-cells = <1>;
517 #size-cells = <1>; 519 #size-cells = <1>;
@@ -528,7 +530,7 @@
528 usb3_phy: usbphy@12100000 { 530 usb3_phy: usbphy@12100000 {
529 compatible = "samsung,exynos5250-usb3phy"; 531 compatible = "samsung,exynos5250-usb3phy";
530 reg = <0x12100000 0x100>; 532 reg = <0x12100000 0x100>;
531 clocks = <&clock 1>, <&clock 286>; 533 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>;
532 clock-names = "ext_xtal", "usbdrd30"; 534 clock-names = "ext_xtal", "usbdrd30";
533 #address-cells = <1>; 535 #address-cells = <1>;
534 #size-cells = <1>; 536 #size-cells = <1>;
@@ -544,7 +546,7 @@
544 reg = <0x12110000 0x100>; 546 reg = <0x12110000 0x100>;
545 interrupts = <0 71 0>; 547 interrupts = <0 71 0>;
546 548
547 clocks = <&clock 285>; 549 clocks = <&clock CLK_USB2>;
548 clock-names = "usbhost"; 550 clock-names = "usbhost";
549 }; 551 };
550 552
@@ -553,14 +555,14 @@
553 reg = <0x12120000 0x100>; 555 reg = <0x12120000 0x100>;
554 interrupts = <0 71 0>; 556 interrupts = <0 71 0>;
555 557
556 clocks = <&clock 285>; 558 clocks = <&clock CLK_USB2>;
557 clock-names = "usbhost"; 559 clock-names = "usbhost";
558 }; 560 };
559 561
560 usb2_phy: usbphy@12130000 { 562 usb2_phy: usbphy@12130000 {
561 compatible = "samsung,exynos5250-usb2phy"; 563 compatible = "samsung,exynos5250-usb2phy";
562 reg = <0x12130000 0x100>; 564 reg = <0x12130000 0x100>;
563 clocks = <&clock 1>, <&clock 285>; 565 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB2>;
564 clock-names = "ext_xtal", "usbhost"; 566 clock-names = "ext_xtal", "usbhost";
565 #address-cells = <1>; 567 #address-cells = <1>;
566 #size-cells = <1>; 568 #size-cells = <1>;
@@ -577,7 +579,7 @@
577 reg = <0x12dd0000 0x100>; 579 reg = <0x12dd0000 0x100>;
578 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 580 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
579 #pwm-cells = <3>; 581 #pwm-cells = <3>;
580 clocks = <&clock 311>; 582 clocks = <&clock CLK_PWM>;
581 clock-names = "timers"; 583 clock-names = "timers";
582 }; 584 };
583 585
@@ -592,7 +594,7 @@
592 compatible = "arm,pl330", "arm,primecell"; 594 compatible = "arm,pl330", "arm,primecell";
593 reg = <0x121A0000 0x1000>; 595 reg = <0x121A0000 0x1000>;
594 interrupts = <0 34 0>; 596 interrupts = <0 34 0>;
595 clocks = <&clock 275>; 597 clocks = <&clock CLK_PDMA0>;
596 clock-names = "apb_pclk"; 598 clock-names = "apb_pclk";
597 #dma-cells = <1>; 599 #dma-cells = <1>;
598 #dma-channels = <8>; 600 #dma-channels = <8>;
@@ -603,7 +605,7 @@
603 compatible = "arm,pl330", "arm,primecell"; 605 compatible = "arm,pl330", "arm,primecell";
604 reg = <0x121B0000 0x1000>; 606 reg = <0x121B0000 0x1000>;
605 interrupts = <0 35 0>; 607 interrupts = <0 35 0>;
606 clocks = <&clock 276>; 608 clocks = <&clock CLK_PDMA1>;
607 clock-names = "apb_pclk"; 609 clock-names = "apb_pclk";
608 #dma-cells = <1>; 610 #dma-cells = <1>;
609 #dma-channels = <8>; 611 #dma-channels = <8>;
@@ -614,7 +616,7 @@
614 compatible = "arm,pl330", "arm,primecell"; 616 compatible = "arm,pl330", "arm,primecell";
615 reg = <0x10800000 0x1000>; 617 reg = <0x10800000 0x1000>;
616 interrupts = <0 33 0>; 618 interrupts = <0 33 0>;
617 clocks = <&clock 346>; 619 clocks = <&clock CLK_MDMA0>;
618 clock-names = "apb_pclk"; 620 clock-names = "apb_pclk";
619 #dma-cells = <1>; 621 #dma-cells = <1>;
620 #dma-channels = <8>; 622 #dma-channels = <8>;
@@ -625,7 +627,7 @@
625 compatible = "arm,pl330", "arm,primecell"; 627 compatible = "arm,pl330", "arm,primecell";
626 reg = <0x11C10000 0x1000>; 628 reg = <0x11C10000 0x1000>;
627 interrupts = <0 124 0>; 629 interrupts = <0 124 0>;
628 clocks = <&clock 271>; 630 clocks = <&clock CLK_MDMA1>;
629 clock-names = "apb_pclk"; 631 clock-names = "apb_pclk";
630 #dma-cells = <1>; 632 #dma-cells = <1>;
631 #dma-channels = <8>; 633 #dma-channels = <8>;
@@ -638,7 +640,7 @@
638 reg = <0x13e00000 0x1000>; 640 reg = <0x13e00000 0x1000>;
639 interrupts = <0 85 0>; 641 interrupts = <0 85 0>;
640 samsung,power-domain = <&pd_gsc>; 642 samsung,power-domain = <&pd_gsc>;
641 clocks = <&clock 256>; 643 clocks = <&clock CLK_GSCL0>;
642 clock-names = "gscl"; 644 clock-names = "gscl";
643 }; 645 };
644 646
@@ -647,7 +649,7 @@
647 reg = <0x13e10000 0x1000>; 649 reg = <0x13e10000 0x1000>;
648 interrupts = <0 86 0>; 650 interrupts = <0 86 0>;
649 samsung,power-domain = <&pd_gsc>; 651 samsung,power-domain = <&pd_gsc>;
650 clocks = <&clock 257>; 652 clocks = <&clock CLK_GSCL1>;
651 clock-names = "gscl"; 653 clock-names = "gscl";
652 }; 654 };
653 655
@@ -656,7 +658,7 @@
656 reg = <0x13e20000 0x1000>; 658 reg = <0x13e20000 0x1000>;
657 interrupts = <0 87 0>; 659 interrupts = <0 87 0>;
658 samsung,power-domain = <&pd_gsc>; 660 samsung,power-domain = <&pd_gsc>;
659 clocks = <&clock 258>; 661 clocks = <&clock CLK_GSCL2>;
660 clock-names = "gscl"; 662 clock-names = "gscl";
661 }; 663 };
662 664
@@ -665,7 +667,7 @@
665 reg = <0x13e30000 0x1000>; 667 reg = <0x13e30000 0x1000>;
666 interrupts = <0 88 0>; 668 interrupts = <0 88 0>;
667 samsung,power-domain = <&pd_gsc>; 669 samsung,power-domain = <&pd_gsc>;
668 clocks = <&clock 259>; 670 clocks = <&clock CLK_GSCL3>;
669 clock-names = "gscl"; 671 clock-names = "gscl";
670 }; 672 };
671 673
@@ -673,8 +675,9 @@
673 compatible = "samsung,exynos4212-hdmi"; 675 compatible = "samsung,exynos4212-hdmi";
674 reg = <0x14530000 0x70000>; 676 reg = <0x14530000 0x70000>;
675 interrupts = <0 95 0>; 677 interrupts = <0 95 0>;
676 clocks = <&clock 344>, <&clock 136>, <&clock 137>, 678 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
677 <&clock 159>, <&clock 1024>; 679 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
680 <&clock CLK_MOUT_HDMI>;
678 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 681 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
679 "sclk_hdmiphy", "mout_hdmi"; 682 "sclk_hdmiphy", "mout_hdmi";
680 }; 683 };
@@ -683,7 +686,7 @@
683 compatible = "samsung,exynos5250-mixer"; 686 compatible = "samsung,exynos5250-mixer";
684 reg = <0x14450000 0x10000>; 687 reg = <0x14450000 0x10000>;
685 interrupts = <0 94 0>; 688 interrupts = <0 94 0>;
686 clocks = <&clock 343>, <&clock 136>; 689 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
687 clock-names = "mixer", "sclk_hdmi"; 690 clock-names = "mixer", "sclk_hdmi";
688 }; 691 };
689 692
@@ -694,14 +697,14 @@
694 }; 697 };
695 698
696 dp-controller@145B0000 { 699 dp-controller@145B0000 {
697 clocks = <&clock 342>; 700 clocks = <&clock CLK_DP>;
698 clock-names = "dp"; 701 clock-names = "dp";
699 phys = <&dp_phy>; 702 phys = <&dp_phy>;
700 phy-names = "dp"; 703 phy-names = "dp";
701 }; 704 };
702 705
703 fimd@14400000 { 706 fimd@14400000 {
704 clocks = <&clock 133>, <&clock 339>; 707 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
705 clock-names = "sclk_fimd", "fimd"; 708 clock-names = "sclk_fimd", "fimd";
706 }; 709 };
707 710
@@ -709,7 +712,7 @@
709 compatible = "samsung,exynos-adc-v1"; 712 compatible = "samsung,exynos-adc-v1";
710 reg = <0x12D10000 0x100>, <0x10040718 0x4>; 713 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
711 interrupts = <0 106 0>; 714 interrupts = <0 106 0>;
712 clocks = <&clock 303>; 715 clocks = <&clock CLK_ADC>;
713 clock-names = "adc"; 716 clock-names = "adc";
714 #io-channel-cells = <1>; 717 #io-channel-cells = <1>;
715 io-channel-ranges; 718 io-channel-ranges;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 45e2e658b03b..e3329afbd8c4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15 15
16#include <dt-bindings/clock/exynos5420.h>
16#include "exynos5.dtsi" 17#include "exynos5.dtsi"
17#include "exynos5420-pinctrl.dtsi" 18#include "exynos5420-pinctrl.dtsi"
18 19
@@ -119,7 +120,8 @@
119 compatible = "samsung,exynos5420-audss-clock"; 120 compatible = "samsung,exynos5420-audss-clock";
120 reg = <0x03810000 0x0C>; 121 reg = <0x03810000 0x0C>;
121 #clock-cells = <1>; 122 #clock-cells = <1>;
122 clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>; 123 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
124 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
123 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 125 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
124 }; 126 };
125 127
@@ -127,7 +129,7 @@
127 compatible = "samsung,mfc-v7"; 129 compatible = "samsung,mfc-v7";
128 reg = <0x11000000 0x10000>; 130 reg = <0x11000000 0x10000>;
129 interrupts = <0 96 0>; 131 interrupts = <0 96 0>;
130 clocks = <&clock 401>; 132 clocks = <&clock CLK_MFC>;
131 clock-names = "mfc"; 133 clock-names = "mfc";
132 }; 134 };
133 135
@@ -137,7 +139,7 @@
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <0>; 140 #size-cells = <0>;
139 reg = <0x12200000 0x2000>; 141 reg = <0x12200000 0x2000>;
140 clocks = <&clock 351>, <&clock 132>; 142 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
141 clock-names = "biu", "ciu"; 143 clock-names = "biu", "ciu";
142 fifo-depth = <0x40>; 144 fifo-depth = <0x40>;
143 status = "disabled"; 145 status = "disabled";
@@ -149,7 +151,7 @@
149 #address-cells = <1>; 151 #address-cells = <1>;
150 #size-cells = <0>; 152 #size-cells = <0>;
151 reg = <0x12210000 0x2000>; 153 reg = <0x12210000 0x2000>;
152 clocks = <&clock 352>, <&clock 133>; 154 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
153 clock-names = "biu", "ciu"; 155 clock-names = "biu", "ciu";
154 fifo-depth = <0x40>; 156 fifo-depth = <0x40>;
155 status = "disabled"; 157 status = "disabled";
@@ -161,7 +163,7 @@
161 #address-cells = <1>; 163 #address-cells = <1>;
162 #size-cells = <0>; 164 #size-cells = <0>;
163 reg = <0x12220000 0x1000>; 165 reg = <0x12220000 0x1000>;
164 clocks = <&clock 353>, <&clock 134>; 166 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
165 clock-names = "biu", "ciu"; 167 clock-names = "biu", "ciu";
166 fifo-depth = <0x40>; 168 fifo-depth = <0x40>;
167 status = "disabled"; 169 status = "disabled";
@@ -175,7 +177,7 @@
175 interrupt-parent = <&mct_map>; 177 interrupt-parent = <&mct_map>;
176 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, 178 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
177 <8>, <9>, <10>, <11>; 179 <8>, <9>, <10>, <11>;
178 clocks = <&clock 1>, <&clock 315>; 180 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
179 clock-names = "fin_pll", "mct"; 181 clock-names = "fin_pll", "mct";
180 182
181 mct_map: mct-map { 183 mct_map: mct-map {
@@ -269,7 +271,7 @@
269 }; 271 };
270 272
271 rtc@101E0000 { 273 rtc@101E0000 {
272 clocks = <&clock 317>; 274 clocks = <&clock CLK_RTC>;
273 clock-names = "rtc"; 275 clock-names = "rtc";
274 status = "disabled"; 276 status = "disabled";
275 }; 277 };
@@ -296,7 +298,7 @@
296 compatible = "arm,pl330", "arm,primecell"; 298 compatible = "arm,pl330", "arm,primecell";
297 reg = <0x121A0000 0x1000>; 299 reg = <0x121A0000 0x1000>;
298 interrupts = <0 34 0>; 300 interrupts = <0 34 0>;
299 clocks = <&clock 362>; 301 clocks = <&clock CLK_PDMA0>;
300 clock-names = "apb_pclk"; 302 clock-names = "apb_pclk";
301 #dma-cells = <1>; 303 #dma-cells = <1>;
302 #dma-channels = <8>; 304 #dma-channels = <8>;
@@ -307,7 +309,7 @@
307 compatible = "arm,pl330", "arm,primecell"; 309 compatible = "arm,pl330", "arm,primecell";
308 reg = <0x121B0000 0x1000>; 310 reg = <0x121B0000 0x1000>;
309 interrupts = <0 35 0>; 311 interrupts = <0 35 0>;
310 clocks = <&clock 363>; 312 clocks = <&clock CLK_PDMA1>;
311 clock-names = "apb_pclk"; 313 clock-names = "apb_pclk";
312 #dma-cells = <1>; 314 #dma-cells = <1>;
313 #dma-channels = <8>; 315 #dma-channels = <8>;
@@ -318,7 +320,7 @@
318 compatible = "arm,pl330", "arm,primecell"; 320 compatible = "arm,pl330", "arm,primecell";
319 reg = <0x10800000 0x1000>; 321 reg = <0x10800000 0x1000>;
320 interrupts = <0 33 0>; 322 interrupts = <0 33 0>;
321 clocks = <&clock 473>; 323 clocks = <&clock CLK_MDMA0>;
322 clock-names = "apb_pclk"; 324 clock-names = "apb_pclk";
323 #dma-cells = <1>; 325 #dma-cells = <1>;
324 #dma-channels = <8>; 326 #dma-channels = <8>;
@@ -329,7 +331,7 @@
329 compatible = "arm,pl330", "arm,primecell"; 331 compatible = "arm,pl330", "arm,primecell";
330 reg = <0x11C10000 0x1000>; 332 reg = <0x11C10000 0x1000>;
331 interrupts = <0 124 0>; 333 interrupts = <0 124 0>;
332 clocks = <&clock 442>; 334 clocks = <&clock CLK_MDMA1>;
333 clock-names = "apb_pclk"; 335 clock-names = "apb_pclk";
334 #dma-cells = <1>; 336 #dma-cells = <1>;
335 #dma-channels = <8>; 337 #dma-channels = <8>;
@@ -360,7 +362,7 @@
360 dmas = <&pdma1 12 362 dmas = <&pdma1 12
361 &pdma1 11>; 363 &pdma1 11>;
362 dma-names = "tx", "rx"; 364 dma-names = "tx", "rx";
363 clocks = <&clock 275>, <&clock 138>; 365 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
364 clock-names = "iis", "i2s_opclk0"; 366 clock-names = "iis", "i2s_opclk0";
365 pinctrl-names = "default"; 367 pinctrl-names = "default";
366 pinctrl-0 = <&i2s1_bus>; 368 pinctrl-0 = <&i2s1_bus>;
@@ -373,7 +375,7 @@
373 dmas = <&pdma0 12 375 dmas = <&pdma0 12
374 &pdma0 11>; 376 &pdma0 11>;
375 dma-names = "tx", "rx"; 377 dma-names = "tx", "rx";
376 clocks = <&clock 276>, <&clock 139>; 378 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
377 clock-names = "iis", "i2s_opclk0"; 379 clock-names = "iis", "i2s_opclk0";
378 pinctrl-names = "default"; 380 pinctrl-names = "default";
379 pinctrl-0 = <&i2s2_bus>; 381 pinctrl-0 = <&i2s2_bus>;
@@ -391,7 +393,7 @@
391 #size-cells = <0>; 393 #size-cells = <0>;
392 pinctrl-names = "default"; 394 pinctrl-names = "default";
393 pinctrl-0 = <&spi0_bus>; 395 pinctrl-0 = <&spi0_bus>;
394 clocks = <&clock 271>, <&clock 135>; 396 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
395 clock-names = "spi", "spi_busclk0"; 397 clock-names = "spi", "spi_busclk0";
396 status = "disabled"; 398 status = "disabled";
397 }; 399 };
@@ -407,7 +409,7 @@
407 #size-cells = <0>; 409 #size-cells = <0>;
408 pinctrl-names = "default"; 410 pinctrl-names = "default";
409 pinctrl-0 = <&spi1_bus>; 411 pinctrl-0 = <&spi1_bus>;
410 clocks = <&clock 272>, <&clock 136>; 412 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
411 clock-names = "spi", "spi_busclk0"; 413 clock-names = "spi", "spi_busclk0";
412 status = "disabled"; 414 status = "disabled";
413 }; 415 };
@@ -423,28 +425,28 @@
423 #size-cells = <0>; 425 #size-cells = <0>;
424 pinctrl-names = "default"; 426 pinctrl-names = "default";
425 pinctrl-0 = <&spi2_bus>; 427 pinctrl-0 = <&spi2_bus>;
426 clocks = <&clock 273>, <&clock 137>; 428 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
427 clock-names = "spi", "spi_busclk0"; 429 clock-names = "spi", "spi_busclk0";
428 status = "disabled"; 430 status = "disabled";
429 }; 431 };
430 432
431 serial@12C00000 { 433 serial@12C00000 {
432 clocks = <&clock 257>, <&clock 128>; 434 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
433 clock-names = "uart", "clk_uart_baud0"; 435 clock-names = "uart", "clk_uart_baud0";
434 }; 436 };
435 437
436 serial@12C10000 { 438 serial@12C10000 {
437 clocks = <&clock 258>, <&clock 129>; 439 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
438 clock-names = "uart", "clk_uart_baud0"; 440 clock-names = "uart", "clk_uart_baud0";
439 }; 441 };
440 442
441 serial@12C20000 { 443 serial@12C20000 {
442 clocks = <&clock 259>, <&clock 130>; 444 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
443 clock-names = "uart", "clk_uart_baud0"; 445 clock-names = "uart", "clk_uart_baud0";
444 }; 446 };
445 447
446 serial@12C30000 { 448 serial@12C30000 {
447 clocks = <&clock 260>, <&clock 131>; 449 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
448 clock-names = "uart", "clk_uart_baud0"; 450 clock-names = "uart", "clk_uart_baud0";
449 }; 451 };
450 452
@@ -453,7 +455,7 @@
453 reg = <0x12dd0000 0x100>; 455 reg = <0x12dd0000 0x100>;
454 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 456 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
455 #pwm-cells = <3>; 457 #pwm-cells = <3>;
456 clocks = <&clock 279>; 458 clocks = <&clock CLK_PWM>;
457 clock-names = "timers"; 459 clock-names = "timers";
458 }; 460 };
459 461
@@ -464,7 +466,7 @@
464 }; 466 };
465 467
466 dp-controller@145B0000 { 468 dp-controller@145B0000 {
467 clocks = <&clock 412>; 469 clocks = <&clock CLK_DP1>;
468 clock-names = "dp"; 470 clock-names = "dp";
469 phys = <&dp_phy>; 471 phys = <&dp_phy>;
470 phy-names = "dp"; 472 phy-names = "dp";
@@ -472,7 +474,7 @@
472 474
473 fimd@14400000 { 475 fimd@14400000 {
474 samsung,power-domain = <&disp_pd>; 476 samsung,power-domain = <&disp_pd>;
475 clocks = <&clock 147>, <&clock 421>; 477 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
476 clock-names = "sclk_fimd", "fimd"; 478 clock-names = "sclk_fimd", "fimd";
477 }; 479 };
478 480
@@ -480,7 +482,7 @@
480 compatible = "samsung,exynos-adc-v2"; 482 compatible = "samsung,exynos-adc-v2";
481 reg = <0x12D10000 0x100>, <0x10040720 0x4>; 483 reg = <0x12D10000 0x100>, <0x10040720 0x4>;
482 interrupts = <0 106 0>; 484 interrupts = <0 106 0>;
483 clocks = <&clock 270>; 485 clocks = <&clock CLK_TSADC>;
484 clock-names = "adc"; 486 clock-names = "adc";
485 #io-channel-cells = <1>; 487 #io-channel-cells = <1>;
486 io-channel-ranges; 488 io-channel-ranges;
@@ -493,7 +495,7 @@
493 interrupts = <0 56 0>; 495 interrupts = <0 56 0>;
494 #address-cells = <1>; 496 #address-cells = <1>;
495 #size-cells = <0>; 497 #size-cells = <0>;
496 clocks = <&clock 261>; 498 clocks = <&clock CLK_I2C0>;
497 clock-names = "i2c"; 499 clock-names = "i2c";
498 pinctrl-names = "default"; 500 pinctrl-names = "default";
499 pinctrl-0 = <&i2c0_bus>; 501 pinctrl-0 = <&i2c0_bus>;
@@ -506,7 +508,7 @@
506 interrupts = <0 57 0>; 508 interrupts = <0 57 0>;
507 #address-cells = <1>; 509 #address-cells = <1>;
508 #size-cells = <0>; 510 #size-cells = <0>;
509 clocks = <&clock 262>; 511 clocks = <&clock CLK_I2C1>;
510 clock-names = "i2c"; 512 clock-names = "i2c";
511 pinctrl-names = "default"; 513 pinctrl-names = "default";
512 pinctrl-0 = <&i2c1_bus>; 514 pinctrl-0 = <&i2c1_bus>;
@@ -519,7 +521,7 @@
519 interrupts = <0 58 0>; 521 interrupts = <0 58 0>;
520 #address-cells = <1>; 522 #address-cells = <1>;
521 #size-cells = <0>; 523 #size-cells = <0>;
522 clocks = <&clock 263>; 524 clocks = <&clock CLK_I2C2>;
523 clock-names = "i2c"; 525 clock-names = "i2c";
524 pinctrl-names = "default"; 526 pinctrl-names = "default";
525 pinctrl-0 = <&i2c2_bus>; 527 pinctrl-0 = <&i2c2_bus>;
@@ -532,7 +534,7 @@
532 interrupts = <0 59 0>; 534 interrupts = <0 59 0>;
533 #address-cells = <1>; 535 #address-cells = <1>;
534 #size-cells = <0>; 536 #size-cells = <0>;
535 clocks = <&clock 264>; 537 clocks = <&clock CLK_I2C3>;
536 clock-names = "i2c"; 538 clock-names = "i2c";
537 pinctrl-names = "default"; 539 pinctrl-names = "default";
538 pinctrl-0 = <&i2c3_bus>; 540 pinctrl-0 = <&i2c3_bus>;
@@ -547,7 +549,7 @@
547 #size-cells = <0>; 549 #size-cells = <0>;
548 pinctrl-names = "default"; 550 pinctrl-names = "default";
549 pinctrl-0 = <&i2c4_hs_bus>; 551 pinctrl-0 = <&i2c4_hs_bus>;
550 clocks = <&clock 265>; 552 clocks = <&clock CLK_I2C4>;
551 clock-names = "hsi2c"; 553 clock-names = "hsi2c";
552 status = "disabled"; 554 status = "disabled";
553 }; 555 };
@@ -560,7 +562,7 @@
560 #size-cells = <0>; 562 #size-cells = <0>;
561 pinctrl-names = "default"; 563 pinctrl-names = "default";
562 pinctrl-0 = <&i2c5_hs_bus>; 564 pinctrl-0 = <&i2c5_hs_bus>;
563 clocks = <&clock 266>; 565 clocks = <&clock CLK_I2C5>;
564 clock-names = "hsi2c"; 566 clock-names = "hsi2c";
565 status = "disabled"; 567 status = "disabled";
566 }; 568 };
@@ -573,7 +575,7 @@
573 #size-cells = <0>; 575 #size-cells = <0>;
574 pinctrl-names = "default"; 576 pinctrl-names = "default";
575 pinctrl-0 = <&i2c6_hs_bus>; 577 pinctrl-0 = <&i2c6_hs_bus>;
576 clocks = <&clock 267>; 578 clocks = <&clock CLK_I2C6>;
577 clock-names = "hsi2c"; 579 clock-names = "hsi2c";
578 status = "disabled"; 580 status = "disabled";
579 }; 581 };
@@ -586,7 +588,7 @@
586 #size-cells = <0>; 588 #size-cells = <0>;
587 pinctrl-names = "default"; 589 pinctrl-names = "default";
588 pinctrl-0 = <&i2c7_hs_bus>; 590 pinctrl-0 = <&i2c7_hs_bus>;
589 clocks = <&clock 268>; 591 clocks = <&clock CLK_I2C7>;
590 clock-names = "hsi2c"; 592 clock-names = "hsi2c";
591 status = "disabled"; 593 status = "disabled";
592 }; 594 };
@@ -599,7 +601,7 @@
599 #size-cells = <0>; 601 #size-cells = <0>;
600 pinctrl-names = "default"; 602 pinctrl-names = "default";
601 pinctrl-0 = <&i2c8_hs_bus>; 603 pinctrl-0 = <&i2c8_hs_bus>;
602 clocks = <&clock 281>; 604 clocks = <&clock CLK_I2C8>;
603 clock-names = "hsi2c"; 605 clock-names = "hsi2c";
604 status = "disabled"; 606 status = "disabled";
605 }; 607 };
@@ -612,7 +614,7 @@
612 #size-cells = <0>; 614 #size-cells = <0>;
613 pinctrl-names = "default"; 615 pinctrl-names = "default";
614 pinctrl-0 = <&i2c9_hs_bus>; 616 pinctrl-0 = <&i2c9_hs_bus>;
615 clocks = <&clock 282>; 617 clocks = <&clock CLK_I2C9>;
616 clock-names = "hsi2c"; 618 clock-names = "hsi2c";
617 status = "disabled"; 619 status = "disabled";
618 }; 620 };
@@ -625,7 +627,7 @@
625 #size-cells = <0>; 627 #size-cells = <0>;
626 pinctrl-names = "default"; 628 pinctrl-names = "default";
627 pinctrl-0 = <&i2c10_hs_bus>; 629 pinctrl-0 = <&i2c10_hs_bus>;
628 clocks = <&clock 283>; 630 clocks = <&clock CLK_I2C10>;
629 clock-names = "hsi2c"; 631 clock-names = "hsi2c";
630 status = "disabled"; 632 status = "disabled";
631 }; 633 };
@@ -634,8 +636,9 @@
634 compatible = "samsung,exynos4212-hdmi"; 636 compatible = "samsung,exynos4212-hdmi";
635 reg = <0x14530000 0x70000>; 637 reg = <0x14530000 0x70000>;
636 interrupts = <0 95 0>; 638 interrupts = <0 95 0>;
637 clocks = <&clock 413>, <&clock 143>, <&clock 768>, 639 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
638 <&clock 158>, <&clock 640>; 640 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
641 <&clock CLK_MOUT_HDMI>;
639 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 642 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
640 "sclk_hdmiphy", "mout_hdmi"; 643 "sclk_hdmiphy", "mout_hdmi";
641 status = "disabled"; 644 status = "disabled";
@@ -645,7 +648,7 @@
645 compatible = "samsung,exynos5420-mixer"; 648 compatible = "samsung,exynos5420-mixer";
646 reg = <0x14450000 0x10000>; 649 reg = <0x14450000 0x10000>;
647 interrupts = <0 94 0>; 650 interrupts = <0 94 0>;
648 clocks = <&clock 431>, <&clock 143>; 651 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
649 clock-names = "mixer", "sclk_hdmi"; 652 clock-names = "mixer", "sclk_hdmi";
650 }; 653 };
651 654
@@ -653,7 +656,7 @@
653 compatible = "samsung,exynos5-gsc"; 656 compatible = "samsung,exynos5-gsc";
654 reg = <0x13e00000 0x1000>; 657 reg = <0x13e00000 0x1000>;
655 interrupts = <0 85 0>; 658 interrupts = <0 85 0>;
656 clocks = <&clock 465>; 659 clocks = <&clock CLK_GSCL0>;
657 clock-names = "gscl"; 660 clock-names = "gscl";
658 samsung,power-domain = <&gsc_pd>; 661 samsung,power-domain = <&gsc_pd>;
659 }; 662 };
@@ -662,7 +665,7 @@
662 compatible = "samsung,exynos5-gsc"; 665 compatible = "samsung,exynos5-gsc";
663 reg = <0x13e10000 0x1000>; 666 reg = <0x13e10000 0x1000>;
664 interrupts = <0 86 0>; 667 interrupts = <0 86 0>;
665 clocks = <&clock 466>; 668 clocks = <&clock CLK_GSCL1>;
666 clock-names = "gscl"; 669 clock-names = "gscl";
667 samsung,power-domain = <&gsc_pd>; 670 samsung,power-domain = <&gsc_pd>;
668 }; 671 };
@@ -676,7 +679,7 @@
676 compatible = "samsung,exynos5420-tmu"; 679 compatible = "samsung,exynos5420-tmu";
677 reg = <0x10060000 0x100>; 680 reg = <0x10060000 0x100>;
678 interrupts = <0 65 0>; 681 interrupts = <0 65 0>;
679 clocks = <&clock 318>; 682 clocks = <&clock CLK_TMU>;
680 clock-names = "tmu_apbif"; 683 clock-names = "tmu_apbif";
681 }; 684 };
682 685
@@ -684,7 +687,7 @@
684 compatible = "samsung,exynos5420-tmu"; 687 compatible = "samsung,exynos5420-tmu";
685 reg = <0x10064000 0x100>; 688 reg = <0x10064000 0x100>;
686 interrupts = <0 183 0>; 689 interrupts = <0 183 0>;
687 clocks = <&clock 318>; 690 clocks = <&clock CLK_TMU>;
688 clock-names = "tmu_apbif"; 691 clock-names = "tmu_apbif";
689 }; 692 };
690 693
@@ -692,7 +695,7 @@
692 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 695 compatible = "samsung,exynos5420-tmu-ext-triminfo";
693 reg = <0x10068000 0x100>, <0x1006c000 0x4>; 696 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
694 interrupts = <0 184 0>; 697 interrupts = <0 184 0>;
695 clocks = <&clock 318>, <&clock 318>; 698 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
696 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 699 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
697 }; 700 };
698 701
@@ -700,7 +703,7 @@
700 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 703 compatible = "samsung,exynos5420-tmu-ext-triminfo";
701 reg = <0x1006c000 0x100>, <0x100a0000 0x4>; 704 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
702 interrupts = <0 185 0>; 705 interrupts = <0 185 0>;
703 clocks = <&clock 318>, <&clock 319>; 706 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
704 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 707 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
705 }; 708 };
706 709
@@ -708,7 +711,7 @@
708 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 711 compatible = "samsung,exynos5420-tmu-ext-triminfo";
709 reg = <0x100a0000 0x100>, <0x10068000 0x4>; 712 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
710 interrupts = <0 215 0>; 713 interrupts = <0 215 0>;
711 clocks = <&clock 319>, <&clock 318>; 714 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
712 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 715 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
713 }; 716 };
714 717
@@ -716,7 +719,7 @@
716 compatible = "samsung,exynos5420-wdt"; 719 compatible = "samsung,exynos5420-wdt";
717 reg = <0x101D0000 0x100>; 720 reg = <0x101D0000 0x100>;
718 interrupts = <0 42 0>; 721 interrupts = <0 42 0>;
719 clocks = <&clock 316>; 722 clocks = <&clock CLK_WDT>;
720 clock-names = "watchdog"; 723 clock-names = "watchdog";
721 samsung,syscon-phandle = <&pmu_system_controller>; 724 samsung,syscon-phandle = <&pmu_system_controller>;
722 }; 725 };
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 02a0a1226cef..75c7b89cec2f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -9,6 +9,7 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10*/ 10*/
11 11
12#include <dt-bindings/clock/exynos5440.h>
12#include "skeleton.dtsi" 13#include "skeleton.dtsi"
13 14
14/ { 15/ {
@@ -105,7 +106,7 @@
105 compatible = "samsung,exynos4210-uart"; 106 compatible = "samsung,exynos4210-uart";
106 reg = <0xB0000 0x1000>; 107 reg = <0xB0000 0x1000>;
107 interrupts = <0 2 0>; 108 interrupts = <0 2 0>;
108 clocks = <&clock 21>, <&clock 21>; 109 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
109 clock-names = "uart", "clk_uart_baud0"; 110 clock-names = "uart", "clk_uart_baud0";
110 }; 111 };
111 112
@@ -113,7 +114,7 @@
113 compatible = "samsung,exynos4210-uart"; 114 compatible = "samsung,exynos4210-uart";
114 reg = <0xC0000 0x1000>; 115 reg = <0xC0000 0x1000>;
115 interrupts = <0 3 0>; 116 interrupts = <0 3 0>;
116 clocks = <&clock 21>, <&clock 21>; 117 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
117 clock-names = "uart", "clk_uart_baud0"; 118 clock-names = "uart", "clk_uart_baud0";
118 }; 119 };
119 120
@@ -125,7 +126,7 @@
125 #size-cells = <0>; 126 #size-cells = <0>;
126 samsung,spi-src-clk = <0>; 127 samsung,spi-src-clk = <0>;
127 num-cs = <1>; 128 num-cs = <1>;
128 clocks = <&clock 21>, <&clock 16>; 129 clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
129 clock-names = "spi", "spi_busclk0"; 130 clock-names = "spi", "spi_busclk0";
130 }; 131 };
131 132
@@ -161,7 +162,7 @@
161 interrupts = <0 5 0>; 162 interrupts = <0 5 0>;
162 #address-cells = <1>; 163 #address-cells = <1>;
163 #size-cells = <0>; 164 #size-cells = <0>;
164 clocks = <&clock 21>; 165 clocks = <&clock CLK_B_125>;
165 clock-names = "i2c"; 166 clock-names = "i2c";
166 }; 167 };
167 168
@@ -171,7 +172,7 @@
171 interrupts = <0 6 0>; 172 interrupts = <0 6 0>;
172 #address-cells = <1>; 173 #address-cells = <1>;
173 #size-cells = <0>; 174 #size-cells = <0>;
174 clocks = <&clock 21>; 175 clocks = <&clock CLK_B_125>;
175 clock-names = "i2c"; 176 clock-names = "i2c";
176 }; 177 };
177 178
@@ -179,7 +180,7 @@
179 compatible = "samsung,s3c2410-wdt"; 180 compatible = "samsung,s3c2410-wdt";
180 reg = <0x110000 0x1000>; 181 reg = <0x110000 0x1000>;
181 interrupts = <0 1 0>; 182 interrupts = <0 1 0>;
182 clocks = <&clock 21>; 183 clocks = <&clock CLK_B_125>;
183 clock-names = "watchdog"; 184 clock-names = "watchdog";
184 }; 185 };
185 186
@@ -190,7 +191,7 @@
190 interrupts = <0 31 4>; 191 interrupts = <0 31 4>;
191 interrupt-names = "macirq"; 192 interrupt-names = "macirq";
192 phy-mode = "sgmii"; 193 phy-mode = "sgmii";
193 clocks = <&clock 25>; 194 clocks = <&clock CLK_GMAC0>;
194 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth";
195 }; 196 };
196 197
@@ -206,7 +207,7 @@
206 compatible = "samsung,s3c6410-rtc"; 207 compatible = "samsung,s3c6410-rtc";
207 reg = <0x130000 0x1000>; 208 reg = <0x130000 0x1000>;
208 interrupts = <0 17 0>, <0 16 0>; 209 interrupts = <0 17 0>, <0 16 0>;
209 clocks = <&clock 21>; 210 clocks = <&clock CLK_B_125>;
210 clock-names = "rtc"; 211 clock-names = "rtc";
211 }; 212 };
212 213
@@ -214,7 +215,7 @@
214 compatible = "samsung,exynos5440-tmu"; 215 compatible = "samsung,exynos5440-tmu";
215 reg = <0x160118 0x230>, <0x160368 0x10>; 216 reg = <0x160118 0x230>, <0x160368 0x10>;
216 interrupts = <0 58 0>; 217 interrupts = <0 58 0>;
217 clocks = <&clock 21>; 218 clocks = <&clock CLK_B_125>;
218 clock-names = "tmu_apbif"; 219 clock-names = "tmu_apbif";
219 }; 220 };
220 221
@@ -222,7 +223,7 @@
222 compatible = "samsung,exynos5440-tmu"; 223 compatible = "samsung,exynos5440-tmu";
223 reg = <0x16011C 0x230>, <0x160368 0x10>; 224 reg = <0x16011C 0x230>, <0x160368 0x10>;
224 interrupts = <0 58 0>; 225 interrupts = <0 58 0>;
225 clocks = <&clock 21>; 226 clocks = <&clock CLK_B_125>;
226 clock-names = "tmu_apbif"; 227 clock-names = "tmu_apbif";
227 }; 228 };
228 229
@@ -230,7 +231,7 @@
230 compatible = "samsung,exynos5440-tmu"; 231 compatible = "samsung,exynos5440-tmu";
231 reg = <0x160120 0x230>, <0x160368 0x10>; 232 reg = <0x160120 0x230>, <0x160368 0x10>;
232 interrupts = <0 58 0>; 233 interrupts = <0 58 0>;
233 clocks = <&clock 21>; 234 clocks = <&clock CLK_B_125>;
234 clock-names = "tmu_apbif"; 235 clock-names = "tmu_apbif";
235 }; 236 };
236 237
@@ -238,7 +239,7 @@
238 compatible = "snps,exynos5440-ahci"; 239 compatible = "snps,exynos5440-ahci";
239 reg = <0x210000 0x10000>; 240 reg = <0x210000 0x10000>;
240 interrupts = <0 30 0>; 241 interrupts = <0 30 0>;
241 clocks = <&clock 23>; 242 clocks = <&clock CLK_SATA>;
242 clock-names = "sata"; 243 clock-names = "sata";
243 }; 244 };
244 245
@@ -246,7 +247,7 @@
246 compatible = "samsung,exynos5440-ohci"; 247 compatible = "samsung,exynos5440-ohci";
247 reg = <0x220000 0x1000>; 248 reg = <0x220000 0x1000>;
248 interrupts = <0 29 0>; 249 interrupts = <0 29 0>;
249 clocks = <&clock 24>; 250 clocks = <&clock CLK_USB>;
250 clock-names = "usbhost"; 251 clock-names = "usbhost";
251 }; 252 };
252 253
@@ -254,7 +255,7 @@
254 compatible = "samsung,exynos5440-ehci"; 255 compatible = "samsung,exynos5440-ehci";
255 reg = <0x221000 0x1000>; 256 reg = <0x221000 0x1000>;
256 interrupts = <0 29 0>; 257 interrupts = <0 29 0>;
257 clocks = <&clock 24>; 258 clocks = <&clock CLK_USB>;
258 clock-names = "usbhost"; 259 clock-names = "usbhost";
259 }; 260 };
260 261
@@ -264,7 +265,7 @@
264 0x270000 0x1000 265 0x270000 0x1000
265 0x271000 0x40>; 266 0x271000 0x40>;
266 interrupts = <0 20 0>, <0 21 0>, <0 22 0>; 267 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
267 clocks = <&clock 28>, <&clock 27>; 268 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
268 clock-names = "pcie", "pcie_bus"; 269 clock-names = "pcie", "pcie_bus";
269 #address-cells = <3>; 270 #address-cells = <3>;
270 #size-cells = <2>; 271 #size-cells = <2>;
@@ -285,7 +286,7 @@
285 0x272000 0x1000 286 0x272000 0x1000
286 0x271040 0x40>; 287 0x271040 0x40>;
287 interrupts = <0 23 0>, <0 24 0>, <0 25 0>; 288 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
288 clocks = <&clock 29>, <&clock 27>; 289 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
289 clock-names = "pcie", "pcie_bus"; 290 clock-names = "pcie", "pcie_bus";
290 #address-cells = <3>; 291 #address-cells = <3>;
291 #size-cells = <2>; 292 #size-cells = <2>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-25 05:39:09 -0400