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authorMauro Carvalho Chehab <mchehab@s-opensource.com>2017-11-29 12:39:19 -0500
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-11-30 04:19:04 -0500
commitb95b0c98f52883f9b907836f3421341af6f0145f (patch)
tree27e70fcd01749cbccd37dce9ec4cde456a0feb42
parentcba862dc7301d62f90393f2bbb181834a3125308 (diff)
media: dvb_frontends: fix kernel-doc macros
Now, the Kernel checks for kernel_doc format issues. Weird enough, it didn't get any of those troubles. Shssst! Well, let's fix it, as a preventive way to avoid having hundreds of new warnings on some next Linux version. Tested by adding all files under dvb-frontends that have "/**" on them. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h12
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/drx_driver.h878
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/drxj.h220
-rw-r--r--drivers/media/dvb-frontends/drxk.h5
-rw-r--r--drivers/media/dvb-frontends/dvb-pll.h11
-rw-r--r--drivers/media/dvb-frontends/helene.h1
-rw-r--r--drivers/media/dvb-frontends/ix2505v.h17
-rw-r--r--drivers/media/dvb-frontends/l64781.c2
-rw-r--r--drivers/media/dvb-frontends/mn88472.h16
-rw-r--r--drivers/media/dvb-frontends/rtl2832_sdr.h6
-rw-r--r--drivers/media/dvb-frontends/stb6000.h9
-rw-r--r--drivers/media/dvb-frontends/stv0299.c2
-rw-r--r--drivers/media/dvb-frontends/tda826x.h11
-rw-r--r--drivers/media/dvb-frontends/tua6100.h2
-rw-r--r--drivers/media/dvb-frontends/zd1301_demod.h7
-rw-r--r--drivers/media/dvb-frontends/zl10036.h16
16 files changed, 607 insertions, 608 deletions
diff --git a/drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h b/drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
index 5b5421f70388..2b3af247a1f1 100644
--- a/drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
+++ b/drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
@@ -52,7 +52,7 @@ struct i2c_device_addr {
52}; 52};
53 53
54 54
55/** 55/*
56* \def IS_I2C_10BIT( addr ) 56* \def IS_I2C_10BIT( addr )
57* \brief Determine if I2C address 'addr' is a 10 bits address or not. 57* \brief Determine if I2C address 'addr' is a 10 bits address or not.
58* \param addr The I2C address. 58* \param addr The I2C address.
@@ -67,7 +67,7 @@ struct i2c_device_addr {
67Exported FUNCTIONS 67Exported FUNCTIONS
68------------------------------------------------------------------------------*/ 68------------------------------------------------------------------------------*/
69 69
70/** 70/*
71* \fn drxbsp_i2c_init() 71* \fn drxbsp_i2c_init()
72* \brief Initialize I2C communication module. 72* \brief Initialize I2C communication module.
73* \return drx_status_t Return status. 73* \return drx_status_t Return status.
@@ -76,7 +76,7 @@ Exported FUNCTIONS
76*/ 76*/
77 drx_status_t drxbsp_i2c_init(void); 77 drx_status_t drxbsp_i2c_init(void);
78 78
79/** 79/*
80* \fn drxbsp_i2c_term() 80* \fn drxbsp_i2c_term()
81* \brief Terminate I2C communication module. 81* \brief Terminate I2C communication module.
82* \return drx_status_t Return status. 82* \return drx_status_t Return status.
@@ -85,7 +85,7 @@ Exported FUNCTIONS
85*/ 85*/
86 drx_status_t drxbsp_i2c_term(void); 86 drx_status_t drxbsp_i2c_term(void);
87 87
88/** 88/*
89* \fn drx_status_t drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr, 89* \fn drx_status_t drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr,
90* u16 w_count, 90* u16 w_count,
91* u8 *wData, 91* u8 *wData,
@@ -121,7 +121,7 @@ Exported FUNCTIONS
121 struct i2c_device_addr *r_dev_addr, 121 struct i2c_device_addr *r_dev_addr,
122 u16 r_count, u8 *r_data); 122 u16 r_count, u8 *r_data);
123 123
124/** 124/*
125* \fn drxbsp_i2c_error_text() 125* \fn drxbsp_i2c_error_text()
126* \brief Returns a human readable error. 126* \brief Returns a human readable error.
127* Counter part of numerical drx_i2c_error_g. 127* Counter part of numerical drx_i2c_error_g.
@@ -130,7 +130,7 @@ Exported FUNCTIONS
130*/ 130*/
131 char *drxbsp_i2c_error_text(void); 131 char *drxbsp_i2c_error_text(void);
132 132
133/** 133/*
134* \var drx_i2c_error_g; 134* \var drx_i2c_error_g;
135* \brief I2C specific error codes, platform dependent. 135* \brief I2C specific error codes, platform dependent.
136*/ 136*/
diff --git a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
index cd69e187ba7a..855685b6b386 100644
--- a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
+++ b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
@@ -46,7 +46,7 @@ struct i2c_device_addr {
46 void *user_data; /* User data pointer */ 46 void *user_data; /* User data pointer */
47}; 47};
48 48
49/** 49/*
50* \def IS_I2C_10BIT( addr ) 50* \def IS_I2C_10BIT( addr )
51* \brief Determine if I2C address 'addr' is a 10 bits address or not. 51* \brief Determine if I2C address 'addr' is a 10 bits address or not.
52* \param addr The I2C address. 52* \param addr The I2C address.
@@ -61,7 +61,7 @@ struct i2c_device_addr {
61Exported FUNCTIONS 61Exported FUNCTIONS
62------------------------------------------------------------------------------*/ 62------------------------------------------------------------------------------*/
63 63
64/** 64/*
65* \fn drxbsp_i2c_init() 65* \fn drxbsp_i2c_init()
66* \brief Initialize I2C communication module. 66* \brief Initialize I2C communication module.
67* \return int Return status. 67* \return int Return status.
@@ -70,7 +70,7 @@ Exported FUNCTIONS
70*/ 70*/
71int drxbsp_i2c_init(void); 71int drxbsp_i2c_init(void);
72 72
73/** 73/*
74* \fn drxbsp_i2c_term() 74* \fn drxbsp_i2c_term()
75* \brief Terminate I2C communication module. 75* \brief Terminate I2C communication module.
76* \return int Return status. 76* \return int Return status.
@@ -79,7 +79,7 @@ int drxbsp_i2c_init(void);
79*/ 79*/
80int drxbsp_i2c_term(void); 80int drxbsp_i2c_term(void);
81 81
82/** 82/*
83* \fn int drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr, 83* \fn int drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr,
84* u16 w_count, 84* u16 w_count,
85* u8 * wData, 85* u8 * wData,
@@ -115,7 +115,7 @@ int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
115 struct i2c_device_addr *r_dev_addr, 115 struct i2c_device_addr *r_dev_addr,
116 u16 r_count, u8 *r_data); 116 u16 r_count, u8 *r_data);
117 117
118/** 118/*
119* \fn drxbsp_i2c_error_text() 119* \fn drxbsp_i2c_error_text()
120* \brief Returns a human readable error. 120* \brief Returns a human readable error.
121* Counter part of numerical drx_i2c_error_g. 121* Counter part of numerical drx_i2c_error_g.
@@ -124,7 +124,7 @@ int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
124*/ 124*/
125char *drxbsp_i2c_error_text(void); 125char *drxbsp_i2c_error_text(void);
126 126
127/** 127/*
128* \var drx_i2c_error_g; 128* \var drx_i2c_error_g;
129* \brief I2C specific error codes, platform dependent. 129* \brief I2C specific error codes, platform dependent.
130*/ 130*/
@@ -241,13 +241,13 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
241 struct i2c_device_addr *r_dev_addr, 241 struct i2c_device_addr *r_dev_addr,
242 u16 r_count, u8 *r_data); 242 u16 r_count, u8 *r_data);
243 243
244/************** 244/*************
245* 245*
246* This section configures the DRX Data Access Protocols (DAPs). 246* This section configures the DRX Data Access Protocols (DAPs).
247* 247*
248**************/ 248**************/
249 249
250/** 250/*
251* \def DRXDAP_SINGLE_MASTER 251* \def DRXDAP_SINGLE_MASTER
252* \brief Enable I2C single or I2C multimaster mode on host. 252* \brief Enable I2C single or I2C multimaster mode on host.
253* 253*
@@ -262,7 +262,7 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
262#define DRXDAP_SINGLE_MASTER 1 262#define DRXDAP_SINGLE_MASTER 1
263#endif 263#endif
264 264
265/** 265/*
266* \def DRXDAP_MAX_WCHUNKSIZE 266* \def DRXDAP_MAX_WCHUNKSIZE
267* \brief Defines maximum chunksize of an i2c write action by host. 267* \brief Defines maximum chunksize of an i2c write action by host.
268* 268*
@@ -282,7 +282,7 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
282#define DRXDAP_MAX_WCHUNKSIZE 60 282#define DRXDAP_MAX_WCHUNKSIZE 60
283#endif 283#endif
284 284
285/** 285/*
286* \def DRXDAP_MAX_RCHUNKSIZE 286* \def DRXDAP_MAX_RCHUNKSIZE
287* \brief Defines maximum chunksize of an i2c read action by host. 287* \brief Defines maximum chunksize of an i2c read action by host.
288* 288*
@@ -297,13 +297,13 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
297#define DRXDAP_MAX_RCHUNKSIZE 60 297#define DRXDAP_MAX_RCHUNKSIZE 60
298#endif 298#endif
299 299
300/************** 300/*************
301* 301*
302* This section describes drxdriver defines. 302* This section describes drxdriver defines.
303* 303*
304**************/ 304**************/
305 305
306/** 306/*
307* \def DRX_UNKNOWN 307* \def DRX_UNKNOWN
308* \brief Generic UNKNOWN value for DRX enumerated types. 308* \brief Generic UNKNOWN value for DRX enumerated types.
309* 309*
@@ -313,7 +313,7 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
313#define DRX_UNKNOWN (254) 313#define DRX_UNKNOWN (254)
314#endif 314#endif
315 315
316/** 316/*
317* \def DRX_AUTO 317* \def DRX_AUTO
318* \brief Generic AUTO value for DRX enumerated types. 318* \brief Generic AUTO value for DRX enumerated types.
319* 319*
@@ -324,104 +324,104 @@ int drxbsp_tuner_default_i2c_write_read(struct tuner_instance *tuner,
324#define DRX_AUTO (255) 324#define DRX_AUTO (255)
325#endif 325#endif
326 326
327/************** 327/*************
328* 328*
329* This section describes flag definitions for the device capbilities. 329* This section describes flag definitions for the device capbilities.
330* 330*
331**************/ 331**************/
332 332
333/** 333/*
334* \brief LNA capability flag 334* \brief LNA capability flag
335* 335*
336* Device has a Low Noise Amplifier 336* Device has a Low Noise Amplifier
337* 337*
338*/ 338*/
339#define DRX_CAPABILITY_HAS_LNA (1UL << 0) 339#define DRX_CAPABILITY_HAS_LNA (1UL << 0)
340/** 340/*
341* \brief OOB-RX capability flag 341* \brief OOB-RX capability flag
342* 342*
343* Device has OOB-RX 343* Device has OOB-RX
344* 344*
345*/ 345*/
346#define DRX_CAPABILITY_HAS_OOBRX (1UL << 1) 346#define DRX_CAPABILITY_HAS_OOBRX (1UL << 1)
347/** 347/*
348* \brief ATV capability flag 348* \brief ATV capability flag
349* 349*
350* Device has ATV 350* Device has ATV
351* 351*
352*/ 352*/
353#define DRX_CAPABILITY_HAS_ATV (1UL << 2) 353#define DRX_CAPABILITY_HAS_ATV (1UL << 2)
354/** 354/*
355* \brief DVB-T capability flag 355* \brief DVB-T capability flag
356* 356*
357* Device has DVB-T 357* Device has DVB-T
358* 358*
359*/ 359*/
360#define DRX_CAPABILITY_HAS_DVBT (1UL << 3) 360#define DRX_CAPABILITY_HAS_DVBT (1UL << 3)
361/** 361/*
362* \brief ITU-B capability flag 362* \brief ITU-B capability flag
363* 363*
364* Device has ITU-B 364* Device has ITU-B
365* 365*
366*/ 366*/
367#define DRX_CAPABILITY_HAS_ITUB (1UL << 4) 367#define DRX_CAPABILITY_HAS_ITUB (1UL << 4)
368/** 368/*
369* \brief Audio capability flag 369* \brief Audio capability flag
370* 370*
371* Device has Audio 371* Device has Audio
372* 372*
373*/ 373*/
374#define DRX_CAPABILITY_HAS_AUD (1UL << 5) 374#define DRX_CAPABILITY_HAS_AUD (1UL << 5)
375/** 375/*
376* \brief SAW switch capability flag 376* \brief SAW switch capability flag
377* 377*
378* Device has SAW switch 378* Device has SAW switch
379* 379*
380*/ 380*/
381#define DRX_CAPABILITY_HAS_SAWSW (1UL << 6) 381#define DRX_CAPABILITY_HAS_SAWSW (1UL << 6)
382/** 382/*
383* \brief GPIO1 capability flag 383* \brief GPIO1 capability flag
384* 384*
385* Device has GPIO1 385* Device has GPIO1
386* 386*
387*/ 387*/
388#define DRX_CAPABILITY_HAS_GPIO1 (1UL << 7) 388#define DRX_CAPABILITY_HAS_GPIO1 (1UL << 7)
389/** 389/*
390* \brief GPIO2 capability flag 390* \brief GPIO2 capability flag
391* 391*
392* Device has GPIO2 392* Device has GPIO2
393* 393*
394*/ 394*/
395#define DRX_CAPABILITY_HAS_GPIO2 (1UL << 8) 395#define DRX_CAPABILITY_HAS_GPIO2 (1UL << 8)
396/** 396/*
397* \brief IRQN capability flag 397* \brief IRQN capability flag
398* 398*
399* Device has IRQN 399* Device has IRQN
400* 400*
401*/ 401*/
402#define DRX_CAPABILITY_HAS_IRQN (1UL << 9) 402#define DRX_CAPABILITY_HAS_IRQN (1UL << 9)
403/** 403/*
404* \brief 8VSB capability flag 404* \brief 8VSB capability flag
405* 405*
406* Device has 8VSB 406* Device has 8VSB
407* 407*
408*/ 408*/
409#define DRX_CAPABILITY_HAS_8VSB (1UL << 10) 409#define DRX_CAPABILITY_HAS_8VSB (1UL << 10)
410/** 410/*
411* \brief SMA-TX capability flag 411* \brief SMA-TX capability flag
412* 412*
413* Device has SMATX 413* Device has SMATX
414* 414*
415*/ 415*/
416#define DRX_CAPABILITY_HAS_SMATX (1UL << 11) 416#define DRX_CAPABILITY_HAS_SMATX (1UL << 11)
417/** 417/*
418* \brief SMA-RX capability flag 418* \brief SMA-RX capability flag
419* 419*
420* Device has SMARX 420* Device has SMARX
421* 421*
422*/ 422*/
423#define DRX_CAPABILITY_HAS_SMARX (1UL << 12) 423#define DRX_CAPABILITY_HAS_SMARX (1UL << 12)
424/** 424/*
425* \brief ITU-A/C capability flag 425* \brief ITU-A/C capability flag
426* 426*
427* Device has ITU-A/C 427* Device has ITU-A/C
@@ -439,7 +439,7 @@ MACROS
439 DRX_VERSIONSTRING_HELP(PATCH) 439 DRX_VERSIONSTRING_HELP(PATCH)
440#define DRX_VERSIONSTRING_HELP(NUM) #NUM 440#define DRX_VERSIONSTRING_HELP(NUM) #NUM
441 441
442/** 442/*
443* \brief Macro to create byte array elements from 16 bit integers. 443* \brief Macro to create byte array elements from 16 bit integers.
444* This macro is used to create byte arrays for block writes. 444* This macro is used to create byte arrays for block writes.
445* Block writes speed up I2C traffic between host and demod. 445* Block writes speed up I2C traffic between host and demod.
@@ -449,7 +449,7 @@ MACROS
449#define DRX_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ 449#define DRX_16TO8(x) ((u8) (((u16)x) & 0xFF)), \
450 ((u8)((((u16)x)>>8)&0xFF)) 450 ((u8)((((u16)x)>>8)&0xFF))
451 451
452/** 452/*
453* \brief Macro to convert 16 bit register value to a s32 453* \brief Macro to convert 16 bit register value to a s32
454*/ 454*/
455#define DRX_U16TODRXFREQ(x) ((x & 0x8000) ? \ 455#define DRX_U16TODRXFREQ(x) ((x & 0x8000) ? \
@@ -461,191 +461,191 @@ MACROS
461ENUM 461ENUM
462-------------------------------------------------------------------------*/ 462-------------------------------------------------------------------------*/
463 463
464/** 464/*
465* \enum enum drx_standard 465* \enum enum drx_standard
466* \brief Modulation standards. 466* \brief Modulation standards.
467*/ 467*/
468enum drx_standard { 468enum drx_standard {
469 DRX_STANDARD_DVBT = 0, /**< Terrestrial DVB-T. */ 469 DRX_STANDARD_DVBT = 0, /*< Terrestrial DVB-T. */
470 DRX_STANDARD_8VSB, /**< Terrestrial 8VSB. */ 470 DRX_STANDARD_8VSB, /*< Terrestrial 8VSB. */
471 DRX_STANDARD_NTSC, /**< Terrestrial\Cable analog NTSC. */ 471 DRX_STANDARD_NTSC, /*< Terrestrial\Cable analog NTSC. */
472 DRX_STANDARD_PAL_SECAM_BG, 472 DRX_STANDARD_PAL_SECAM_BG,
473 /**< Terrestrial analog PAL/SECAM B/G */ 473 /*< Terrestrial analog PAL/SECAM B/G */
474 DRX_STANDARD_PAL_SECAM_DK, 474 DRX_STANDARD_PAL_SECAM_DK,
475 /**< Terrestrial analog PAL/SECAM D/K */ 475 /*< Terrestrial analog PAL/SECAM D/K */
476 DRX_STANDARD_PAL_SECAM_I, 476 DRX_STANDARD_PAL_SECAM_I,
477 /**< Terrestrial analog PAL/SECAM I */ 477 /*< Terrestrial analog PAL/SECAM I */
478 DRX_STANDARD_PAL_SECAM_L, 478 DRX_STANDARD_PAL_SECAM_L,
479 /**< Terrestrial analog PAL/SECAM L 479 /*< Terrestrial analog PAL/SECAM L
480 with negative modulation */ 480 with negative modulation */
481 DRX_STANDARD_PAL_SECAM_LP, 481 DRX_STANDARD_PAL_SECAM_LP,
482 /**< Terrestrial analog PAL/SECAM L 482 /*< Terrestrial analog PAL/SECAM L
483 with positive modulation */ 483 with positive modulation */
484 DRX_STANDARD_ITU_A, /**< Cable ITU ANNEX A. */ 484 DRX_STANDARD_ITU_A, /*< Cable ITU ANNEX A. */
485 DRX_STANDARD_ITU_B, /**< Cable ITU ANNEX B. */ 485 DRX_STANDARD_ITU_B, /*< Cable ITU ANNEX B. */
486 DRX_STANDARD_ITU_C, /**< Cable ITU ANNEX C. */ 486 DRX_STANDARD_ITU_C, /*< Cable ITU ANNEX C. */
487 DRX_STANDARD_ITU_D, /**< Cable ITU ANNEX D. */ 487 DRX_STANDARD_ITU_D, /*< Cable ITU ANNEX D. */
488 DRX_STANDARD_FM, /**< Terrestrial\Cable FM radio */ 488 DRX_STANDARD_FM, /*< Terrestrial\Cable FM radio */
489 DRX_STANDARD_DTMB, /**< Terrestrial DTMB standard (China)*/ 489 DRX_STANDARD_DTMB, /*< Terrestrial DTMB standard (China)*/
490 DRX_STANDARD_UNKNOWN = DRX_UNKNOWN, 490 DRX_STANDARD_UNKNOWN = DRX_UNKNOWN,
491 /**< Standard unknown. */ 491 /*< Standard unknown. */
492 DRX_STANDARD_AUTO = DRX_AUTO 492 DRX_STANDARD_AUTO = DRX_AUTO
493 /**< Autodetect standard. */ 493 /*< Autodetect standard. */
494}; 494};
495 495
496/** 496/*
497* \enum enum drx_standard 497* \enum enum drx_standard
498* \brief Modulation sub-standards. 498* \brief Modulation sub-standards.
499*/ 499*/
500enum drx_substandard { 500enum drx_substandard {
501 DRX_SUBSTANDARD_MAIN = 0, /**< Main subvariant of standard */ 501 DRX_SUBSTANDARD_MAIN = 0, /*< Main subvariant of standard */
502 DRX_SUBSTANDARD_ATV_BG_SCANDINAVIA, 502 DRX_SUBSTANDARD_ATV_BG_SCANDINAVIA,
503 DRX_SUBSTANDARD_ATV_DK_POLAND, 503 DRX_SUBSTANDARD_ATV_DK_POLAND,
504 DRX_SUBSTANDARD_ATV_DK_CHINA, 504 DRX_SUBSTANDARD_ATV_DK_CHINA,
505 DRX_SUBSTANDARD_UNKNOWN = DRX_UNKNOWN, 505 DRX_SUBSTANDARD_UNKNOWN = DRX_UNKNOWN,
506 /**< Sub-standard unknown. */ 506 /*< Sub-standard unknown. */
507 DRX_SUBSTANDARD_AUTO = DRX_AUTO 507 DRX_SUBSTANDARD_AUTO = DRX_AUTO
508 /**< Auto (default) sub-standard */ 508 /*< Auto (default) sub-standard */
509}; 509};
510 510
511/** 511/*
512* \enum enum drx_bandwidth 512* \enum enum drx_bandwidth
513* \brief Channel bandwidth or channel spacing. 513* \brief Channel bandwidth or channel spacing.
514*/ 514*/
515enum drx_bandwidth { 515enum drx_bandwidth {
516 DRX_BANDWIDTH_8MHZ = 0, /**< Bandwidth 8 MHz. */ 516 DRX_BANDWIDTH_8MHZ = 0, /*< Bandwidth 8 MHz. */
517 DRX_BANDWIDTH_7MHZ, /**< Bandwidth 7 MHz. */ 517 DRX_BANDWIDTH_7MHZ, /*< Bandwidth 7 MHz. */
518 DRX_BANDWIDTH_6MHZ, /**< Bandwidth 6 MHz. */ 518 DRX_BANDWIDTH_6MHZ, /*< Bandwidth 6 MHz. */
519 DRX_BANDWIDTH_UNKNOWN = DRX_UNKNOWN, 519 DRX_BANDWIDTH_UNKNOWN = DRX_UNKNOWN,
520 /**< Bandwidth unknown. */ 520 /*< Bandwidth unknown. */
521 DRX_BANDWIDTH_AUTO = DRX_AUTO 521 DRX_BANDWIDTH_AUTO = DRX_AUTO
522 /**< Auto Set Bandwidth */ 522 /*< Auto Set Bandwidth */
523}; 523};
524 524
525/** 525/*
526* \enum enum drx_mirror 526* \enum enum drx_mirror
527* \brief Indicate if channel spectrum is mirrored or not. 527* \brief Indicate if channel spectrum is mirrored or not.
528*/ 528*/
529enum drx_mirror { 529enum drx_mirror {
530 DRX_MIRROR_NO = 0, /**< Spectrum is not mirrored. */ 530 DRX_MIRROR_NO = 0, /*< Spectrum is not mirrored. */
531 DRX_MIRROR_YES, /**< Spectrum is mirrored. */ 531 DRX_MIRROR_YES, /*< Spectrum is mirrored. */
532 DRX_MIRROR_UNKNOWN = DRX_UNKNOWN, 532 DRX_MIRROR_UNKNOWN = DRX_UNKNOWN,
533 /**< Unknown if spectrum is mirrored. */ 533 /*< Unknown if spectrum is mirrored. */
534 DRX_MIRROR_AUTO = DRX_AUTO 534 DRX_MIRROR_AUTO = DRX_AUTO
535 /**< Autodetect if spectrum is mirrored. */ 535 /*< Autodetect if spectrum is mirrored. */
536}; 536};
537 537
538/** 538/*
539* \enum enum drx_modulation 539* \enum enum drx_modulation
540* \brief Constellation type of the channel. 540* \brief Constellation type of the channel.
541*/ 541*/
542enum drx_modulation { 542enum drx_modulation {
543 DRX_CONSTELLATION_BPSK = 0, /**< Modulation is BPSK. */ 543 DRX_CONSTELLATION_BPSK = 0, /*< Modulation is BPSK. */
544 DRX_CONSTELLATION_QPSK, /**< Constellation is QPSK. */ 544 DRX_CONSTELLATION_QPSK, /*< Constellation is QPSK. */
545 DRX_CONSTELLATION_PSK8, /**< Constellation is PSK8. */ 545 DRX_CONSTELLATION_PSK8, /*< Constellation is PSK8. */
546 DRX_CONSTELLATION_QAM16, /**< Constellation is QAM16. */ 546 DRX_CONSTELLATION_QAM16, /*< Constellation is QAM16. */
547 DRX_CONSTELLATION_QAM32, /**< Constellation is QAM32. */ 547 DRX_CONSTELLATION_QAM32, /*< Constellation is QAM32. */
548 DRX_CONSTELLATION_QAM64, /**< Constellation is QAM64. */ 548 DRX_CONSTELLATION_QAM64, /*< Constellation is QAM64. */
549 DRX_CONSTELLATION_QAM128, /**< Constellation is QAM128. */ 549 DRX_CONSTELLATION_QAM128, /*< Constellation is QAM128. */
550 DRX_CONSTELLATION_QAM256, /**< Constellation is QAM256. */ 550 DRX_CONSTELLATION_QAM256, /*< Constellation is QAM256. */
551 DRX_CONSTELLATION_QAM512, /**< Constellation is QAM512. */ 551 DRX_CONSTELLATION_QAM512, /*< Constellation is QAM512. */
552 DRX_CONSTELLATION_QAM1024, /**< Constellation is QAM1024. */ 552 DRX_CONSTELLATION_QAM1024, /*< Constellation is QAM1024. */
553 DRX_CONSTELLATION_QPSK_NR, /**< Constellation is QPSK_NR */ 553 DRX_CONSTELLATION_QPSK_NR, /*< Constellation is QPSK_NR */
554 DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN, 554 DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN,
555 /**< Constellation unknown. */ 555 /*< Constellation unknown. */
556 DRX_CONSTELLATION_AUTO = DRX_AUTO 556 DRX_CONSTELLATION_AUTO = DRX_AUTO
557 /**< Autodetect constellation. */ 557 /*< Autodetect constellation. */
558}; 558};
559 559
560/** 560/*
561* \enum enum drx_hierarchy 561* \enum enum drx_hierarchy
562* \brief Hierarchy of the channel. 562* \brief Hierarchy of the channel.
563*/ 563*/
564enum drx_hierarchy { 564enum drx_hierarchy {
565 DRX_HIERARCHY_NONE = 0, /**< None hierarchical channel. */ 565 DRX_HIERARCHY_NONE = 0, /*< None hierarchical channel. */
566 DRX_HIERARCHY_ALPHA1, /**< Hierarchical channel, alpha=1. */ 566 DRX_HIERARCHY_ALPHA1, /*< Hierarchical channel, alpha=1. */
567 DRX_HIERARCHY_ALPHA2, /**< Hierarchical channel, alpha=2. */ 567 DRX_HIERARCHY_ALPHA2, /*< Hierarchical channel, alpha=2. */
568 DRX_HIERARCHY_ALPHA4, /**< Hierarchical channel, alpha=4. */ 568 DRX_HIERARCHY_ALPHA4, /*< Hierarchical channel, alpha=4. */
569 DRX_HIERARCHY_UNKNOWN = DRX_UNKNOWN, 569 DRX_HIERARCHY_UNKNOWN = DRX_UNKNOWN,
570 /**< Hierarchy unknown. */ 570 /*< Hierarchy unknown. */
571 DRX_HIERARCHY_AUTO = DRX_AUTO 571 DRX_HIERARCHY_AUTO = DRX_AUTO
572 /**< Autodetect hierarchy. */ 572 /*< Autodetect hierarchy. */
573}; 573};
574 574
575/** 575/*
576* \enum enum drx_priority 576* \enum enum drx_priority
577* \brief Channel priority in case of hierarchical transmission. 577* \brief Channel priority in case of hierarchical transmission.
578*/ 578*/
579enum drx_priority { 579enum drx_priority {
580 DRX_PRIORITY_LOW = 0, /**< Low priority channel. */ 580 DRX_PRIORITY_LOW = 0, /*< Low priority channel. */
581 DRX_PRIORITY_HIGH, /**< High priority channel. */ 581 DRX_PRIORITY_HIGH, /*< High priority channel. */
582 DRX_PRIORITY_UNKNOWN = DRX_UNKNOWN 582 DRX_PRIORITY_UNKNOWN = DRX_UNKNOWN
583 /**< Priority unknown. */ 583 /*< Priority unknown. */
584}; 584};
585 585
586/** 586/*
587* \enum enum drx_coderate 587* \enum enum drx_coderate
588* \brief Channel priority in case of hierarchical transmission. 588* \brief Channel priority in case of hierarchical transmission.
589*/ 589*/
590enum drx_coderate { 590enum drx_coderate {
591 DRX_CODERATE_1DIV2 = 0, /**< Code rate 1/2nd. */ 591 DRX_CODERATE_1DIV2 = 0, /*< Code rate 1/2nd. */
592 DRX_CODERATE_2DIV3, /**< Code rate 2/3nd. */ 592 DRX_CODERATE_2DIV3, /*< Code rate 2/3nd. */
593 DRX_CODERATE_3DIV4, /**< Code rate 3/4nd. */ 593 DRX_CODERATE_3DIV4, /*< Code rate 3/4nd. */
594 DRX_CODERATE_5DIV6, /**< Code rate 5/6nd. */ 594 DRX_CODERATE_5DIV6, /*< Code rate 5/6nd. */
595 DRX_CODERATE_7DIV8, /**< Code rate 7/8nd. */ 595 DRX_CODERATE_7DIV8, /*< Code rate 7/8nd. */
596 DRX_CODERATE_UNKNOWN = DRX_UNKNOWN, 596 DRX_CODERATE_UNKNOWN = DRX_UNKNOWN,
597 /**< Code rate unknown. */ 597 /*< Code rate unknown. */
598 DRX_CODERATE_AUTO = DRX_AUTO 598 DRX_CODERATE_AUTO = DRX_AUTO
599 /**< Autodetect code rate. */ 599 /*< Autodetect code rate. */
600}; 600};
601 601
602/** 602/*
603* \enum enum drx_guard 603* \enum enum drx_guard
604* \brief Guard interval of a channel. 604* \brief Guard interval of a channel.
605*/ 605*/
606enum drx_guard { 606enum drx_guard {
607 DRX_GUARD_1DIV32 = 0, /**< Guard interval 1/32nd. */ 607 DRX_GUARD_1DIV32 = 0, /*< Guard interval 1/32nd. */
608 DRX_GUARD_1DIV16, /**< Guard interval 1/16th. */ 608 DRX_GUARD_1DIV16, /*< Guard interval 1/16th. */
609 DRX_GUARD_1DIV8, /**< Guard interval 1/8th. */ 609 DRX_GUARD_1DIV8, /*< Guard interval 1/8th. */
610 DRX_GUARD_1DIV4, /**< Guard interval 1/4th. */ 610 DRX_GUARD_1DIV4, /*< Guard interval 1/4th. */
611 DRX_GUARD_UNKNOWN = DRX_UNKNOWN, 611 DRX_GUARD_UNKNOWN = DRX_UNKNOWN,
612 /**< Guard interval unknown. */ 612 /*< Guard interval unknown. */
613 DRX_GUARD_AUTO = DRX_AUTO 613 DRX_GUARD_AUTO = DRX_AUTO
614 /**< Autodetect guard interval. */ 614 /*< Autodetect guard interval. */
615}; 615};
616 616
617/** 617/*
618* \enum enum drx_fft_mode 618* \enum enum drx_fft_mode
619* \brief FFT mode. 619* \brief FFT mode.
620*/ 620*/
621enum drx_fft_mode { 621enum drx_fft_mode {
622 DRX_FFTMODE_2K = 0, /**< 2K FFT mode. */ 622 DRX_FFTMODE_2K = 0, /*< 2K FFT mode. */
623 DRX_FFTMODE_4K, /**< 4K FFT mode. */ 623 DRX_FFTMODE_4K, /*< 4K FFT mode. */
624 DRX_FFTMODE_8K, /**< 8K FFT mode. */ 624 DRX_FFTMODE_8K, /*< 8K FFT mode. */
625 DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN, 625 DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN,
626 /**< FFT mode unknown. */ 626 /*< FFT mode unknown. */
627 DRX_FFTMODE_AUTO = DRX_AUTO 627 DRX_FFTMODE_AUTO = DRX_AUTO
628 /**< Autodetect FFT mode. */ 628 /*< Autodetect FFT mode. */
629}; 629};
630 630
631/** 631/*
632* \enum enum drx_classification 632* \enum enum drx_classification
633* \brief Channel classification. 633* \brief Channel classification.
634*/ 634*/
635enum drx_classification { 635enum drx_classification {
636 DRX_CLASSIFICATION_GAUSS = 0, /**< Gaussion noise. */ 636 DRX_CLASSIFICATION_GAUSS = 0, /*< Gaussion noise. */
637 DRX_CLASSIFICATION_HVY_GAUSS, /**< Heavy Gaussion noise. */ 637 DRX_CLASSIFICATION_HVY_GAUSS, /*< Heavy Gaussion noise. */
638 DRX_CLASSIFICATION_COCHANNEL, /**< Co-channel. */ 638 DRX_CLASSIFICATION_COCHANNEL, /*< Co-channel. */
639 DRX_CLASSIFICATION_STATIC, /**< Static echo. */ 639 DRX_CLASSIFICATION_STATIC, /*< Static echo. */
640 DRX_CLASSIFICATION_MOVING, /**< Moving echo. */ 640 DRX_CLASSIFICATION_MOVING, /*< Moving echo. */
641 DRX_CLASSIFICATION_ZERODB, /**< Zero dB echo. */ 641 DRX_CLASSIFICATION_ZERODB, /*< Zero dB echo. */
642 DRX_CLASSIFICATION_UNKNOWN = DRX_UNKNOWN, 642 DRX_CLASSIFICATION_UNKNOWN = DRX_UNKNOWN,
643 /**< Unknown classification */ 643 /*< Unknown classification */
644 DRX_CLASSIFICATION_AUTO = DRX_AUTO 644 DRX_CLASSIFICATION_AUTO = DRX_AUTO
645 /**< Autodetect classification. */ 645 /*< Autodetect classification. */
646}; 646};
647 647
648/** 648/*
649* /enum enum drx_interleave_mode 649* /enum enum drx_interleave_mode
650* /brief Interleave modes 650* /brief Interleave modes
651*/ 651*/
@@ -673,80 +673,80 @@ enum drx_interleave_mode {
673 DRX_INTERLEAVEMODE_B52_M48, 673 DRX_INTERLEAVEMODE_B52_M48,
674 DRX_INTERLEAVEMODE_B52_M0, 674 DRX_INTERLEAVEMODE_B52_M0,
675 DRX_INTERLEAVEMODE_UNKNOWN = DRX_UNKNOWN, 675 DRX_INTERLEAVEMODE_UNKNOWN = DRX_UNKNOWN,
676 /**< Unknown interleave mode */ 676 /*< Unknown interleave mode */
677 DRX_INTERLEAVEMODE_AUTO = DRX_AUTO 677 DRX_INTERLEAVEMODE_AUTO = DRX_AUTO
678 /**< Autodetect interleave mode */ 678 /*< Autodetect interleave mode */
679}; 679};
680 680
681/** 681/*
682* \enum enum drx_carrier_mode 682* \enum enum drx_carrier_mode
683* \brief Channel Carrier Mode. 683* \brief Channel Carrier Mode.
684*/ 684*/
685enum drx_carrier_mode { 685enum drx_carrier_mode {
686 DRX_CARRIER_MULTI = 0, /**< Multi carrier mode */ 686 DRX_CARRIER_MULTI = 0, /*< Multi carrier mode */
687 DRX_CARRIER_SINGLE, /**< Single carrier mode */ 687 DRX_CARRIER_SINGLE, /*< Single carrier mode */
688 DRX_CARRIER_UNKNOWN = DRX_UNKNOWN, 688 DRX_CARRIER_UNKNOWN = DRX_UNKNOWN,
689 /**< Carrier mode unknown. */ 689 /*< Carrier mode unknown. */
690 DRX_CARRIER_AUTO = DRX_AUTO /**< Autodetect carrier mode */ 690 DRX_CARRIER_AUTO = DRX_AUTO /*< Autodetect carrier mode */
691}; 691};
692 692
693/** 693/*
694* \enum enum drx_frame_mode 694* \enum enum drx_frame_mode
695* \brief Channel Frame Mode. 695* \brief Channel Frame Mode.
696*/ 696*/
697enum drx_frame_mode { 697enum drx_frame_mode {
698 DRX_FRAMEMODE_420 = 0, /**< 420 with variable PN */ 698 DRX_FRAMEMODE_420 = 0, /*< 420 with variable PN */
699 DRX_FRAMEMODE_595, /**< 595 */ 699 DRX_FRAMEMODE_595, /*< 595 */
700 DRX_FRAMEMODE_945, /**< 945 with variable PN */ 700 DRX_FRAMEMODE_945, /*< 945 with variable PN */
701 DRX_FRAMEMODE_420_FIXED_PN, 701 DRX_FRAMEMODE_420_FIXED_PN,
702 /**< 420 with fixed PN */ 702 /*< 420 with fixed PN */
703 DRX_FRAMEMODE_945_FIXED_PN, 703 DRX_FRAMEMODE_945_FIXED_PN,
704 /**< 945 with fixed PN */ 704 /*< 945 with fixed PN */
705 DRX_FRAMEMODE_UNKNOWN = DRX_UNKNOWN, 705 DRX_FRAMEMODE_UNKNOWN = DRX_UNKNOWN,
706 /**< Frame mode unknown. */ 706 /*< Frame mode unknown. */
707 DRX_FRAMEMODE_AUTO = DRX_AUTO 707 DRX_FRAMEMODE_AUTO = DRX_AUTO
708 /**< Autodetect frame mode */ 708 /*< Autodetect frame mode */
709}; 709};
710 710
711/** 711/*
712* \enum enum drx_tps_frame 712* \enum enum drx_tps_frame
713* \brief Frame number in current super-frame. 713* \brief Frame number in current super-frame.
714*/ 714*/
715enum drx_tps_frame { 715enum drx_tps_frame {
716 DRX_TPS_FRAME1 = 0, /**< TPS frame 1. */ 716 DRX_TPS_FRAME1 = 0, /*< TPS frame 1. */
717 DRX_TPS_FRAME2, /**< TPS frame 2. */ 717 DRX_TPS_FRAME2, /*< TPS frame 2. */
718 DRX_TPS_FRAME3, /**< TPS frame 3. */ 718 DRX_TPS_FRAME3, /*< TPS frame 3. */
719 DRX_TPS_FRAME4, /**< TPS frame 4. */ 719 DRX_TPS_FRAME4, /*< TPS frame 4. */
720 DRX_TPS_FRAME_UNKNOWN = DRX_UNKNOWN 720 DRX_TPS_FRAME_UNKNOWN = DRX_UNKNOWN
721 /**< TPS frame unknown. */ 721 /*< TPS frame unknown. */
722}; 722};
723 723
724/** 724/*
725* \enum enum drx_ldpc 725* \enum enum drx_ldpc
726* \brief TPS LDPC . 726* \brief TPS LDPC .
727*/ 727*/
728enum drx_ldpc { 728enum drx_ldpc {
729 DRX_LDPC_0_4 = 0, /**< LDPC 0.4 */ 729 DRX_LDPC_0_4 = 0, /*< LDPC 0.4 */
730 DRX_LDPC_0_6, /**< LDPC 0.6 */ 730 DRX_LDPC_0_6, /*< LDPC 0.6 */
731 DRX_LDPC_0_8, /**< LDPC 0.8 */ 731 DRX_LDPC_0_8, /*< LDPC 0.8 */
732 DRX_LDPC_UNKNOWN = DRX_UNKNOWN, 732 DRX_LDPC_UNKNOWN = DRX_UNKNOWN,
733 /**< LDPC unknown. */ 733 /*< LDPC unknown. */
734 DRX_LDPC_AUTO = DRX_AUTO /**< Autodetect LDPC */ 734 DRX_LDPC_AUTO = DRX_AUTO /*< Autodetect LDPC */
735}; 735};
736 736
737/** 737/*
738* \enum enum drx_pilot_mode 738* \enum enum drx_pilot_mode
739* \brief Pilot modes in DTMB. 739* \brief Pilot modes in DTMB.
740*/ 740*/
741enum drx_pilot_mode { 741enum drx_pilot_mode {
742 DRX_PILOT_ON = 0, /**< Pilot On */ 742 DRX_PILOT_ON = 0, /*< Pilot On */
743 DRX_PILOT_OFF, /**< Pilot Off */ 743 DRX_PILOT_OFF, /*< Pilot Off */
744 DRX_PILOT_UNKNOWN = DRX_UNKNOWN, 744 DRX_PILOT_UNKNOWN = DRX_UNKNOWN,
745 /**< Pilot unknown. */ 745 /*< Pilot unknown. */
746 DRX_PILOT_AUTO = DRX_AUTO /**< Autodetect Pilot */ 746 DRX_PILOT_AUTO = DRX_AUTO /*< Autodetect Pilot */
747}; 747};
748 748
749/** 749/*
750 * enum drxu_code_action - indicate if firmware has to be uploaded or verified. 750 * enum drxu_code_action - indicate if firmware has to be uploaded or verified.
751 * @UCODE_UPLOAD: Upload the microcode image to device 751 * @UCODE_UPLOAD: Upload the microcode image to device
752 * @UCODE_VERIFY: Compare microcode image with code on device 752 * @UCODE_VERIFY: Compare microcode image with code on device
@@ -756,7 +756,7 @@ enum drxu_code_action {
756 UCODE_VERIFY 756 UCODE_VERIFY
757}; 757};
758 758
759/** 759/*
760* \enum enum drx_lock_status * \brief Used to reflect current lock status of demodulator. 760* \enum enum drx_lock_status * \brief Used to reflect current lock status of demodulator.
761* 761*
762* The generic lock states have device dependent semantics. 762* The generic lock states have device dependent semantics.
@@ -801,7 +801,7 @@ enum drx_lock_status {
801 DRX_LOCKED 801 DRX_LOCKED
802}; 802};
803 803
804/** 804/*
805* \enum enum drx_uio* \brief Used to address a User IO (UIO). 805* \enum enum drx_uio* \brief Used to address a User IO (UIO).
806*/ 806*/
807enum drx_uio { 807enum drx_uio {
@@ -840,7 +840,7 @@ enum drx_uio {
840 DRX_UIO_MAX = DRX_UIO32 840 DRX_UIO_MAX = DRX_UIO32
841}; 841};
842 842
843/** 843/*
844* \enum enum drxuio_mode * \brief Used to configure the modus oprandi of a UIO. 844* \enum enum drxuio_mode * \brief Used to configure the modus oprandi of a UIO.
845* 845*
846* DRX_UIO_MODE_FIRMWARE is an old uio mode. 846* DRX_UIO_MODE_FIRMWARE is an old uio mode.
@@ -850,37 +850,37 @@ enum drx_uio {
850*/ 850*/
851enum drxuio_mode { 851enum drxuio_mode {
852 DRX_UIO_MODE_DISABLE = 0x01, 852 DRX_UIO_MODE_DISABLE = 0x01,
853 /**< not used, pin is configured as input */ 853 /*< not used, pin is configured as input */
854 DRX_UIO_MODE_READWRITE = 0x02, 854 DRX_UIO_MODE_READWRITE = 0x02,
855 /**< used for read/write by application */ 855 /*< used for read/write by application */
856 DRX_UIO_MODE_FIRMWARE = 0x04, 856 DRX_UIO_MODE_FIRMWARE = 0x04,
857 /**< controlled by firmware, function 0 */ 857 /*< controlled by firmware, function 0 */
858 DRX_UIO_MODE_FIRMWARE0 = DRX_UIO_MODE_FIRMWARE, 858 DRX_UIO_MODE_FIRMWARE0 = DRX_UIO_MODE_FIRMWARE,
859 /**< same as above */ 859 /*< same as above */
860 DRX_UIO_MODE_FIRMWARE1 = 0x08, 860 DRX_UIO_MODE_FIRMWARE1 = 0x08,
861 /**< controlled by firmware, function 1 */ 861 /*< controlled by firmware, function 1 */
862 DRX_UIO_MODE_FIRMWARE2 = 0x10, 862 DRX_UIO_MODE_FIRMWARE2 = 0x10,
863 /**< controlled by firmware, function 2 */ 863 /*< controlled by firmware, function 2 */
864 DRX_UIO_MODE_FIRMWARE3 = 0x20, 864 DRX_UIO_MODE_FIRMWARE3 = 0x20,
865 /**< controlled by firmware, function 3 */ 865 /*< controlled by firmware, function 3 */
866 DRX_UIO_MODE_FIRMWARE4 = 0x40, 866 DRX_UIO_MODE_FIRMWARE4 = 0x40,
867 /**< controlled by firmware, function 4 */ 867 /*< controlled by firmware, function 4 */
868 DRX_UIO_MODE_FIRMWARE5 = 0x80 868 DRX_UIO_MODE_FIRMWARE5 = 0x80
869 /**< controlled by firmware, function 5 */ 869 /*< controlled by firmware, function 5 */
870}; 870};
871 871
872/** 872/*
873* \enum enum drxoob_downstream_standard * \brief Used to select OOB standard. 873* \enum enum drxoob_downstream_standard * \brief Used to select OOB standard.
874* 874*
875* Based on ANSI 55-1 and 55-2 875* Based on ANSI 55-1 and 55-2
876*/ 876*/
877enum drxoob_downstream_standard { 877enum drxoob_downstream_standard {
878 DRX_OOB_MODE_A = 0, 878 DRX_OOB_MODE_A = 0,
879 /**< ANSI 55-1 */ 879 /*< ANSI 55-1 */
880 DRX_OOB_MODE_B_GRADE_A, 880 DRX_OOB_MODE_B_GRADE_A,
881 /**< ANSI 55-2 A */ 881 /*< ANSI 55-2 A */
882 DRX_OOB_MODE_B_GRADE_B 882 DRX_OOB_MODE_B_GRADE_B
883 /**< ANSI 55-2 B */ 883 /*< ANSI 55-2 B */
884}; 884};
885 885
886/*------------------------------------------------------------------------- 886/*-------------------------------------------------------------------------
@@ -924,7 +924,7 @@ STRUCTS
924/*============================================================================*/ 924/*============================================================================*/
925/*============================================================================*/ 925/*============================================================================*/
926 926
927/** 927/*
928 * struct drxu_code_info Parameters for microcode upload and verfiy. 928 * struct drxu_code_info Parameters for microcode upload and verfiy.
929 * 929 *
930 * @mc_file: microcode file name 930 * @mc_file: microcode file name
@@ -935,7 +935,7 @@ struct drxu_code_info {
935 char *mc_file; 935 char *mc_file;
936}; 936};
937 937
938/** 938/*
939* \struct drx_mc_version_rec_t 939* \struct drx_mc_version_rec_t
940* \brief Microcode version record 940* \brief Microcode version record
941* Version numbers are stored in BCD format, as usual: 941* Version numbers are stored in BCD format, as usual:
@@ -963,7 +963,7 @@ struct drx_mc_version_rec {
963 963
964/*========================================*/ 964/*========================================*/
965 965
966/** 966/*
967* \struct drx_filter_info_t 967* \struct drx_filter_info_t
968* \brief Parameters for loading filter coefficients 968* \brief Parameters for loading filter coefficients
969* 969*
@@ -971,18 +971,18 @@ struct drx_mc_version_rec {
971*/ 971*/
972struct drx_filter_info { 972struct drx_filter_info {
973 u8 *data_re; 973 u8 *data_re;
974 /**< pointer to coefficients for RE */ 974 /*< pointer to coefficients for RE */
975 u8 *data_im; 975 u8 *data_im;
976 /**< pointer to coefficients for IM */ 976 /*< pointer to coefficients for IM */
977 u16 size_re; 977 u16 size_re;
978 /**< size of coefficients for RE */ 978 /*< size of coefficients for RE */
979 u16 size_im; 979 u16 size_im;
980 /**< size of coefficients for IM */ 980 /*< size of coefficients for IM */
981}; 981};
982 982
983/*========================================*/ 983/*========================================*/
984 984
985/** 985/*
986* \struct struct drx_channel * \brief The set of parameters describing a single channel. 986* \struct struct drx_channel * \brief The set of parameters describing a single channel.
987* 987*
988* Used by DRX_CTRL_SET_CHANNEL and DRX_CTRL_GET_CHANNEL. 988* Used by DRX_CTRL_SET_CHANNEL and DRX_CTRL_GET_CHANNEL.
@@ -991,29 +991,29 @@ struct drx_filter_info {
991*/ 991*/
992struct drx_channel { 992struct drx_channel {
993 s32 frequency; 993 s32 frequency;
994 /**< frequency in kHz */ 994 /*< frequency in kHz */
995 enum drx_bandwidth bandwidth; 995 enum drx_bandwidth bandwidth;
996 /**< bandwidth */ 996 /*< bandwidth */
997 enum drx_mirror mirror; /**< mirrored or not on RF */ 997 enum drx_mirror mirror; /*< mirrored or not on RF */
998 enum drx_modulation constellation; 998 enum drx_modulation constellation;
999 /**< constellation */ 999 /*< constellation */
1000 enum drx_hierarchy hierarchy; 1000 enum drx_hierarchy hierarchy;
1001 /**< hierarchy */ 1001 /*< hierarchy */
1002 enum drx_priority priority; /**< priority */ 1002 enum drx_priority priority; /*< priority */
1003 enum drx_coderate coderate; /**< coderate */ 1003 enum drx_coderate coderate; /*< coderate */
1004 enum drx_guard guard; /**< guard interval */ 1004 enum drx_guard guard; /*< guard interval */
1005 enum drx_fft_mode fftmode; /**< fftmode */ 1005 enum drx_fft_mode fftmode; /*< fftmode */
1006 enum drx_classification classification; 1006 enum drx_classification classification;
1007 /**< classification */ 1007 /*< classification */
1008 u32 symbolrate; 1008 u32 symbolrate;
1009 /**< symbolrate in symbols/sec */ 1009 /*< symbolrate in symbols/sec */
1010 enum drx_interleave_mode interleavemode; 1010 enum drx_interleave_mode interleavemode;
1011 /**< interleaveMode QAM */ 1011 /*< interleaveMode QAM */
1012 enum drx_ldpc ldpc; /**< ldpc */ 1012 enum drx_ldpc ldpc; /*< ldpc */
1013 enum drx_carrier_mode carrier; /**< carrier */ 1013 enum drx_carrier_mode carrier; /*< carrier */
1014 enum drx_frame_mode framemode; 1014 enum drx_frame_mode framemode;
1015 /**< frame mode */ 1015 /*< frame mode */
1016 enum drx_pilot_mode pilot; /**< pilot mode */ 1016 enum drx_pilot_mode pilot; /*< pilot mode */
1017}; 1017};
1018 1018
1019/*========================================*/ 1019/*========================================*/
@@ -1027,74 +1027,74 @@ enum drx_cfg_sqi_speed {
1027 1027
1028/*========================================*/ 1028/*========================================*/
1029 1029
1030/** 1030/*
1031* \struct struct drx_complex * A complex number. 1031* \struct struct drx_complex * A complex number.
1032* 1032*
1033* Used by DRX_CTRL_CONSTEL. 1033* Used by DRX_CTRL_CONSTEL.
1034*/ 1034*/
1035struct drx_complex { 1035struct drx_complex {
1036 s16 im; 1036 s16 im;
1037 /**< Imaginary part. */ 1037 /*< Imaginary part. */
1038 s16 re; 1038 s16 re;
1039 /**< Real part. */ 1039 /*< Real part. */
1040}; 1040};
1041 1041
1042/*========================================*/ 1042/*========================================*/
1043 1043
1044/** 1044/*
1045* \struct struct drx_frequency_plan * Array element of a frequency plan. 1045* \struct struct drx_frequency_plan * Array element of a frequency plan.
1046* 1046*
1047* Used by DRX_CTRL_SCAN_INIT. 1047* Used by DRX_CTRL_SCAN_INIT.
1048*/ 1048*/
1049struct drx_frequency_plan { 1049struct drx_frequency_plan {
1050 s32 first; 1050 s32 first;
1051 /**< First centre frequency in this band */ 1051 /*< First centre frequency in this band */
1052 s32 last; 1052 s32 last;
1053 /**< Last centre frequency in this band */ 1053 /*< Last centre frequency in this band */
1054 s32 step; 1054 s32 step;
1055 /**< Stepping frequency in this band */ 1055 /*< Stepping frequency in this band */
1056 enum drx_bandwidth bandwidth; 1056 enum drx_bandwidth bandwidth;
1057 /**< Bandwidth within this frequency band */ 1057 /*< Bandwidth within this frequency band */
1058 u16 ch_number; 1058 u16 ch_number;
1059 /**< First channel number in this band, or first 1059 /*< First channel number in this band, or first
1060 index in ch_names */ 1060 index in ch_names */
1061 char **ch_names; 1061 char **ch_names;
1062 /**< Optional list of channel names in this 1062 /*< Optional list of channel names in this
1063 band */ 1063 band */
1064}; 1064};
1065 1065
1066/*========================================*/ 1066/*========================================*/
1067 1067
1068/** 1068/*
1069* \struct struct drx_scan_param * Parameters for channel scan. 1069* \struct struct drx_scan_param * Parameters for channel scan.
1070* 1070*
1071* Used by DRX_CTRL_SCAN_INIT. 1071* Used by DRX_CTRL_SCAN_INIT.
1072*/ 1072*/
1073struct drx_scan_param { 1073struct drx_scan_param {
1074 struct drx_frequency_plan *frequency_plan; 1074 struct drx_frequency_plan *frequency_plan;
1075 /**< Frequency plan (array)*/ 1075 /*< Frequency plan (array)*/
1076 u16 frequency_plan_size; /**< Number of bands */ 1076 u16 frequency_plan_size; /*< Number of bands */
1077 u32 num_tries; /**< Max channels tried */ 1077 u32 num_tries; /*< Max channels tried */
1078 s32 skip; /**< Minimum frequency step to take 1078 s32 skip; /*< Minimum frequency step to take
1079 after a channel is found */ 1079 after a channel is found */
1080 void *ext_params; /**< Standard specific params */ 1080 void *ext_params; /*< Standard specific params */
1081}; 1081};
1082 1082
1083/*========================================*/ 1083/*========================================*/
1084 1084
1085/** 1085/*
1086* \brief Scan commands. 1086* \brief Scan commands.
1087* Used by scanning algorithms. 1087* Used by scanning algorithms.
1088*/ 1088*/
1089enum drx_scan_command { 1089enum drx_scan_command {
1090 DRX_SCAN_COMMAND_INIT = 0,/**< Initialize scanning */ 1090 DRX_SCAN_COMMAND_INIT = 0,/*< Initialize scanning */
1091 DRX_SCAN_COMMAND_NEXT, /**< Next scan */ 1091 DRX_SCAN_COMMAND_NEXT, /*< Next scan */
1092 DRX_SCAN_COMMAND_STOP /**< Stop scanning */ 1092 DRX_SCAN_COMMAND_STOP /*< Stop scanning */
1093}; 1093};
1094 1094
1095/*========================================*/ 1095/*========================================*/
1096 1096
1097/** 1097/*
1098* \brief Inner scan function prototype. 1098* \brief Inner scan function prototype.
1099*/ 1099*/
1100typedef int(*drx_scan_func_t) (void *scan_context, 1100typedef int(*drx_scan_func_t) (void *scan_context,
@@ -1104,77 +1104,77 @@ typedef int(*drx_scan_func_t) (void *scan_context,
1104 1104
1105/*========================================*/ 1105/*========================================*/
1106 1106
1107/** 1107/*
1108* \struct struct drxtps_info * TPS information, DVB-T specific. 1108* \struct struct drxtps_info * TPS information, DVB-T specific.
1109* 1109*
1110* Used by DRX_CTRL_TPS_INFO. 1110* Used by DRX_CTRL_TPS_INFO.
1111*/ 1111*/
1112 struct drxtps_info { 1112 struct drxtps_info {
1113 enum drx_fft_mode fftmode; /**< Fft mode */ 1113 enum drx_fft_mode fftmode; /*< Fft mode */
1114 enum drx_guard guard; /**< Guard interval */ 1114 enum drx_guard guard; /*< Guard interval */
1115 enum drx_modulation constellation; 1115 enum drx_modulation constellation;
1116 /**< Constellation */ 1116 /*< Constellation */
1117 enum drx_hierarchy hierarchy; 1117 enum drx_hierarchy hierarchy;
1118 /**< Hierarchy */ 1118 /*< Hierarchy */
1119 enum drx_coderate high_coderate; 1119 enum drx_coderate high_coderate;
1120 /**< High code rate */ 1120 /*< High code rate */
1121 enum drx_coderate low_coderate; 1121 enum drx_coderate low_coderate;
1122 /**< Low cod rate */ 1122 /*< Low cod rate */
1123 enum drx_tps_frame frame; /**< Tps frame */ 1123 enum drx_tps_frame frame; /*< Tps frame */
1124 u8 length; /**< Length */ 1124 u8 length; /*< Length */
1125 u16 cell_id; /**< Cell id */ 1125 u16 cell_id; /*< Cell id */
1126 }; 1126 };
1127 1127
1128/*========================================*/ 1128/*========================================*/
1129 1129
1130/** 1130/*
1131* \brief Power mode of device. 1131* \brief Power mode of device.
1132* 1132*
1133* Used by DRX_CTRL_SET_POWER_MODE. 1133* Used by DRX_CTRL_SET_POWER_MODE.
1134*/ 1134*/
1135 enum drx_power_mode { 1135 enum drx_power_mode {
1136 DRX_POWER_UP = 0, 1136 DRX_POWER_UP = 0,
1137 /**< Generic , Power Up Mode */ 1137 /*< Generic , Power Up Mode */
1138 DRX_POWER_MODE_1, 1138 DRX_POWER_MODE_1,
1139 /**< Device specific , Power Up Mode */ 1139 /*< Device specific , Power Up Mode */
1140 DRX_POWER_MODE_2, 1140 DRX_POWER_MODE_2,
1141 /**< Device specific , Power Up Mode */ 1141 /*< Device specific , Power Up Mode */
1142 DRX_POWER_MODE_3, 1142 DRX_POWER_MODE_3,
1143 /**< Device specific , Power Up Mode */ 1143 /*< Device specific , Power Up Mode */
1144 DRX_POWER_MODE_4, 1144 DRX_POWER_MODE_4,
1145 /**< Device specific , Power Up Mode */ 1145 /*< Device specific , Power Up Mode */
1146 DRX_POWER_MODE_5, 1146 DRX_POWER_MODE_5,
1147 /**< Device specific , Power Up Mode */ 1147 /*< Device specific , Power Up Mode */
1148 DRX_POWER_MODE_6, 1148 DRX_POWER_MODE_6,
1149 /**< Device specific , Power Up Mode */ 1149 /*< Device specific , Power Up Mode */
1150 DRX_POWER_MODE_7, 1150 DRX_POWER_MODE_7,
1151 /**< Device specific , Power Up Mode */ 1151 /*< Device specific , Power Up Mode */
1152 DRX_POWER_MODE_8, 1152 DRX_POWER_MODE_8,
1153 /**< Device specific , Power Up Mode */ 1153 /*< Device specific , Power Up Mode */
1154 1154
1155 DRX_POWER_MODE_9, 1155 DRX_POWER_MODE_9,
1156 /**< Device specific , Power Down Mode */ 1156 /*< Device specific , Power Down Mode */
1157 DRX_POWER_MODE_10, 1157 DRX_POWER_MODE_10,
1158 /**< Device specific , Power Down Mode */ 1158 /*< Device specific , Power Down Mode */
1159 DRX_POWER_MODE_11, 1159 DRX_POWER_MODE_11,
1160 /**< Device specific , Power Down Mode */ 1160 /*< Device specific , Power Down Mode */
1161 DRX_POWER_MODE_12, 1161 DRX_POWER_MODE_12,
1162 /**< Device specific , Power Down Mode */ 1162 /*< Device specific , Power Down Mode */
1163 DRX_POWER_MODE_13, 1163 DRX_POWER_MODE_13,
1164 /**< Device specific , Power Down Mode */ 1164 /*< Device specific , Power Down Mode */
1165 DRX_POWER_MODE_14, 1165 DRX_POWER_MODE_14,
1166 /**< Device specific , Power Down Mode */ 1166 /*< Device specific , Power Down Mode */
1167 DRX_POWER_MODE_15, 1167 DRX_POWER_MODE_15,
1168 /**< Device specific , Power Down Mode */ 1168 /*< Device specific , Power Down Mode */
1169 DRX_POWER_MODE_16, 1169 DRX_POWER_MODE_16,
1170 /**< Device specific , Power Down Mode */ 1170 /*< Device specific , Power Down Mode */
1171 DRX_POWER_DOWN = 255 1171 DRX_POWER_DOWN = 255
1172 /**< Generic , Power Down Mode */ 1172 /*< Generic , Power Down Mode */
1173 }; 1173 };
1174 1174
1175/*========================================*/ 1175/*========================================*/
1176 1176
1177/** 1177/*
1178* \enum enum drx_module * \brief Software module identification. 1178* \enum enum drx_module * \brief Software module identification.
1179* 1179*
1180* Used by DRX_CTRL_VERSION. 1180* Used by DRX_CTRL_VERSION.
@@ -1191,93 +1191,93 @@ typedef int(*drx_scan_func_t) (void *scan_context,
1191 DRX_MODULE_UNKNOWN 1191 DRX_MODULE_UNKNOWN
1192 }; 1192 };
1193 1193
1194/** 1194/*
1195* \enum struct drx_version * \brief Version information of one software module. 1195* \enum struct drx_version * \brief Version information of one software module.
1196* 1196*
1197* Used by DRX_CTRL_VERSION. 1197* Used by DRX_CTRL_VERSION.
1198*/ 1198*/
1199 struct drx_version { 1199 struct drx_version {
1200 enum drx_module module_type; 1200 enum drx_module module_type;
1201 /**< Type identifier of the module */ 1201 /*< Type identifier of the module */
1202 char *module_name; 1202 char *module_name;
1203 /**< Name or description of module */ 1203 /*< Name or description of module */
1204 u16 v_major; /**< Major version number */ 1204 u16 v_major; /*< Major version number */
1205 u16 v_minor; /**< Minor version number */ 1205 u16 v_minor; /*< Minor version number */
1206 u16 v_patch; /**< Patch version number */ 1206 u16 v_patch; /*< Patch version number */
1207 char *v_string; /**< Version as text string */ 1207 char *v_string; /*< Version as text string */
1208 }; 1208 };
1209 1209
1210/** 1210/*
1211* \enum struct drx_version_list * \brief List element of NULL terminated, linked list for version information. 1211* \enum struct drx_version_list * \brief List element of NULL terminated, linked list for version information.
1212* 1212*
1213* Used by DRX_CTRL_VERSION. 1213* Used by DRX_CTRL_VERSION.
1214*/ 1214*/
1215struct drx_version_list { 1215struct drx_version_list {
1216 struct drx_version *version;/**< Version information */ 1216 struct drx_version *version;/*< Version information */
1217 struct drx_version_list *next; 1217 struct drx_version_list *next;
1218 /**< Next list element */ 1218 /*< Next list element */
1219}; 1219};
1220 1220
1221/*========================================*/ 1221/*========================================*/
1222 1222
1223/** 1223/*
1224* \brief Parameters needed to confiugure a UIO. 1224* \brief Parameters needed to confiugure a UIO.
1225* 1225*
1226* Used by DRX_CTRL_UIO_CFG. 1226* Used by DRX_CTRL_UIO_CFG.
1227*/ 1227*/
1228 struct drxuio_cfg { 1228 struct drxuio_cfg {
1229 enum drx_uio uio; 1229 enum drx_uio uio;
1230 /**< UIO identifier */ 1230 /*< UIO identifier */
1231 enum drxuio_mode mode; 1231 enum drxuio_mode mode;
1232 /**< UIO operational mode */ 1232 /*< UIO operational mode */
1233 }; 1233 };
1234 1234
1235/*========================================*/ 1235/*========================================*/
1236 1236
1237/** 1237/*
1238* \brief Parameters needed to read from or write to a UIO. 1238* \brief Parameters needed to read from or write to a UIO.
1239* 1239*
1240* Used by DRX_CTRL_UIO_READ and DRX_CTRL_UIO_WRITE. 1240* Used by DRX_CTRL_UIO_READ and DRX_CTRL_UIO_WRITE.
1241*/ 1241*/
1242 struct drxuio_data { 1242 struct drxuio_data {
1243 enum drx_uio uio; 1243 enum drx_uio uio;
1244 /**< UIO identifier */ 1244 /*< UIO identifier */
1245 bool value; 1245 bool value;
1246 /**< UIO value (true=1, false=0) */ 1246 /*< UIO value (true=1, false=0) */
1247 }; 1247 };
1248 1248
1249/*========================================*/ 1249/*========================================*/
1250 1250
1251/** 1251/*
1252* \brief Parameters needed to configure OOB. 1252* \brief Parameters needed to configure OOB.
1253* 1253*
1254* Used by DRX_CTRL_SET_OOB. 1254* Used by DRX_CTRL_SET_OOB.
1255*/ 1255*/
1256 struct drxoob { 1256 struct drxoob {
1257 s32 frequency; /**< Frequency in kHz */ 1257 s32 frequency; /*< Frequency in kHz */
1258 enum drxoob_downstream_standard standard; 1258 enum drxoob_downstream_standard standard;
1259 /**< OOB standard */ 1259 /*< OOB standard */
1260 bool spectrum_inverted; /**< If true, then spectrum 1260 bool spectrum_inverted; /*< If true, then spectrum
1261 is inverted */ 1261 is inverted */
1262 }; 1262 };
1263 1263
1264/*========================================*/ 1264/*========================================*/
1265 1265
1266/** 1266/*
1267* \brief Metrics from OOB. 1267* \brief Metrics from OOB.
1268* 1268*
1269* Used by DRX_CTRL_GET_OOB. 1269* Used by DRX_CTRL_GET_OOB.
1270*/ 1270*/
1271 struct drxoob_status { 1271 struct drxoob_status {
1272 s32 frequency; /**< Frequency in Khz */ 1272 s32 frequency; /*< Frequency in Khz */
1273 enum drx_lock_status lock; /**< Lock status */ 1273 enum drx_lock_status lock; /*< Lock status */
1274 u32 mer; /**< MER */ 1274 u32 mer; /*< MER */
1275 s32 symbol_rate_offset; /**< Symbolrate offset in ppm */ 1275 s32 symbol_rate_offset; /*< Symbolrate offset in ppm */
1276 }; 1276 };
1277 1277
1278/*========================================*/ 1278/*========================================*/
1279 1279
1280/** 1280/*
1281* \brief Device dependent configuration data. 1281* \brief Device dependent configuration data.
1282* 1282*
1283* Used by DRX_CTRL_SET_CFG and DRX_CTRL_GET_CFG. 1283* Used by DRX_CTRL_SET_CFG and DRX_CTRL_GET_CFG.
@@ -1285,14 +1285,14 @@ struct drx_version_list {
1285*/ 1285*/
1286 struct drx_cfg { 1286 struct drx_cfg {
1287 u32 cfg_type; 1287 u32 cfg_type;
1288 /**< Function identifier */ 1288 /*< Function identifier */
1289 void *cfg_data; 1289 void *cfg_data;
1290 /**< Function data */ 1290 /*< Function data */
1291 }; 1291 };
1292 1292
1293/*========================================*/ 1293/*========================================*/
1294 1294
1295/** 1295/*
1296* /struct DRXMpegStartWidth_t 1296* /struct DRXMpegStartWidth_t
1297* MStart width [nr MCLK cycles] for serial MPEG output. 1297* MStart width [nr MCLK cycles] for serial MPEG output.
1298*/ 1298*/
@@ -1303,7 +1303,7 @@ struct drx_version_list {
1303 }; 1303 };
1304 1304
1305/* CTRL CFG MPEG output */ 1305/* CTRL CFG MPEG output */
1306/** 1306/*
1307* \struct struct drx_cfg_mpeg_output * \brief Configuration parameters for MPEG output control. 1307* \struct struct drx_cfg_mpeg_output * \brief Configuration parameters for MPEG output control.
1308* 1308*
1309* Used by DRX_CFG_MPEG_OUTPUT, in combination with DRX_CTRL_SET_CFG and 1309* Used by DRX_CFG_MPEG_OUTPUT, in combination with DRX_CTRL_SET_CFG and
@@ -1311,29 +1311,29 @@ struct drx_version_list {
1311*/ 1311*/
1312 1312
1313 struct drx_cfg_mpeg_output { 1313 struct drx_cfg_mpeg_output {
1314 bool enable_mpeg_output;/**< If true, enable MPEG output */ 1314 bool enable_mpeg_output;/*< If true, enable MPEG output */
1315 bool insert_rs_byte; /**< If true, insert RS byte */ 1315 bool insert_rs_byte; /*< If true, insert RS byte */
1316 bool enable_parallel; /**< If true, parallel out otherwise 1316 bool enable_parallel; /*< If true, parallel out otherwise
1317 serial */ 1317 serial */
1318 bool invert_data; /**< If true, invert DATA signals */ 1318 bool invert_data; /*< If true, invert DATA signals */
1319 bool invert_err; /**< If true, invert ERR signal */ 1319 bool invert_err; /*< If true, invert ERR signal */
1320 bool invert_str; /**< If true, invert STR signals */ 1320 bool invert_str; /*< If true, invert STR signals */
1321 bool invert_val; /**< If true, invert VAL signals */ 1321 bool invert_val; /*< If true, invert VAL signals */
1322 bool invert_clk; /**< If true, invert CLK signals */ 1322 bool invert_clk; /*< If true, invert CLK signals */
1323 bool static_clk; /**< If true, static MPEG clockrate 1323 bool static_clk; /*< If true, static MPEG clockrate
1324 will be used, otherwise clockrate 1324 will be used, otherwise clockrate
1325 will adapt to the bitrate of the 1325 will adapt to the bitrate of the
1326 TS */ 1326 TS */
1327 u32 bitrate; /**< Maximum bitrate in b/s in case 1327 u32 bitrate; /*< Maximum bitrate in b/s in case
1328 static clockrate is selected */ 1328 static clockrate is selected */
1329 enum drxmpeg_str_width width_str; 1329 enum drxmpeg_str_width width_str;
1330 /**< MPEG start width */ 1330 /*< MPEG start width */
1331 }; 1331 };
1332 1332
1333 1333
1334/*========================================*/ 1334/*========================================*/
1335 1335
1336/** 1336/*
1337* \struct struct drxi2c_data * \brief Data for I2C via 2nd or 3rd or etc I2C port. 1337* \struct struct drxi2c_data * \brief Data for I2C via 2nd or 3rd or etc I2C port.
1338* 1338*
1339* Used by DRX_CTRL_I2C_READWRITE. 1339* Used by DRX_CTRL_I2C_READWRITE.
@@ -1341,187 +1341,187 @@ struct drx_version_list {
1341* 1341*
1342*/ 1342*/
1343 struct drxi2c_data { 1343 struct drxi2c_data {
1344 u16 port_nr; /**< I2C port number */ 1344 u16 port_nr; /*< I2C port number */
1345 struct i2c_device_addr *w_dev_addr; 1345 struct i2c_device_addr *w_dev_addr;
1346 /**< Write device address */ 1346 /*< Write device address */
1347 u16 w_count; /**< Size of write data in bytes */ 1347 u16 w_count; /*< Size of write data in bytes */
1348 u8 *wData; /**< Pointer to write data */ 1348 u8 *wData; /*< Pointer to write data */
1349 struct i2c_device_addr *r_dev_addr; 1349 struct i2c_device_addr *r_dev_addr;
1350 /**< Read device address */ 1350 /*< Read device address */
1351 u16 r_count; /**< Size of data to read in bytes */ 1351 u16 r_count; /*< Size of data to read in bytes */
1352 u8 *r_data; /**< Pointer to read buffer */ 1352 u8 *r_data; /*< Pointer to read buffer */
1353 }; 1353 };
1354 1354
1355/*========================================*/ 1355/*========================================*/
1356 1356
1357/** 1357/*
1358* \enum enum drx_aud_standard * \brief Audio standard identifier. 1358* \enum enum drx_aud_standard * \brief Audio standard identifier.
1359* 1359*
1360* Used by DRX_CTRL_SET_AUD. 1360* Used by DRX_CTRL_SET_AUD.
1361*/ 1361*/
1362 enum drx_aud_standard { 1362 enum drx_aud_standard {
1363 DRX_AUD_STANDARD_BTSC, /**< set BTSC standard (USA) */ 1363 DRX_AUD_STANDARD_BTSC, /*< set BTSC standard (USA) */
1364 DRX_AUD_STANDARD_A2, /**< set A2-Korea FM Stereo */ 1364 DRX_AUD_STANDARD_A2, /*< set A2-Korea FM Stereo */
1365 DRX_AUD_STANDARD_EIAJ, /**< set to Japanese FM Stereo */ 1365 DRX_AUD_STANDARD_EIAJ, /*< set to Japanese FM Stereo */
1366 DRX_AUD_STANDARD_FM_STEREO,/**< set to FM-Stereo Radio */ 1366 DRX_AUD_STANDARD_FM_STEREO,/*< set to FM-Stereo Radio */
1367 DRX_AUD_STANDARD_M_MONO, /**< for 4.5 MHz mono detected */ 1367 DRX_AUD_STANDARD_M_MONO, /*< for 4.5 MHz mono detected */
1368 DRX_AUD_STANDARD_D_K_MONO, /**< for 6.5 MHz mono detected */ 1368 DRX_AUD_STANDARD_D_K_MONO, /*< for 6.5 MHz mono detected */
1369 DRX_AUD_STANDARD_BG_FM, /**< set BG_FM standard */ 1369 DRX_AUD_STANDARD_BG_FM, /*< set BG_FM standard */
1370 DRX_AUD_STANDARD_D_K1, /**< set D_K1 standard */ 1370 DRX_AUD_STANDARD_D_K1, /*< set D_K1 standard */
1371 DRX_AUD_STANDARD_D_K2, /**< set D_K2 standard */ 1371 DRX_AUD_STANDARD_D_K2, /*< set D_K2 standard */
1372 DRX_AUD_STANDARD_D_K3, /**< set D_K3 standard */ 1372 DRX_AUD_STANDARD_D_K3, /*< set D_K3 standard */
1373 DRX_AUD_STANDARD_BG_NICAM_FM, 1373 DRX_AUD_STANDARD_BG_NICAM_FM,
1374 /**< set BG_NICAM_FM standard */ 1374 /*< set BG_NICAM_FM standard */
1375 DRX_AUD_STANDARD_L_NICAM_AM, 1375 DRX_AUD_STANDARD_L_NICAM_AM,
1376 /**< set L_NICAM_AM standard */ 1376 /*< set L_NICAM_AM standard */
1377 DRX_AUD_STANDARD_I_NICAM_FM, 1377 DRX_AUD_STANDARD_I_NICAM_FM,
1378 /**< set I_NICAM_FM standard */ 1378 /*< set I_NICAM_FM standard */
1379 DRX_AUD_STANDARD_D_K_NICAM_FM, 1379 DRX_AUD_STANDARD_D_K_NICAM_FM,
1380 /**< set D_K_NICAM_FM standard */ 1380 /*< set D_K_NICAM_FM standard */
1381 DRX_AUD_STANDARD_NOT_READY,/**< used to detect audio standard */ 1381 DRX_AUD_STANDARD_NOT_READY,/*< used to detect audio standard */
1382 DRX_AUD_STANDARD_AUTO = DRX_AUTO, 1382 DRX_AUD_STANDARD_AUTO = DRX_AUTO,
1383 /**< Automatic Standard Detection */ 1383 /*< Automatic Standard Detection */
1384 DRX_AUD_STANDARD_UNKNOWN = DRX_UNKNOWN 1384 DRX_AUD_STANDARD_UNKNOWN = DRX_UNKNOWN
1385 /**< used as auto and for readback */ 1385 /*< used as auto and for readback */
1386 }; 1386 };
1387 1387
1388/* CTRL_AUD_GET_STATUS - struct drx_aud_status */ 1388/* CTRL_AUD_GET_STATUS - struct drx_aud_status */
1389/** 1389/*
1390* \enum enum drx_aud_nicam_status * \brief Status of NICAM carrier. 1390* \enum enum drx_aud_nicam_status * \brief Status of NICAM carrier.
1391*/ 1391*/
1392 enum drx_aud_nicam_status { 1392 enum drx_aud_nicam_status {
1393 DRX_AUD_NICAM_DETECTED = 0, 1393 DRX_AUD_NICAM_DETECTED = 0,
1394 /**< NICAM carrier detected */ 1394 /*< NICAM carrier detected */
1395 DRX_AUD_NICAM_NOT_DETECTED, 1395 DRX_AUD_NICAM_NOT_DETECTED,
1396 /**< NICAM carrier not detected */ 1396 /*< NICAM carrier not detected */
1397 DRX_AUD_NICAM_BAD /**< NICAM carrier bad quality */ 1397 DRX_AUD_NICAM_BAD /*< NICAM carrier bad quality */
1398 }; 1398 };
1399 1399
1400/** 1400/*
1401* \struct struct drx_aud_status * \brief Audio status characteristics. 1401* \struct struct drx_aud_status * \brief Audio status characteristics.
1402*/ 1402*/
1403 struct drx_aud_status { 1403 struct drx_aud_status {
1404 bool stereo; /**< stereo detection */ 1404 bool stereo; /*< stereo detection */
1405 bool carrier_a; /**< carrier A detected */ 1405 bool carrier_a; /*< carrier A detected */
1406 bool carrier_b; /**< carrier B detected */ 1406 bool carrier_b; /*< carrier B detected */
1407 bool sap; /**< sap / bilingual detection */ 1407 bool sap; /*< sap / bilingual detection */
1408 bool rds; /**< RDS data array present */ 1408 bool rds; /*< RDS data array present */
1409 enum drx_aud_nicam_status nicam_status; 1409 enum drx_aud_nicam_status nicam_status;
1410 /**< status of NICAM carrier */ 1410 /*< status of NICAM carrier */
1411 s8 fm_ident; /**< FM Identification value */ 1411 s8 fm_ident; /*< FM Identification value */
1412 }; 1412 };
1413 1413
1414/* CTRL_AUD_READ_RDS - DRXRDSdata_t */ 1414/* CTRL_AUD_READ_RDS - DRXRDSdata_t */
1415 1415
1416/** 1416/*
1417* \struct DRXRDSdata_t 1417* \struct DRXRDSdata_t
1418* \brief Raw RDS data array. 1418* \brief Raw RDS data array.
1419*/ 1419*/
1420 struct drx_cfg_aud_rds { 1420 struct drx_cfg_aud_rds {
1421 bool valid; /**< RDS data validation */ 1421 bool valid; /*< RDS data validation */
1422 u16 data[18]; /**< data from one RDS data array */ 1422 u16 data[18]; /*< data from one RDS data array */
1423 }; 1423 };
1424 1424
1425/* DRX_CFG_AUD_VOLUME - struct drx_cfg_aud_volume - set/get */ 1425/* DRX_CFG_AUD_VOLUME - struct drx_cfg_aud_volume - set/get */
1426/** 1426/*
1427* \enum DRXAudAVCDecayTime_t 1427* \enum DRXAudAVCDecayTime_t
1428* \brief Automatic volume control configuration. 1428* \brief Automatic volume control configuration.
1429*/ 1429*/
1430 enum drx_aud_avc_mode { 1430 enum drx_aud_avc_mode {
1431 DRX_AUD_AVC_OFF, /**< Automatic volume control off */ 1431 DRX_AUD_AVC_OFF, /*< Automatic volume control off */
1432 DRX_AUD_AVC_DECAYTIME_8S, /**< level volume in 8 seconds */ 1432 DRX_AUD_AVC_DECAYTIME_8S, /*< level volume in 8 seconds */
1433 DRX_AUD_AVC_DECAYTIME_4S, /**< level volume in 4 seconds */ 1433 DRX_AUD_AVC_DECAYTIME_4S, /*< level volume in 4 seconds */
1434 DRX_AUD_AVC_DECAYTIME_2S, /**< level volume in 2 seconds */ 1434 DRX_AUD_AVC_DECAYTIME_2S, /*< level volume in 2 seconds */
1435 DRX_AUD_AVC_DECAYTIME_20MS/**< level volume in 20 millisec */ 1435 DRX_AUD_AVC_DECAYTIME_20MS/*< level volume in 20 millisec */
1436 }; 1436 };
1437 1437
1438/** 1438/*
1439* /enum DRXAudMaxAVCGain_t 1439* /enum DRXAudMaxAVCGain_t
1440* /brief Automatic volume control max gain in audio baseband. 1440* /brief Automatic volume control max gain in audio baseband.
1441*/ 1441*/
1442 enum drx_aud_avc_max_gain { 1442 enum drx_aud_avc_max_gain {
1443 DRX_AUD_AVC_MAX_GAIN_0DB, /**< maximum AVC gain 0 dB */ 1443 DRX_AUD_AVC_MAX_GAIN_0DB, /*< maximum AVC gain 0 dB */
1444 DRX_AUD_AVC_MAX_GAIN_6DB, /**< maximum AVC gain 6 dB */ 1444 DRX_AUD_AVC_MAX_GAIN_6DB, /*< maximum AVC gain 6 dB */
1445 DRX_AUD_AVC_MAX_GAIN_12DB /**< maximum AVC gain 12 dB */ 1445 DRX_AUD_AVC_MAX_GAIN_12DB /*< maximum AVC gain 12 dB */
1446 }; 1446 };
1447 1447
1448/** 1448/*
1449* /enum DRXAudMaxAVCAtten_t 1449* /enum DRXAudMaxAVCAtten_t
1450* /brief Automatic volume control max attenuation in audio baseband. 1450* /brief Automatic volume control max attenuation in audio baseband.
1451*/ 1451*/
1452 enum drx_aud_avc_max_atten { 1452 enum drx_aud_avc_max_atten {
1453 DRX_AUD_AVC_MAX_ATTEN_12DB, 1453 DRX_AUD_AVC_MAX_ATTEN_12DB,
1454 /**< maximum AVC attenuation 12 dB */ 1454 /*< maximum AVC attenuation 12 dB */
1455 DRX_AUD_AVC_MAX_ATTEN_18DB, 1455 DRX_AUD_AVC_MAX_ATTEN_18DB,
1456 /**< maximum AVC attenuation 18 dB */ 1456 /*< maximum AVC attenuation 18 dB */
1457 DRX_AUD_AVC_MAX_ATTEN_24DB/**< maximum AVC attenuation 24 dB */ 1457 DRX_AUD_AVC_MAX_ATTEN_24DB/*< maximum AVC attenuation 24 dB */
1458 }; 1458 };
1459/** 1459/*
1460* \struct struct drx_cfg_aud_volume * \brief Audio volume configuration. 1460* \struct struct drx_cfg_aud_volume * \brief Audio volume configuration.
1461*/ 1461*/
1462 struct drx_cfg_aud_volume { 1462 struct drx_cfg_aud_volume {
1463 bool mute; /**< mute overrides volume setting */ 1463 bool mute; /*< mute overrides volume setting */
1464 s16 volume; /**< volume, range -114 to 12 dB */ 1464 s16 volume; /*< volume, range -114 to 12 dB */
1465 enum drx_aud_avc_mode avc_mode; /**< AVC auto volume control mode */ 1465 enum drx_aud_avc_mode avc_mode; /*< AVC auto volume control mode */
1466 u16 avc_ref_level; /**< AVC reference level */ 1466 u16 avc_ref_level; /*< AVC reference level */
1467 enum drx_aud_avc_max_gain avc_max_gain; 1467 enum drx_aud_avc_max_gain avc_max_gain;
1468 /**< AVC max gain selection */ 1468 /*< AVC max gain selection */
1469 enum drx_aud_avc_max_atten avc_max_atten; 1469 enum drx_aud_avc_max_atten avc_max_atten;
1470 /**< AVC max attenuation selection */ 1470 /*< AVC max attenuation selection */
1471 s16 strength_left; /**< quasi-peak, left speaker */ 1471 s16 strength_left; /*< quasi-peak, left speaker */
1472 s16 strength_right; /**< quasi-peak, right speaker */ 1472 s16 strength_right; /*< quasi-peak, right speaker */
1473 }; 1473 };
1474 1474
1475/* DRX_CFG_I2S_OUTPUT - struct drx_cfg_i2s_output - set/get */ 1475/* DRX_CFG_I2S_OUTPUT - struct drx_cfg_i2s_output - set/get */
1476/** 1476/*
1477* \enum enum drxi2s_mode * \brief I2S output mode. 1477* \enum enum drxi2s_mode * \brief I2S output mode.
1478*/ 1478*/
1479 enum drxi2s_mode { 1479 enum drxi2s_mode {
1480 DRX_I2S_MODE_MASTER, /**< I2S is in master mode */ 1480 DRX_I2S_MODE_MASTER, /*< I2S is in master mode */
1481 DRX_I2S_MODE_SLAVE /**< I2S is in slave mode */ 1481 DRX_I2S_MODE_SLAVE /*< I2S is in slave mode */
1482 }; 1482 };
1483 1483
1484/** 1484/*
1485* \enum enum drxi2s_word_length * \brief Width of I2S data. 1485* \enum enum drxi2s_word_length * \brief Width of I2S data.
1486*/ 1486*/
1487 enum drxi2s_word_length { 1487 enum drxi2s_word_length {
1488 DRX_I2S_WORDLENGTH_32 = 0,/**< I2S data is 32 bit wide */ 1488 DRX_I2S_WORDLENGTH_32 = 0,/*< I2S data is 32 bit wide */
1489 DRX_I2S_WORDLENGTH_16 = 1 /**< I2S data is 16 bit wide */ 1489 DRX_I2S_WORDLENGTH_16 = 1 /*< I2S data is 16 bit wide */
1490 }; 1490 };
1491 1491
1492/** 1492/*
1493* \enum enum drxi2s_format * \brief Data wordstrobe alignment for I2S. 1493* \enum enum drxi2s_format * \brief Data wordstrobe alignment for I2S.
1494*/ 1494*/
1495 enum drxi2s_format { 1495 enum drxi2s_format {
1496 DRX_I2S_FORMAT_WS_WITH_DATA, 1496 DRX_I2S_FORMAT_WS_WITH_DATA,
1497 /**< I2S data and wordstrobe are aligned */ 1497 /*< I2S data and wordstrobe are aligned */
1498 DRX_I2S_FORMAT_WS_ADVANCED 1498 DRX_I2S_FORMAT_WS_ADVANCED
1499 /**< I2S data one cycle after wordstrobe */ 1499 /*< I2S data one cycle after wordstrobe */
1500 }; 1500 };
1501 1501
1502/** 1502/*
1503* \enum enum drxi2s_polarity * \brief Polarity of I2S data. 1503* \enum enum drxi2s_polarity * \brief Polarity of I2S data.
1504*/ 1504*/
1505 enum drxi2s_polarity { 1505 enum drxi2s_polarity {
1506 DRX_I2S_POLARITY_RIGHT,/**< wordstrobe - right high, left low */ 1506 DRX_I2S_POLARITY_RIGHT,/*< wordstrobe - right high, left low */
1507 DRX_I2S_POLARITY_LEFT /**< wordstrobe - right low, left high */ 1507 DRX_I2S_POLARITY_LEFT /*< wordstrobe - right low, left high */
1508 }; 1508 };
1509 1509
1510/** 1510/*
1511* \struct struct drx_cfg_i2s_output * \brief I2S output configuration. 1511* \struct struct drx_cfg_i2s_output * \brief I2S output configuration.
1512*/ 1512*/
1513 struct drx_cfg_i2s_output { 1513 struct drx_cfg_i2s_output {
1514 bool output_enable; /**< I2S output enable */ 1514 bool output_enable; /*< I2S output enable */
1515 u32 frequency; /**< range from 8000-48000 Hz */ 1515 u32 frequency; /*< range from 8000-48000 Hz */
1516 enum drxi2s_mode mode; /**< I2S mode, master or slave */ 1516 enum drxi2s_mode mode; /*< I2S mode, master or slave */
1517 enum drxi2s_word_length word_length; 1517 enum drxi2s_word_length word_length;
1518 /**< I2S wordlength, 16 or 32 bits */ 1518 /*< I2S wordlength, 16 or 32 bits */
1519 enum drxi2s_polarity polarity;/**< I2S wordstrobe polarity */ 1519 enum drxi2s_polarity polarity;/*< I2S wordstrobe polarity */
1520 enum drxi2s_format format; /**< I2S wordstrobe delay to data */ 1520 enum drxi2s_format format; /*< I2S wordstrobe delay to data */
1521 }; 1521 };
1522 1522
1523/* ------------------------------expert interface-----------------------------*/ 1523/* ------------------------------expert interface-----------------------------*/
1524/** 1524/*
1525* /enum enum drx_aud_fm_deemphasis * setting for FM-Deemphasis in audio demodulator. 1525* /enum enum drx_aud_fm_deemphasis * setting for FM-Deemphasis in audio demodulator.
1526* 1526*
1527*/ 1527*/
@@ -1531,7 +1531,7 @@ struct drx_version_list {
1531 DRX_AUD_FM_DEEMPH_OFF 1531 DRX_AUD_FM_DEEMPH_OFF
1532 }; 1532 };
1533 1533
1534/** 1534/*
1535* /enum DRXAudDeviation_t 1535* /enum DRXAudDeviation_t
1536* setting for deviation mode in audio demodulator. 1536* setting for deviation mode in audio demodulator.
1537* 1537*
@@ -1541,7 +1541,7 @@ struct drx_version_list {
1541 DRX_AUD_DEVIATION_HIGH 1541 DRX_AUD_DEVIATION_HIGH
1542 }; 1542 };
1543 1543
1544/** 1544/*
1545* /enum enum drx_no_carrier_option * setting for carrier, mute/noise. 1545* /enum enum drx_no_carrier_option * setting for carrier, mute/noise.
1546* 1546*
1547*/ 1547*/
@@ -1550,7 +1550,7 @@ struct drx_version_list {
1550 DRX_NO_CARRIER_NOISE 1550 DRX_NO_CARRIER_NOISE
1551 }; 1551 };
1552 1552
1553/** 1553/*
1554* \enum DRXAudAutoSound_t 1554* \enum DRXAudAutoSound_t
1555* \brief Automatic Sound 1555* \brief Automatic Sound
1556*/ 1556*/
@@ -1560,7 +1560,7 @@ struct drx_version_list {
1560 DRX_AUD_AUTO_SOUND_SELECT_ON_CHANGE_OFF 1560 DRX_AUD_AUTO_SOUND_SELECT_ON_CHANGE_OFF
1561 }; 1561 };
1562 1562
1563/** 1563/*
1564* \enum DRXAudASSThres_t 1564* \enum DRXAudASSThres_t
1565* \brief Automatic Sound Select Thresholds 1565* \brief Automatic Sound Select Thresholds
1566*/ 1566*/
@@ -1570,7 +1570,7 @@ struct drx_version_list {
1570 u16 nicam; /* Nicam Threshold for ASS configuration */ 1570 u16 nicam; /* Nicam Threshold for ASS configuration */
1571 }; 1571 };
1572 1572
1573/** 1573/*
1574* \struct struct drx_aud_carrier * \brief Carrier detection related parameters 1574* \struct struct drx_aud_carrier * \brief Carrier detection related parameters
1575*/ 1575*/
1576 struct drx_aud_carrier { 1576 struct drx_aud_carrier {
@@ -1580,7 +1580,7 @@ struct drx_version_list {
1580 s32 dco; /* frequency adjustment (A) */ 1580 s32 dco; /* frequency adjustment (A) */
1581 }; 1581 };
1582 1582
1583/** 1583/*
1584* \struct struct drx_cfg_aud_carriers * \brief combining carrier A & B to one struct 1584* \struct struct drx_cfg_aud_carriers * \brief combining carrier A & B to one struct
1585*/ 1585*/
1586 struct drx_cfg_aud_carriers { 1586 struct drx_cfg_aud_carriers {
@@ -1588,7 +1588,7 @@ struct drx_version_list {
1588 struct drx_aud_carrier b; 1588 struct drx_aud_carrier b;
1589 }; 1589 };
1590 1590
1591/** 1591/*
1592* /enum enum drx_aud_i2s_src * Selection of audio source 1592* /enum enum drx_aud_i2s_src * Selection of audio source
1593*/ 1593*/
1594 enum drx_aud_i2s_src { 1594 enum drx_aud_i2s_src {
@@ -1597,19 +1597,19 @@ struct drx_version_list {
1597 DRX_AUD_SRC_STEREO_OR_A, 1597 DRX_AUD_SRC_STEREO_OR_A,
1598 DRX_AUD_SRC_STEREO_OR_B}; 1598 DRX_AUD_SRC_STEREO_OR_B};
1599 1599
1600/** 1600/*
1601* \enum enum drx_aud_i2s_matrix * \brief Used for selecting I2S output. 1601* \enum enum drx_aud_i2s_matrix * \brief Used for selecting I2S output.
1602*/ 1602*/
1603 enum drx_aud_i2s_matrix { 1603 enum drx_aud_i2s_matrix {
1604 DRX_AUD_I2S_MATRIX_A_MONO, 1604 DRX_AUD_I2S_MATRIX_A_MONO,
1605 /**< A sound only, stereo or mono */ 1605 /*< A sound only, stereo or mono */
1606 DRX_AUD_I2S_MATRIX_B_MONO, 1606 DRX_AUD_I2S_MATRIX_B_MONO,
1607 /**< B sound only, stereo or mono */ 1607 /*< B sound only, stereo or mono */
1608 DRX_AUD_I2S_MATRIX_STEREO, 1608 DRX_AUD_I2S_MATRIX_STEREO,
1609 /**< A+B sound, transparant */ 1609 /*< A+B sound, transparant */
1610 DRX_AUD_I2S_MATRIX_MONO /**< A+B mixed to mono sum, (L+R)/2 */}; 1610 DRX_AUD_I2S_MATRIX_MONO /*< A+B mixed to mono sum, (L+R)/2 */};
1611 1611
1612/** 1612/*
1613* /enum enum drx_aud_fm_matrix * setting for FM-Matrix in audio demodulator. 1613* /enum enum drx_aud_fm_matrix * setting for FM-Matrix in audio demodulator.
1614* 1614*
1615*/ 1615*/
@@ -1620,7 +1620,7 @@ struct drx_version_list {
1620 DRX_AUD_FM_MATRIX_SOUND_A, 1620 DRX_AUD_FM_MATRIX_SOUND_A,
1621 DRX_AUD_FM_MATRIX_SOUND_B}; 1621 DRX_AUD_FM_MATRIX_SOUND_B};
1622 1622
1623/** 1623/*
1624* \struct DRXAudMatrices_t 1624* \struct DRXAudMatrices_t
1625* \brief Mixer settings 1625* \brief Mixer settings
1626*/ 1626*/
@@ -1630,22 +1630,22 @@ struct drx_cfg_aud_mixer {
1630 enum drx_aud_fm_matrix matrix_fm; 1630 enum drx_aud_fm_matrix matrix_fm;
1631}; 1631};
1632 1632
1633/** 1633/*
1634* \enum DRXI2SVidSync_t 1634* \enum DRXI2SVidSync_t
1635* \brief Audio/video synchronization, interacts with I2S mode. 1635* \brief Audio/video synchronization, interacts with I2S mode.
1636* AUTO_1 and AUTO_2 are for automatic video standard detection with preference 1636* AUTO_1 and AUTO_2 are for automatic video standard detection with preference
1637* for NTSC or Monochrome, because the frequencies are too close (59.94 & 60 Hz) 1637* for NTSC or Monochrome, because the frequencies are too close (59.94 & 60 Hz)
1638*/ 1638*/
1639 enum drx_cfg_aud_av_sync { 1639 enum drx_cfg_aud_av_sync {
1640 DRX_AUD_AVSYNC_OFF,/**< audio/video synchronization is off */ 1640 DRX_AUD_AVSYNC_OFF,/*< audio/video synchronization is off */
1641 DRX_AUD_AVSYNC_NTSC, 1641 DRX_AUD_AVSYNC_NTSC,
1642 /**< it is an NTSC system */ 1642 /*< it is an NTSC system */
1643 DRX_AUD_AVSYNC_MONOCHROME, 1643 DRX_AUD_AVSYNC_MONOCHROME,
1644 /**< it is a MONOCHROME system */ 1644 /*< it is a MONOCHROME system */
1645 DRX_AUD_AVSYNC_PAL_SECAM 1645 DRX_AUD_AVSYNC_PAL_SECAM
1646 /**< it is a PAL/SECAM system */}; 1646 /*< it is a PAL/SECAM system */};
1647 1647
1648/** 1648/*
1649* \struct struct drx_cfg_aud_prescale * \brief Prescalers 1649* \struct struct drx_cfg_aud_prescale * \brief Prescalers
1650*/ 1650*/
1651struct drx_cfg_aud_prescale { 1651struct drx_cfg_aud_prescale {
@@ -1653,7 +1653,7 @@ struct drx_cfg_aud_prescale {
1653 s16 nicam_gain; 1653 s16 nicam_gain;
1654}; 1654};
1655 1655
1656/** 1656/*
1657* \struct struct drx_aud_beep * \brief Beep 1657* \struct struct drx_aud_beep * \brief Beep
1658*/ 1658*/
1659struct drx_aud_beep { 1659struct drx_aud_beep {
@@ -1662,14 +1662,14 @@ struct drx_aud_beep {
1662 bool mute; 1662 bool mute;
1663}; 1663};
1664 1664
1665/** 1665/*
1666* \enum enum drx_aud_btsc_detect * \brief BTSC detetcion mode 1666* \enum enum drx_aud_btsc_detect * \brief BTSC detetcion mode
1667*/ 1667*/
1668 enum drx_aud_btsc_detect { 1668 enum drx_aud_btsc_detect {
1669 DRX_BTSC_STEREO, 1669 DRX_BTSC_STEREO,
1670 DRX_BTSC_MONO_AND_SAP}; 1670 DRX_BTSC_MONO_AND_SAP};
1671 1671
1672/** 1672/*
1673* \struct struct drx_aud_data * \brief Audio data structure 1673* \struct struct drx_aud_data * \brief Audio data structure
1674*/ 1674*/
1675struct drx_aud_data { 1675struct drx_aud_data {
@@ -1692,7 +1692,7 @@ struct drx_aud_data {
1692 bool rds_data_present; 1692 bool rds_data_present;
1693}; 1693};
1694 1694
1695/** 1695/*
1696* \enum enum drx_qam_lock_range * \brief QAM lock range mode 1696* \enum enum drx_qam_lock_range * \brief QAM lock range mode
1697*/ 1697*/
1698 enum drx_qam_lock_range { 1698 enum drx_qam_lock_range {
@@ -1782,7 +1782,7 @@ struct drx_aud_data {
1782 u32 wdata, /* data to write */ 1782 u32 wdata, /* data to write */
1783 u32 *rdata); /* data to read */ 1783 u32 *rdata); /* data to read */
1784 1784
1785/** 1785/*
1786* \struct struct drx_access_func * \brief Interface to an access protocol. 1786* \struct struct drx_access_func * \brief Interface to an access protocol.
1787*/ 1787*/
1788struct drx_access_func { 1788struct drx_access_func {
@@ -1811,85 +1811,85 @@ struct drx_reg_dump {
1811/*============================================================================*/ 1811/*============================================================================*/
1812/*============================================================================*/ 1812/*============================================================================*/
1813 1813
1814/** 1814/*
1815* \struct struct drx_common_attr * \brief Set of common attributes, shared by all DRX devices. 1815* \struct struct drx_common_attr * \brief Set of common attributes, shared by all DRX devices.
1816*/ 1816*/
1817 struct drx_common_attr { 1817 struct drx_common_attr {
1818 /* Microcode (firmware) attributes */ 1818 /* Microcode (firmware) attributes */
1819 char *microcode_file; /**< microcode filename */ 1819 char *microcode_file; /*< microcode filename */
1820 bool verify_microcode; 1820 bool verify_microcode;
1821 /**< Use microcode verify or not. */ 1821 /*< Use microcode verify or not. */
1822 struct drx_mc_version_rec mcversion; 1822 struct drx_mc_version_rec mcversion;
1823 /**< Version record of microcode from file */ 1823 /*< Version record of microcode from file */
1824 1824
1825 /* Clocks and tuner attributes */ 1825 /* Clocks and tuner attributes */
1826 s32 intermediate_freq; 1826 s32 intermediate_freq;
1827 /**< IF,if tuner instance not used. (kHz)*/ 1827 /*< IF,if tuner instance not used. (kHz)*/
1828 s32 sys_clock_freq; 1828 s32 sys_clock_freq;
1829 /**< Systemclock frequency. (kHz) */ 1829 /*< Systemclock frequency. (kHz) */
1830 s32 osc_clock_freq; 1830 s32 osc_clock_freq;
1831 /**< Oscillator clock frequency. (kHz) */ 1831 /*< Oscillator clock frequency. (kHz) */
1832 s16 osc_clock_deviation; 1832 s16 osc_clock_deviation;
1833 /**< Oscillator clock deviation. (ppm) */ 1833 /*< Oscillator clock deviation. (ppm) */
1834 bool mirror_freq_spect; 1834 bool mirror_freq_spect;
1835 /**< Mirror IF frequency spectrum or not.*/ 1835 /*< Mirror IF frequency spectrum or not.*/
1836 1836
1837 /* Initial MPEG output attributes */ 1837 /* Initial MPEG output attributes */
1838 struct drx_cfg_mpeg_output mpeg_cfg; 1838 struct drx_cfg_mpeg_output mpeg_cfg;
1839 /**< MPEG configuration */ 1839 /*< MPEG configuration */
1840 1840
1841 bool is_opened; /**< if true instance is already opened. */ 1841 bool is_opened; /*< if true instance is already opened. */
1842 1842
1843 /* Channel scan */ 1843 /* Channel scan */
1844 struct drx_scan_param *scan_param; 1844 struct drx_scan_param *scan_param;
1845 /**< scan parameters */ 1845 /*< scan parameters */
1846 u16 scan_freq_plan_index; 1846 u16 scan_freq_plan_index;
1847 /**< next index in freq plan */ 1847 /*< next index in freq plan */
1848 s32 scan_next_frequency; 1848 s32 scan_next_frequency;
1849 /**< next freq to scan */ 1849 /*< next freq to scan */
1850 bool scan_ready; /**< scan ready flag */ 1850 bool scan_ready; /*< scan ready flag */
1851 u32 scan_max_channels;/**< number of channels in freqplan */ 1851 u32 scan_max_channels;/*< number of channels in freqplan */
1852 u32 scan_channels_scanned; 1852 u32 scan_channels_scanned;
1853 /**< number of channels scanned */ 1853 /*< number of channels scanned */
1854 /* Channel scan - inner loop: demod related */ 1854 /* Channel scan - inner loop: demod related */
1855 drx_scan_func_t scan_function; 1855 drx_scan_func_t scan_function;
1856 /**< function to check channel */ 1856 /*< function to check channel */
1857 /* Channel scan - inner loop: SYSObj related */ 1857 /* Channel scan - inner loop: SYSObj related */
1858 void *scan_context; /**< Context Pointer of SYSObj */ 1858 void *scan_context; /*< Context Pointer of SYSObj */
1859 /* Channel scan - parameters for default DTV scan function in core driver */ 1859 /* Channel scan - parameters for default DTV scan function in core driver */
1860 u16 scan_demod_lock_timeout; 1860 u16 scan_demod_lock_timeout;
1861 /**< millisecs to wait for lock */ 1861 /*< millisecs to wait for lock */
1862 enum drx_lock_status scan_desired_lock; 1862 enum drx_lock_status scan_desired_lock;
1863 /**< lock requirement for channel found */ 1863 /*< lock requirement for channel found */
1864 /* scan_active can be used by SetChannel to decide how to program the tuner, 1864 /* scan_active can be used by SetChannel to decide how to program the tuner,
1865 fast or slow (but stable). Usually fast during scan. */ 1865 fast or slow (but stable). Usually fast during scan. */
1866 bool scan_active; /**< true when scan routines are active */ 1866 bool scan_active; /*< true when scan routines are active */
1867 1867
1868 /* Power management */ 1868 /* Power management */
1869 enum drx_power_mode current_power_mode; 1869 enum drx_power_mode current_power_mode;
1870 /**< current power management mode */ 1870 /*< current power management mode */
1871 1871
1872 /* Tuner */ 1872 /* Tuner */
1873 u8 tuner_port_nr; /**< nr of I2C port to wich tuner is */ 1873 u8 tuner_port_nr; /*< nr of I2C port to wich tuner is */
1874 s32 tuner_min_freq_rf; 1874 s32 tuner_min_freq_rf;
1875 /**< minimum RF input frequency, in kHz */ 1875 /*< minimum RF input frequency, in kHz */
1876 s32 tuner_max_freq_rf; 1876 s32 tuner_max_freq_rf;
1877 /**< maximum RF input frequency, in kHz */ 1877 /*< maximum RF input frequency, in kHz */
1878 bool tuner_rf_agc_pol; /**< if true invert RF AGC polarity */ 1878 bool tuner_rf_agc_pol; /*< if true invert RF AGC polarity */
1879 bool tuner_if_agc_pol; /**< if true invert IF AGC polarity */ 1879 bool tuner_if_agc_pol; /*< if true invert IF AGC polarity */
1880 bool tuner_slow_mode; /**< if true invert IF AGC polarity */ 1880 bool tuner_slow_mode; /*< if true invert IF AGC polarity */
1881 1881
1882 struct drx_channel current_channel; 1882 struct drx_channel current_channel;
1883 /**< current channel parameters */ 1883 /*< current channel parameters */
1884 enum drx_standard current_standard; 1884 enum drx_standard current_standard;
1885 /**< current standard selection */ 1885 /*< current standard selection */
1886 enum drx_standard prev_standard; 1886 enum drx_standard prev_standard;
1887 /**< previous standard selection */ 1887 /*< previous standard selection */
1888 enum drx_standard di_cache_standard; 1888 enum drx_standard di_cache_standard;
1889 /**< standard in DI cache if available */ 1889 /*< standard in DI cache if available */
1890 bool use_bootloader; /**< use bootloader in open */ 1890 bool use_bootloader; /*< use bootloader in open */
1891 u32 capabilities; /**< capabilities flags */ 1891 u32 capabilities; /*< capabilities flags */
1892 u32 product_id; /**< product ID inc. metal fix number */}; 1892 u32 product_id; /*< product ID inc. metal fix number */};
1893 1893
1894/* 1894/*
1895* Generic functions for DRX devices. 1895* Generic functions for DRX devices.
@@ -1897,16 +1897,16 @@ struct drx_reg_dump {
1897 1897
1898struct drx_demod_instance; 1898struct drx_demod_instance;
1899 1899
1900/** 1900/*
1901* \struct struct drx_demod_instance * \brief Top structure of demodulator instance. 1901* \struct struct drx_demod_instance * \brief Top structure of demodulator instance.
1902*/ 1902*/
1903struct drx_demod_instance { 1903struct drx_demod_instance {
1904 /**< data access protocol functions */ 1904 /*< data access protocol functions */
1905 struct i2c_device_addr *my_i2c_dev_addr; 1905 struct i2c_device_addr *my_i2c_dev_addr;
1906 /**< i2c address and device identifier */ 1906 /*< i2c address and device identifier */
1907 struct drx_common_attr *my_common_attr; 1907 struct drx_common_attr *my_common_attr;
1908 /**< common DRX attributes */ 1908 /*< common DRX attributes */
1909 void *my_ext_attr; /**< device specific attributes */ 1909 void *my_ext_attr; /*< device specific attributes */
1910 /* generic demodulator data */ 1910 /* generic demodulator data */
1911 1911
1912 struct i2c_adapter *i2c; 1912 struct i2c_adapter *i2c;
@@ -2195,7 +2195,7 @@ Conversion from enum values to human readable form.
2195Access macros 2195Access macros
2196-------------------------------------------------------------------------*/ 2196-------------------------------------------------------------------------*/
2197 2197
2198/** 2198/*
2199* \brief Create a compilable reference to the microcode attribute 2199* \brief Create a compilable reference to the microcode attribute
2200* \param d pointer to demod instance 2200* \param d pointer to demod instance
2201* 2201*
@@ -2229,7 +2229,7 @@ Access macros
2229#define DRX_ATTR_I2CDEVID(d) ((d)->my_i2c_dev_addr->i2c_dev_id) 2229#define DRX_ATTR_I2CDEVID(d) ((d)->my_i2c_dev_addr->i2c_dev_id)
2230#define DRX_ISMCVERTYPE(x) ((x) == AUX_VER_RECORD) 2230#define DRX_ISMCVERTYPE(x) ((x) == AUX_VER_RECORD)
2231 2231
2232/**************************/ 2232/*************************/
2233 2233
2234/* Macros with device-specific handling are converted to CFG functions */ 2234/* Macros with device-specific handling are converted to CFG functions */
2235 2235
@@ -2285,7 +2285,7 @@ Access macros
2285#define DRX_GET_QAM_LOCKRANGE(d, x) DRX_ACCESSMACRO_GET((d), (x), \ 2285#define DRX_GET_QAM_LOCKRANGE(d, x) DRX_ACCESSMACRO_GET((d), (x), \
2286 DRX_XS_CFG_QAM_LOCKRANGE, enum drx_qam_lock_range, DRX_UNKNOWN) 2286 DRX_XS_CFG_QAM_LOCKRANGE, enum drx_qam_lock_range, DRX_UNKNOWN)
2287 2287
2288/** 2288/*
2289* \brief Macro to check if std is an ATV standard 2289* \brief Macro to check if std is an ATV standard
2290* \retval true std is an ATV standard 2290* \retval true std is an ATV standard
2291* \retval false std is an ATV standard 2291* \retval false std is an ATV standard
@@ -2298,7 +2298,7 @@ Access macros
2298 ((std) == DRX_STANDARD_NTSC) || \ 2298 ((std) == DRX_STANDARD_NTSC) || \
2299 ((std) == DRX_STANDARD_FM)) 2299 ((std) == DRX_STANDARD_FM))
2300 2300
2301/** 2301/*
2302* \brief Macro to check if std is an QAM standard 2302* \brief Macro to check if std is an QAM standard
2303* \retval true std is an QAM standards 2303* \retval true std is an QAM standards
2304* \retval false std is an QAM standards 2304* \retval false std is an QAM standards
@@ -2308,14 +2308,14 @@ Access macros
2308 ((std) == DRX_STANDARD_ITU_C) || \ 2308 ((std) == DRX_STANDARD_ITU_C) || \
2309 ((std) == DRX_STANDARD_ITU_D)) 2309 ((std) == DRX_STANDARD_ITU_D))
2310 2310
2311/** 2311/*
2312* \brief Macro to check if std is VSB standard 2312* \brief Macro to check if std is VSB standard
2313* \retval true std is VSB standard 2313* \retval true std is VSB standard
2314* \retval false std is not VSB standard 2314* \retval false std is not VSB standard
2315*/ 2315*/
2316#define DRX_ISVSBSTD(std) ((std) == DRX_STANDARD_8VSB) 2316#define DRX_ISVSBSTD(std) ((std) == DRX_STANDARD_8VSB)
2317 2317
2318/** 2318/*
2319* \brief Macro to check if std is DVBT standard 2319* \brief Macro to check if std is DVBT standard
2320* \retval true std is DVBT standard 2320* \retval true std is DVBT standard
2321* \retval false std is not DVBT standard 2321* \retval false std is not DVBT standard
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.h b/drivers/media/dvb-frontends/drx39xyj/drxj.h
index 6c5b8f78f9f6..d3ee1c23bb2f 100644
--- a/drivers/media/dvb-frontends/drx39xyj/drxj.h
+++ b/drivers/media/dvb-frontends/drx39xyj/drxj.h
@@ -69,15 +69,15 @@ TYPEDEFS
69 69
70 struct drxjscu_cmd { 70 struct drxjscu_cmd {
71 u16 command; 71 u16 command;
72 /**< Command number */ 72 /*< Command number */
73 u16 parameter_len; 73 u16 parameter_len;
74 /**< Data length in byte */ 74 /*< Data length in byte */
75 u16 result_len; 75 u16 result_len;
76 /**< result length in byte */ 76 /*< result length in byte */
77 u16 *parameter; 77 u16 *parameter;
78 /**< General purpous param */ 78 /*< General purpous param */
79 u16 *result; 79 u16 *result;
80 /**< General purpous param */}; 80 /*< General purpous param */};
81 81
82/*============================================================================*/ 82/*============================================================================*/
83/*============================================================================*/ 83/*============================================================================*/
@@ -130,7 +130,7 @@ TYPEDEFS
130 130
131 DRXJ_CFG_MAX /* dummy, never to be used */}; 131 DRXJ_CFG_MAX /* dummy, never to be used */};
132 132
133/** 133/*
134* /struct enum drxj_cfg_smart_ant_io * smart antenna i/o. 134* /struct enum drxj_cfg_smart_ant_io * smart antenna i/o.
135*/ 135*/
136enum drxj_cfg_smart_ant_io { 136enum drxj_cfg_smart_ant_io {
@@ -138,7 +138,7 @@ enum drxj_cfg_smart_ant_io {
138 DRXJ_SMT_ANT_INPUT 138 DRXJ_SMT_ANT_INPUT
139}; 139};
140 140
141/** 141/*
142* /struct struct drxj_cfg_smart_ant * Set smart antenna. 142* /struct struct drxj_cfg_smart_ant * Set smart antenna.
143*/ 143*/
144 struct drxj_cfg_smart_ant { 144 struct drxj_cfg_smart_ant {
@@ -146,7 +146,7 @@ enum drxj_cfg_smart_ant_io {
146 u16 ctrl_data; 146 u16 ctrl_data;
147 }; 147 };
148 148
149/** 149/*
150* /struct DRXJAGCSTATUS_t 150* /struct DRXJAGCSTATUS_t
151* AGC status information from the DRXJ-IQM-AF. 151* AGC status information from the DRXJ-IQM-AF.
152*/ 152*/
@@ -158,7 +158,7 @@ struct drxj_agc_status {
158 158
159/* DRXJ_CFG_AGC_RF, DRXJ_CFG_AGC_IF */ 159/* DRXJ_CFG_AGC_RF, DRXJ_CFG_AGC_IF */
160 160
161/** 161/*
162* /struct enum drxj_agc_ctrl_mode * Available AGCs modes in the DRXJ. 162* /struct enum drxj_agc_ctrl_mode * Available AGCs modes in the DRXJ.
163*/ 163*/
164 enum drxj_agc_ctrl_mode { 164 enum drxj_agc_ctrl_mode {
@@ -166,7 +166,7 @@ struct drxj_agc_status {
166 DRX_AGC_CTRL_USER, 166 DRX_AGC_CTRL_USER,
167 DRX_AGC_CTRL_OFF}; 167 DRX_AGC_CTRL_OFF};
168 168
169/** 169/*
170* /struct struct drxj_cfg_agc * Generic interface for all AGCs present on the DRXJ. 170* /struct struct drxj_cfg_agc * Generic interface for all AGCs present on the DRXJ.
171*/ 171*/
172 struct drxj_cfg_agc { 172 struct drxj_cfg_agc {
@@ -182,7 +182,7 @@ struct drxj_agc_status {
182 182
183/* DRXJ_CFG_PRE_SAW */ 183/* DRXJ_CFG_PRE_SAW */
184 184
185/** 185/*
186* /struct struct drxj_cfg_pre_saw * Interface to configure pre SAW sense. 186* /struct struct drxj_cfg_pre_saw * Interface to configure pre SAW sense.
187*/ 187*/
188 struct drxj_cfg_pre_saw { 188 struct drxj_cfg_pre_saw {
@@ -192,14 +192,14 @@ struct drxj_agc_status {
192 192
193/* DRXJ_CFG_AFE_GAIN */ 193/* DRXJ_CFG_AFE_GAIN */
194 194
195/** 195/*
196* /struct struct drxj_cfg_afe_gain * Interface to configure gain of AFE (LNA + PGA). 196* /struct struct drxj_cfg_afe_gain * Interface to configure gain of AFE (LNA + PGA).
197*/ 197*/
198 struct drxj_cfg_afe_gain { 198 struct drxj_cfg_afe_gain {
199 enum drx_standard standard; /* standard to which these settings apply */ 199 enum drx_standard standard; /* standard to which these settings apply */
200 u16 gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */}; 200 u16 gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */};
201 201
202/** 202/*
203* /struct drxjrs_errors 203* /struct drxjrs_errors
204* Available failure information in DRXJ_FEC_RS. 204* Available failure information in DRXJ_FEC_RS.
205* 205*
@@ -208,25 +208,25 @@ struct drxj_agc_status {
208*/ 208*/
209 struct drxjrs_errors { 209 struct drxjrs_errors {
210 u16 nr_bit_errors; 210 u16 nr_bit_errors;
211 /**< no of pre RS bit errors */ 211 /*< no of pre RS bit errors */
212 u16 nr_symbol_errors; 212 u16 nr_symbol_errors;
213 /**< no of pre RS symbol errors */ 213 /*< no of pre RS symbol errors */
214 u16 nr_packet_errors; 214 u16 nr_packet_errors;
215 /**< no of pre RS packet errors */ 215 /*< no of pre RS packet errors */
216 u16 nr_failures; 216 u16 nr_failures;
217 /**< no of post RS failures to decode */ 217 /*< no of post RS failures to decode */
218 u16 nr_snc_par_fail_count; 218 u16 nr_snc_par_fail_count;
219 /**< no of post RS bit erros */ 219 /*< no of post RS bit erros */
220 }; 220 };
221 221
222/** 222/*
223* /struct struct drxj_cfg_vsb_misc * symbol error rate 223* /struct struct drxj_cfg_vsb_misc * symbol error rate
224*/ 224*/
225 struct drxj_cfg_vsb_misc { 225 struct drxj_cfg_vsb_misc {
226 u32 symb_error; 226 u32 symb_error;
227 /**< symbol error rate sps */}; 227 /*< symbol error rate sps */};
228 228
229/** 229/*
230* /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate. 230* /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate.
231* 231*
232*/ 232*/
@@ -234,7 +234,7 @@ struct drxj_agc_status {
234 DRXJ_MPEG_START_WIDTH_1CLKCYC, 234 DRXJ_MPEG_START_WIDTH_1CLKCYC,
235 DRXJ_MPEG_START_WIDTH_8CLKCYC}; 235 DRXJ_MPEG_START_WIDTH_8CLKCYC};
236 236
237/** 237/*
238* /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate. 238* /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate.
239* 239*
240*/ 240*/
@@ -247,20 +247,20 @@ struct drxj_agc_status {
247 DRXJ_MPEGOUTPUT_CLOCK_RATE_25313K, 247 DRXJ_MPEGOUTPUT_CLOCK_RATE_25313K,
248 DRXJ_MPEGOUTPUT_CLOCK_RATE_21696K}; 248 DRXJ_MPEGOUTPUT_CLOCK_RATE_21696K};
249 249
250/** 250/*
251* /struct DRXJCfgMisc_t 251* /struct DRXJCfgMisc_t
252* Change TEI bit of MPEG output 252* Change TEI bit of MPEG output
253* reverse MPEG output bit order 253* reverse MPEG output bit order
254* set MPEG output clock rate 254* set MPEG output clock rate
255*/ 255*/
256 struct drxj_cfg_mpeg_output_misc { 256 struct drxj_cfg_mpeg_output_misc {
257 bool disable_tei_handling; /**< if true pass (not change) TEI bit */ 257 bool disable_tei_handling; /*< if true pass (not change) TEI bit */
258 bool bit_reverse_mpeg_outout; /**< if true, parallel: msb on MD0; serial: lsb out first */ 258 bool bit_reverse_mpeg_outout; /*< if true, parallel: msb on MD0; serial: lsb out first */
259 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate; 259 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate;
260 /**< set MPEG output clock rate that overwirtes the derived one from symbol rate */ 260 /*< set MPEG output clock rate that overwirtes the derived one from symbol rate */
261 enum drxj_mpeg_start_width mpeg_start_width; /**< set MPEG output start width */}; 261 enum drxj_mpeg_start_width mpeg_start_width; /*< set MPEG output start width */};
262 262
263/** 263/*
264* /enum enum drxj_xtal_freq * Supported external crystal reference frequency. 264* /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
265*/ 265*/
266 enum drxj_xtal_freq { 266 enum drxj_xtal_freq {
@@ -269,21 +269,21 @@ struct drxj_agc_status {
269 DRXJ_XTAL_FREQ_20P25MHZ, 269 DRXJ_XTAL_FREQ_20P25MHZ,
270 DRXJ_XTAL_FREQ_4MHZ}; 270 DRXJ_XTAL_FREQ_4MHZ};
271 271
272/** 272/*
273* /enum enum drxj_xtal_freq * Supported external crystal reference frequency. 273* /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
274*/ 274*/
275 enum drxji2c_speed { 275 enum drxji2c_speed {
276 DRXJ_I2C_SPEED_400KBPS, 276 DRXJ_I2C_SPEED_400KBPS,
277 DRXJ_I2C_SPEED_100KBPS}; 277 DRXJ_I2C_SPEED_100KBPS};
278 278
279/** 279/*
280* /struct struct drxj_cfg_hw_cfg * Get hw configuration, such as crystal reference frequency, I2C speed, etc... 280* /struct struct drxj_cfg_hw_cfg * Get hw configuration, such as crystal reference frequency, I2C speed, etc...
281*/ 281*/
282 struct drxj_cfg_hw_cfg { 282 struct drxj_cfg_hw_cfg {
283 enum drxj_xtal_freq xtal_freq; 283 enum drxj_xtal_freq xtal_freq;
284 /**< crystal reference frequency */ 284 /*< crystal reference frequency */
285 enum drxji2c_speed i2c_speed; 285 enum drxji2c_speed i2c_speed;
286 /**< 100 or 400 kbps */}; 286 /*< 100 or 400 kbps */};
287 287
288/* 288/*
289 * DRXJ_CFG_ATV_MISC 289 * DRXJ_CFG_ATV_MISC
@@ -352,7 +352,7 @@ struct drxj_cfg_oob_misc {
352 * DRXJ_CFG_ATV_OUTPUT 352 * DRXJ_CFG_ATV_OUTPUT
353 */ 353 */
354 354
355/** 355/*
356* /enum DRXJAttenuation_t 356* /enum DRXJAttenuation_t
357* Attenuation setting for SIF AGC. 357* Attenuation setting for SIF AGC.
358* 358*
@@ -363,7 +363,7 @@ struct drxj_cfg_oob_misc {
363 DRXJ_SIF_ATTENUATION_6DB, 363 DRXJ_SIF_ATTENUATION_6DB,
364 DRXJ_SIF_ATTENUATION_9DB}; 364 DRXJ_SIF_ATTENUATION_9DB};
365 365
366/** 366/*
367* /struct struct drxj_cfg_atv_output * SIF attenuation setting. 367* /struct struct drxj_cfg_atv_output * SIF attenuation setting.
368* 368*
369*/ 369*/
@@ -398,7 +398,7 @@ struct drxj_cfg_atv_output {
398/*============================================================================*/ 398/*============================================================================*/
399 399
400/*========================================*/ 400/*========================================*/
401/** 401/*
402* /struct struct drxj_data * DRXJ specific attributes. 402* /struct struct drxj_data * DRXJ specific attributes.
403* 403*
404* Global data container for DRXJ specific data. 404* Global data container for DRXJ specific data.
@@ -406,93 +406,93 @@ struct drxj_cfg_atv_output {
406*/ 406*/
407 struct drxj_data { 407 struct drxj_data {
408 /* device capabilties (determined during drx_open()) */ 408 /* device capabilties (determined during drx_open()) */
409 bool has_lna; /**< true if LNA (aka PGA) present */ 409 bool has_lna; /*< true if LNA (aka PGA) present */
410 bool has_oob; /**< true if OOB supported */ 410 bool has_oob; /*< true if OOB supported */
411 bool has_ntsc; /**< true if NTSC supported */ 411 bool has_ntsc; /*< true if NTSC supported */
412 bool has_btsc; /**< true if BTSC supported */ 412 bool has_btsc; /*< true if BTSC supported */
413 bool has_smatx; /**< true if mat_tx is available */ 413 bool has_smatx; /*< true if mat_tx is available */
414 bool has_smarx; /**< true if mat_rx is available */ 414 bool has_smarx; /*< true if mat_rx is available */
415 bool has_gpio; /**< true if GPIO is available */ 415 bool has_gpio; /*< true if GPIO is available */
416 bool has_irqn; /**< true if IRQN is available */ 416 bool has_irqn; /*< true if IRQN is available */
417 /* A1/A2/A... */ 417 /* A1/A2/A... */
418 u8 mfx; /**< metal fix */ 418 u8 mfx; /*< metal fix */
419 419
420 /* tuner settings */ 420 /* tuner settings */
421 bool mirror_freq_spect_oob;/**< tuner inversion (true = tuner mirrors the signal */ 421 bool mirror_freq_spect_oob;/*< tuner inversion (true = tuner mirrors the signal */
422 422
423 /* standard/channel settings */ 423 /* standard/channel settings */
424 enum drx_standard standard; /**< current standard information */ 424 enum drx_standard standard; /*< current standard information */
425 enum drx_modulation constellation; 425 enum drx_modulation constellation;
426 /**< current constellation */ 426 /*< current constellation */
427 s32 frequency; /**< center signal frequency in KHz */ 427 s32 frequency; /*< center signal frequency in KHz */
428 enum drx_bandwidth curr_bandwidth; 428 enum drx_bandwidth curr_bandwidth;
429 /**< current channel bandwidth */ 429 /*< current channel bandwidth */
430 enum drx_mirror mirror; /**< current channel mirror */ 430 enum drx_mirror mirror; /*< current channel mirror */
431 431
432 /* signal quality information */ 432 /* signal quality information */
433 u32 fec_bits_desired; /**< BER accounting period */ 433 u32 fec_bits_desired; /*< BER accounting period */
434 u16 fec_vd_plen; /**< no of trellis symbols: VD SER measurement period */ 434 u16 fec_vd_plen; /*< no of trellis symbols: VD SER measurement period */
435 u16 qam_vd_prescale; /**< Viterbi Measurement Prescale */ 435 u16 qam_vd_prescale; /*< Viterbi Measurement Prescale */
436 u16 qam_vd_period; /**< Viterbi Measurement period */ 436 u16 qam_vd_period; /*< Viterbi Measurement period */
437 u16 fec_rs_plen; /**< defines RS BER measurement period */ 437 u16 fec_rs_plen; /*< defines RS BER measurement period */
438 u16 fec_rs_prescale; /**< ReedSolomon Measurement Prescale */ 438 u16 fec_rs_prescale; /*< ReedSolomon Measurement Prescale */
439 u16 fec_rs_period; /**< ReedSolomon Measurement period */ 439 u16 fec_rs_period; /*< ReedSolomon Measurement period */
440 bool reset_pkt_err_acc; /**< Set a flag to reset accumulated packet error */ 440 bool reset_pkt_err_acc; /*< Set a flag to reset accumulated packet error */
441 u16 pkt_err_acc_start; /**< Set a flag to reset accumulated packet error */ 441 u16 pkt_err_acc_start; /*< Set a flag to reset accumulated packet error */
442 442
443 /* HI configuration */ 443 /* HI configuration */
444 u16 hi_cfg_timing_div; /**< HI Configure() parameter 2 */ 444 u16 hi_cfg_timing_div; /*< HI Configure() parameter 2 */
445 u16 hi_cfg_bridge_delay; /**< HI Configure() parameter 3 */ 445 u16 hi_cfg_bridge_delay; /*< HI Configure() parameter 3 */
446 u16 hi_cfg_wake_up_key; /**< HI Configure() parameter 4 */ 446 u16 hi_cfg_wake_up_key; /*< HI Configure() parameter 4 */
447 u16 hi_cfg_ctrl; /**< HI Configure() parameter 5 */ 447 u16 hi_cfg_ctrl; /*< HI Configure() parameter 5 */
448 u16 hi_cfg_transmit; /**< HI Configure() parameter 6 */ 448 u16 hi_cfg_transmit; /*< HI Configure() parameter 6 */
449 449
450 /* UIO configuration */ 450 /* UIO configuration */
451 enum drxuio_mode uio_sma_rx_mode;/**< current mode of SmaRx pin */ 451 enum drxuio_mode uio_sma_rx_mode;/*< current mode of SmaRx pin */
452 enum drxuio_mode uio_sma_tx_mode;/**< current mode of SmaTx pin */ 452 enum drxuio_mode uio_sma_tx_mode;/*< current mode of SmaTx pin */
453 enum drxuio_mode uio_gpio_mode; /**< current mode of ASEL pin */ 453 enum drxuio_mode uio_gpio_mode; /*< current mode of ASEL pin */
454 enum drxuio_mode uio_irqn_mode; /**< current mode of IRQN pin */ 454 enum drxuio_mode uio_irqn_mode; /*< current mode of IRQN pin */
455 455
456 /* IQM fs frequecy shift and inversion */ 456 /* IQM fs frequecy shift and inversion */
457 u32 iqm_fs_rate_ofs; /**< frequency shifter setting after setchannel */ 457 u32 iqm_fs_rate_ofs; /*< frequency shifter setting after setchannel */
458 bool pos_image; /**< Ture: positive image */ 458 bool pos_image; /*< Ture: positive image */
459 /* IQM RC frequecy shift */ 459 /* IQM RC frequecy shift */
460 u32 iqm_rc_rate_ofs; /**< frequency shifter setting after setchannel */ 460 u32 iqm_rc_rate_ofs; /*< frequency shifter setting after setchannel */
461 461
462 /* ATV configuration */ 462 /* ATV configuration */
463 u32 atv_cfg_changed_flags; /**< flag: flags cfg changes */ 463 u32 atv_cfg_changed_flags; /*< flag: flags cfg changes */
464 s16 atv_top_equ0[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU0__A */ 464 s16 atv_top_equ0[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU0__A */
465 s16 atv_top_equ1[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU1__A */ 465 s16 atv_top_equ1[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU1__A */
466 s16 atv_top_equ2[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU2__A */ 466 s16 atv_top_equ2[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU2__A */
467 s16 atv_top_equ3[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU3__A */ 467 s16 atv_top_equ3[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU3__A */
468 bool phase_correction_bypass;/**< flag: true=bypass */ 468 bool phase_correction_bypass;/*< flag: true=bypass */
469 s16 atv_top_vid_peak; /**< shadow of ATV_TOP_VID_PEAK__A */ 469 s16 atv_top_vid_peak; /*< shadow of ATV_TOP_VID_PEAK__A */
470 u16 atv_top_noise_th; /**< shadow of ATV_TOP_NOISE_TH__A */ 470 u16 atv_top_noise_th; /*< shadow of ATV_TOP_NOISE_TH__A */
471 bool enable_cvbs_output; /**< flag CVBS ouput enable */ 471 bool enable_cvbs_output; /*< flag CVBS ouput enable */
472 bool enable_sif_output; /**< flag SIF ouput enable */ 472 bool enable_sif_output; /*< flag SIF ouput enable */
473 enum drxjsif_attenuation sif_attenuation; 473 enum drxjsif_attenuation sif_attenuation;
474 /**< current SIF att setting */ 474 /*< current SIF att setting */
475 /* Agc configuration for QAM and VSB */ 475 /* Agc configuration for QAM and VSB */
476 struct drxj_cfg_agc qam_rf_agc_cfg; /**< qam RF AGC config */ 476 struct drxj_cfg_agc qam_rf_agc_cfg; /*< qam RF AGC config */
477 struct drxj_cfg_agc qam_if_agc_cfg; /**< qam IF AGC config */ 477 struct drxj_cfg_agc qam_if_agc_cfg; /*< qam IF AGC config */
478 struct drxj_cfg_agc vsb_rf_agc_cfg; /**< vsb RF AGC config */ 478 struct drxj_cfg_agc vsb_rf_agc_cfg; /*< vsb RF AGC config */
479 struct drxj_cfg_agc vsb_if_agc_cfg; /**< vsb IF AGC config */ 479 struct drxj_cfg_agc vsb_if_agc_cfg; /*< vsb IF AGC config */
480 480
481 /* PGA gain configuration for QAM and VSB */ 481 /* PGA gain configuration for QAM and VSB */
482 u16 qam_pga_cfg; /**< qam PGA config */ 482 u16 qam_pga_cfg; /*< qam PGA config */
483 u16 vsb_pga_cfg; /**< vsb PGA config */ 483 u16 vsb_pga_cfg; /*< vsb PGA config */
484 484
485 /* Pre SAW configuration for QAM and VSB */ 485 /* Pre SAW configuration for QAM and VSB */
486 struct drxj_cfg_pre_saw qam_pre_saw_cfg; 486 struct drxj_cfg_pre_saw qam_pre_saw_cfg;
487 /**< qam pre SAW config */ 487 /*< qam pre SAW config */
488 struct drxj_cfg_pre_saw vsb_pre_saw_cfg; 488 struct drxj_cfg_pre_saw vsb_pre_saw_cfg;
489 /**< qam pre SAW config */ 489 /*< qam pre SAW config */
490 490
491 /* Version information */ 491 /* Version information */
492 char v_text[2][12]; /**< allocated text versions */ 492 char v_text[2][12]; /*< allocated text versions */
493 struct drx_version v_version[2]; /**< allocated versions structs */ 493 struct drx_version v_version[2]; /*< allocated versions structs */
494 struct drx_version_list v_list_elements[2]; 494 struct drx_version_list v_list_elements[2];
495 /**< allocated version list */ 495 /*< allocated version list */
496 496
497 /* smart antenna configuration */ 497 /* smart antenna configuration */
498 bool smart_ant_inverted; 498 bool smart_ant_inverted;
@@ -502,25 +502,25 @@ struct drxj_cfg_atv_output {
502 bool oob_power_on; 502 bool oob_power_on;
503 503
504 /* MPEG static bitrate setting */ 504 /* MPEG static bitrate setting */
505 u32 mpeg_ts_static_bitrate; /**< bitrate static MPEG output */ 505 u32 mpeg_ts_static_bitrate; /*< bitrate static MPEG output */
506 bool disable_te_ihandling; /**< MPEG TS TEI handling */ 506 bool disable_te_ihandling; /*< MPEG TS TEI handling */
507 bool bit_reverse_mpeg_outout;/**< MPEG output bit order */ 507 bool bit_reverse_mpeg_outout;/*< MPEG output bit order */
508 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate; 508 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate;
509 /**< MPEG output clock rate */ 509 /*< MPEG output clock rate */
510 enum drxj_mpeg_start_width mpeg_start_width; 510 enum drxj_mpeg_start_width mpeg_start_width;
511 /**< MPEG Start width */ 511 /*< MPEG Start width */
512 512
513 /* Pre SAW & Agc configuration for ATV */ 513 /* Pre SAW & Agc configuration for ATV */
514 struct drxj_cfg_pre_saw atv_pre_saw_cfg; 514 struct drxj_cfg_pre_saw atv_pre_saw_cfg;
515 /**< atv pre SAW config */ 515 /*< atv pre SAW config */
516 struct drxj_cfg_agc atv_rf_agc_cfg; /**< atv RF AGC config */ 516 struct drxj_cfg_agc atv_rf_agc_cfg; /*< atv RF AGC config */
517 struct drxj_cfg_agc atv_if_agc_cfg; /**< atv IF AGC config */ 517 struct drxj_cfg_agc atv_if_agc_cfg; /*< atv IF AGC config */
518 u16 atv_pga_cfg; /**< atv pga config */ 518 u16 atv_pga_cfg; /*< atv pga config */
519 519
520 u32 curr_symbol_rate; 520 u32 curr_symbol_rate;
521 521
522 /* pin-safe mode */ 522 /* pin-safe mode */
523 bool pdr_safe_mode; /**< PDR safe mode activated */ 523 bool pdr_safe_mode; /*< PDR safe mode activated */
524 u16 pdr_safe_restore_val_gpio; 524 u16 pdr_safe_restore_val_gpio;
525 u16 pdr_safe_restore_val_v_sync; 525 u16 pdr_safe_restore_val_v_sync;
526 u16 pdr_safe_restore_val_sma_rx; 526 u16 pdr_safe_restore_val_sma_rx;
@@ -531,12 +531,12 @@ struct drxj_cfg_atv_output {
531 enum drxj_cfg_oob_lo_power oob_lo_pow; 531 enum drxj_cfg_oob_lo_power oob_lo_pow;
532 532
533 struct drx_aud_data aud_data; 533 struct drx_aud_data aud_data;
534 /**< audio storage */}; 534 /*< audio storage */};
535 535
536/*------------------------------------------------------------------------- 536/*-------------------------------------------------------------------------
537Access MACROS 537Access MACROS
538-------------------------------------------------------------------------*/ 538-------------------------------------------------------------------------*/
539/** 539/*
540* \brief Compilable references to attributes 540* \brief Compilable references to attributes
541* \param d pointer to demod instance 541* \param d pointer to demod instance
542* 542*
@@ -554,7 +554,7 @@ Access MACROS
554DEFINES 554DEFINES
555-------------------------------------------------------------------------*/ 555-------------------------------------------------------------------------*/
556 556
557/** 557/*
558* \def DRXJ_NTSC_CARRIER_FREQ_OFFSET 558* \def DRXJ_NTSC_CARRIER_FREQ_OFFSET
559* \brief Offset from picture carrier to centre frequency in kHz, in RF domain 559* \brief Offset from picture carrier to centre frequency in kHz, in RF domain
560* 560*
@@ -569,7 +569,7 @@ DEFINES
569*/ 569*/
570#define DRXJ_NTSC_CARRIER_FREQ_OFFSET ((s32)(1750)) 570#define DRXJ_NTSC_CARRIER_FREQ_OFFSET ((s32)(1750))
571 571
572/** 572/*
573* \def DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET 573* \def DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET
574* \brief Offset from picture carrier to centre frequency in kHz, in RF domain 574* \brief Offset from picture carrier to centre frequency in kHz, in RF domain
575* 575*
@@ -585,7 +585,7 @@ DEFINES
585*/ 585*/
586#define DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET ((s32)(2375)) 586#define DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET ((s32)(2375))
587 587
588/** 588/*
589* \def DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET 589* \def DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET
590* \brief Offset from picture carrier to centre frequency in kHz, in RF domain 590* \brief Offset from picture carrier to centre frequency in kHz, in RF domain
591* 591*
@@ -601,7 +601,7 @@ DEFINES
601*/ 601*/
602#define DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET ((s32)(2775)) 602#define DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET ((s32)(2775))
603 603
604/** 604/*
605* \def DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET 605* \def DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET
606* \brief Offset from picture carrier to centre frequency in kHz, in RF domain 606* \brief Offset from picture carrier to centre frequency in kHz, in RF domain
607* 607*
@@ -616,7 +616,7 @@ DEFINES
616*/ 616*/
617#define DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET ((s32)(-3255)) 617#define DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET ((s32)(-3255))
618 618
619/** 619/*
620* \def DRXJ_FM_CARRIER_FREQ_OFFSET 620* \def DRXJ_FM_CARRIER_FREQ_OFFSET
621* \brief Offset from sound carrier to centre frequency in kHz, in RF domain 621* \brief Offset from sound carrier to centre frequency in kHz, in RF domain
622* 622*
diff --git a/drivers/media/dvb-frontends/drxk.h b/drivers/media/dvb-frontends/drxk.h
index eb9bdc9f59c4..c936142367fb 100644
--- a/drivers/media/dvb-frontends/drxk.h
+++ b/drivers/media/dvb-frontends/drxk.h
@@ -20,17 +20,18 @@
20 * @antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1 20 * @antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1
21 * means that 1=DVBC, 0 = DVBT. Zero means the opposite. 21 * means that 1=DVBC, 0 = DVBT. Zero means the opposite.
22 * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength. 22 * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength.
23 * @chunk_size: maximum size for I2C messages
23 * @microcode_name: Name of the firmware file with the microcode 24 * @microcode_name: Name of the firmware file with the microcode
24 * @qam_demod_parameter_count: The number of parameters used for the command 25 * @qam_demod_parameter_count: The number of parameters used for the command
25 * to set the demodulator parameters. All 26 * to set the demodulator parameters. All
26 * firmwares are using the 2-parameter commmand. 27 * firmwares are using the 2-parameter commmand.
27 * An exception is the "drxk_a3.mc" firmware, 28 * An exception is the ``drxk_a3.mc`` firmware,
28 * which uses the 4-parameter command. 29 * which uses the 4-parameter command.
29 * A value of 0 (default) or lower indicates that 30 * A value of 0 (default) or lower indicates that
30 * the correct number of parameters will be 31 * the correct number of parameters will be
31 * automatically detected. 32 * automatically detected.
32 * 33 *
33 * On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is 34 * On the ``*_gpio`` vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is
34 * UIO-3. 35 * UIO-3.
35 */ 36 */
36struct drxk_config { 37struct drxk_config {
diff --git a/drivers/media/dvb-frontends/dvb-pll.h b/drivers/media/dvb-frontends/dvb-pll.h
index 6aaa9c6bff9c..01dbcc4d9550 100644
--- a/drivers/media/dvb-frontends/dvb-pll.h
+++ b/drivers/media/dvb-frontends/dvb-pll.h
@@ -33,11 +33,12 @@
33/** 33/**
34 * Attach a dvb-pll to the supplied frontend structure. 34 * Attach a dvb-pll to the supplied frontend structure.
35 * 35 *
36 * @param fe Frontend to attach to. 36 * @fe: Frontend to attach to.
37 * @param pll_addr i2c address of the PLL (if used). 37 * @pll_addr: i2c address of the PLL (if used).
38 * @param i2c i2c adapter to use (set to NULL if not used). 38 * @i2c: i2c adapter to use (set to NULL if not used).
39 * @param pll_desc_id dvb_pll_desc to use. 39 * @pll_desc_id: dvb_pll_desc to use.
40 * @return Frontend pointer on success, NULL on failure 40 *
41 * return: Frontend pointer on success, NULL on failure
41 */ 42 */
42#if IS_REACHABLE(CONFIG_DVB_PLL) 43#if IS_REACHABLE(CONFIG_DVB_PLL)
43extern struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, 44extern struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe,
diff --git a/drivers/media/dvb-frontends/helene.h b/drivers/media/dvb-frontends/helene.h
index 333615491d9e..3f504f5d1d4f 100644
--- a/drivers/media/dvb-frontends/helene.h
+++ b/drivers/media/dvb-frontends/helene.h
@@ -38,6 +38,7 @@ enum helene_xtal {
38 * @set_tuner_priv: Callback function private context 38 * @set_tuner_priv: Callback function private context
39 * @set_tuner_callback: Callback function that notifies the parent driver 39 * @set_tuner_callback: Callback function that notifies the parent driver
40 * which tuner is active now 40 * which tuner is active now
41 * @xtal: Cristal frequency as described by &enum helene_xtal
41 */ 42 */
42struct helene_config { 43struct helene_config {
43 u8 i2c_address; 44 u8 i2c_address;
diff --git a/drivers/media/dvb-frontends/ix2505v.h b/drivers/media/dvb-frontends/ix2505v.h
index 0b0a431c74f6..31ca03a7b827 100644
--- a/drivers/media/dvb-frontends/ix2505v.h
+++ b/drivers/media/dvb-frontends/ix2505v.h
@@ -19,14 +19,6 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include "dvb_frontend.h" 20#include "dvb_frontend.h"
21 21
22/**
23 * Attach a ix2505v tuner to the supplied frontend structure.
24 *
25 * @param fe Frontend to attach to.
26 * @param config ix2505v_config structure
27 * @return FE pointer on success, NULL on failure.
28 */
29
30struct ix2505v_config { 22struct ix2505v_config {
31 u8 tuner_address; 23 u8 tuner_address;
32 24
@@ -45,6 +37,15 @@ struct ix2505v_config {
45}; 37};
46 38
47#if IS_REACHABLE(CONFIG_DVB_IX2505V) 39#if IS_REACHABLE(CONFIG_DVB_IX2505V)
40/**
41 * Attach a ix2505v tuner to the supplied frontend structure.
42 *
43 * @fe: Frontend to attach to.
44 * @config: pointer to &struct ix2505v_config
45 * @i2c: pointer to &struct i2c_adapter.
46 *
47 * return: FE pointer on success, NULL on failure.
48 */
48extern struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe, 49extern struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
49 const struct ix2505v_config *config, struct i2c_adapter *i2c); 50 const struct ix2505v_config *config, struct i2c_adapter *i2c);
50#else 51#else
diff --git a/drivers/media/dvb-frontends/l64781.c b/drivers/media/dvb-frontends/l64781.c
index 68923c84679a..e5a6c1766664 100644
--- a/drivers/media/dvb-frontends/l64781.c
+++ b/drivers/media/dvb-frontends/l64781.c
@@ -517,7 +517,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config,
517 state->i2c = i2c; 517 state->i2c = i2c;
518 state->first = 1; 518 state->first = 1;
519 519
520 /** 520 /*
521 * the L64781 won't show up before we send the reset_and_configure() 521 * the L64781 won't show up before we send the reset_and_configure()
522 * broadcast. If nothing responds there is no L64781 on the bus... 522 * broadcast. If nothing responds there is no L64781 on the bus...
523 */ 523 */
diff --git a/drivers/media/dvb-frontends/mn88472.h b/drivers/media/dvb-frontends/mn88472.h
index 323632523876..8cd5ef61903b 100644
--- a/drivers/media/dvb-frontends/mn88472.h
+++ b/drivers/media/dvb-frontends/mn88472.h
@@ -19,21 +19,21 @@
19 19
20#include <linux/dvb/frontend.h> 20#include <linux/dvb/frontend.h>
21 21
22/* Define old names for backward compatibility */
23#define VARIABLE_TS_CLOCK MN88472_TS_CLK_VARIABLE
24#define FIXED_TS_CLOCK MN88472_TS_CLK_FIXED
25#define SERIAL_TS_MODE MN88472_TS_MODE_SERIAL
26#define PARALLEL_TS_MODE MN88472_TS_MODE_PARALLEL
27
22/** 28/**
23 * struct mn88472_config - Platform data for the mn88472 driver 29 * struct mn88472_config - Platform data for the mn88472 driver
24 * @xtal: Clock frequency. 30 * @xtal: Clock frequency.
25 * @ts_mode: TS mode. 31 * @ts_mode: TS mode.
26 * @ts_clock: TS clock config. 32 * @ts_clock: TS clock config.
27 * @i2c_wr_max: Max number of bytes driver writes to I2C at once. 33 * @i2c_wr_max: Max number of bytes driver writes to I2C at once.
28 * @get_dvb_frontend: Get DVB frontend. 34 * @fe: pointer to a frontend pointer
35 * @get_dvb_frontend: Get DVB frontend callback.
29 */ 36 */
30
31/* Define old names for backward compatibility */
32#define VARIABLE_TS_CLOCK MN88472_TS_CLK_VARIABLE
33#define FIXED_TS_CLOCK MN88472_TS_CLK_FIXED
34#define SERIAL_TS_MODE MN88472_TS_MODE_SERIAL
35#define PARALLEL_TS_MODE MN88472_TS_MODE_PARALLEL
36
37struct mn88472_config { 37struct mn88472_config {
38 unsigned int xtal; 38 unsigned int xtal;
39 39
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.h b/drivers/media/dvb-frontends/rtl2832_sdr.h
index d8fc7e7212e3..8f88c2fb8627 100644
--- a/drivers/media/dvb-frontends/rtl2832_sdr.h
+++ b/drivers/media/dvb-frontends/rtl2832_sdr.h
@@ -33,15 +33,11 @@
33 * struct rtl2832_sdr_platform_data - Platform data for the rtl2832_sdr driver 33 * struct rtl2832_sdr_platform_data - Platform data for the rtl2832_sdr driver
34 * @clk: Clock frequency (4000000, 16000000, 25000000, 28800000). 34 * @clk: Clock frequency (4000000, 16000000, 25000000, 28800000).
35 * @tuner: Used tuner model. 35 * @tuner: Used tuner model.
36 * @i2c_client: rtl2832 demod driver I2C client. 36 * @regmap: pointer to &struct regmap.
37 * @bulk_read: rtl2832 driver private I/O interface.
38 * @bulk_write: rtl2832 driver private I/O interface.
39 * @update_bits: rtl2832 driver private I/O interface.
40 * @dvb_frontend: rtl2832 DVB frontend. 37 * @dvb_frontend: rtl2832 DVB frontend.
41 * @v4l2_subdev: Tuner v4l2 controls. 38 * @v4l2_subdev: Tuner v4l2 controls.
42 * @dvb_usb_device: DVB USB interface for USB streaming. 39 * @dvb_usb_device: DVB USB interface for USB streaming.
43 */ 40 */
44
45struct rtl2832_sdr_platform_data { 41struct rtl2832_sdr_platform_data {
46 u32 clk; 42 u32 clk;
47 /* 43 /*
diff --git a/drivers/media/dvb-frontends/stb6000.h b/drivers/media/dvb-frontends/stb6000.h
index 78e75dfc317f..3c4d51dd5415 100644
--- a/drivers/media/dvb-frontends/stb6000.h
+++ b/drivers/media/dvb-frontends/stb6000.h
@@ -29,10 +29,11 @@
29/** 29/**
30 * Attach a stb6000 tuner to the supplied frontend structure. 30 * Attach a stb6000 tuner to the supplied frontend structure.
31 * 31 *
32 * @param fe Frontend to attach to. 32 * @fe: Frontend to attach to.
33 * @param addr i2c address of the tuner. 33 * @addr: i2c address of the tuner.
34 * @param i2c i2c adapter to use. 34 * @i2c: i2c adapter to use.
35 * @return FE pointer on success, NULL on failure. 35 *
36 * return: FE pointer on success, NULL on failure.
36 */ 37 */
37#if IS_REACHABLE(CONFIG_DVB_STB6000) 38#if IS_REACHABLE(CONFIG_DVB_STB6000)
38extern struct dvb_frontend *stb6000_attach(struct dvb_frontend *fe, int addr, 39extern struct dvb_frontend *stb6000_attach(struct dvb_frontend *fe, int addr,
diff --git a/drivers/media/dvb-frontends/stv0299.c b/drivers/media/dvb-frontends/stv0299.c
index b36b21a13201..b1f3d675d316 100644
--- a/drivers/media/dvb-frontends/stv0299.c
+++ b/drivers/media/dvb-frontends/stv0299.c
@@ -368,7 +368,7 @@ static int stv0299_set_voltage(struct dvb_frontend *fe,
368 reg0x08 = stv0299_readreg (state, 0x08); 368 reg0x08 = stv0299_readreg (state, 0x08);
369 reg0x0c = stv0299_readreg (state, 0x0c); 369 reg0x0c = stv0299_readreg (state, 0x0c);
370 370
371 /** 371 /*
372 * H/V switching over OP0, OP1 and OP2 are LNB power enable bits 372 * H/V switching over OP0, OP1 and OP2 are LNB power enable bits
373 */ 373 */
374 reg0x0c &= 0x0f; 374 reg0x0c &= 0x0f;
diff --git a/drivers/media/dvb-frontends/tda826x.h b/drivers/media/dvb-frontends/tda826x.h
index 81abe1aebe9f..6a7bed12e741 100644
--- a/drivers/media/dvb-frontends/tda826x.h
+++ b/drivers/media/dvb-frontends/tda826x.h
@@ -29,11 +29,12 @@
29/** 29/**
30 * Attach a tda826x tuner to the supplied frontend structure. 30 * Attach a tda826x tuner to the supplied frontend structure.
31 * 31 *
32 * @param fe Frontend to attach to. 32 * @fe: Frontend to attach to.
33 * @param addr i2c address of the tuner. 33 * @addr: i2c address of the tuner.
34 * @param i2c i2c adapter to use. 34 * @i2c: i2c adapter to use.
35 * @param has_loopthrough Set to 1 if the card has a loopthrough RF connector. 35 * @has_loopthrough: Set to 1 if the card has a loopthrough RF connector.
36 * @return FE pointer on success, NULL on failure. 36 *
37 * return: FE pointer on success, NULL on failure.
37 */ 38 */
38#if IS_REACHABLE(CONFIG_DVB_TDA826X) 39#if IS_REACHABLE(CONFIG_DVB_TDA826X)
39extern struct dvb_frontend* tda826x_attach(struct dvb_frontend *fe, int addr, 40extern struct dvb_frontend* tda826x_attach(struct dvb_frontend *fe, int addr,
diff --git a/drivers/media/dvb-frontends/tua6100.h b/drivers/media/dvb-frontends/tua6100.h
index 9f15cbdfdeca..6c098a894ea6 100644
--- a/drivers/media/dvb-frontends/tua6100.h
+++ b/drivers/media/dvb-frontends/tua6100.h
@@ -1,4 +1,4 @@
1/** 1/*
2 * Driver for Infineon tua6100 PLL. 2 * Driver for Infineon tua6100 PLL.
3 * 3 *
4 * (c) 2006 Andrew de Quincey 4 * (c) 2006 Andrew de Quincey
diff --git a/drivers/media/dvb-frontends/zd1301_demod.h b/drivers/media/dvb-frontends/zd1301_demod.h
index ceb2e05e873c..9496f7e8b4dd 100644
--- a/drivers/media/dvb-frontends/zd1301_demod.h
+++ b/drivers/media/dvb-frontends/zd1301_demod.h
@@ -27,7 +27,6 @@
27 * @reg_read: Register read callback. 27 * @reg_read: Register read callback.
28 * @reg_write: Register write callback. 28 * @reg_write: Register write callback.
29 */ 29 */
30
31struct zd1301_demod_platform_data { 30struct zd1301_demod_platform_data {
32 void *reg_priv; 31 void *reg_priv;
33 int (*reg_read)(void *, u16, u8 *); 32 int (*reg_read)(void *, u16, u8 *);
@@ -41,8 +40,7 @@ struct zd1301_demod_platform_data {
41 * 40 *
42 * Return: Pointer to DVB frontend which given platform device owns. 41 * Return: Pointer to DVB frontend which given platform device owns.
43 */ 42 */
44 43struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *pdev);
45struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *);
46 44
47/** 45/**
48 * zd1301_demod_get_i2c_adapter() - Get pointer to I2C adapter 46 * zd1301_demod_get_i2c_adapter() - Get pointer to I2C adapter
@@ -50,8 +48,7 @@ struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *);
50 * 48 *
51 * Return: Pointer to I2C adapter which given platform device owns. 49 * Return: Pointer to I2C adapter which given platform device owns.
52 */ 50 */
53 51struct i2c_adapter *zd1301_demod_get_i2c_adapter(struct platform_device *pdev);
54struct i2c_adapter *zd1301_demod_get_i2c_adapter(struct platform_device *);
55 52
56#else 53#else
57 54
diff --git a/drivers/media/dvb-frontends/zl10036.h b/drivers/media/dvb-frontends/zl10036.h
index 88751adfecf7..ec90ca927739 100644
--- a/drivers/media/dvb-frontends/zl10036.h
+++ b/drivers/media/dvb-frontends/zl10036.h
@@ -20,20 +20,20 @@
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include "dvb_frontend.h" 21#include "dvb_frontend.h"
22 22
23/**
24 * Attach a zl10036 tuner to the supplied frontend structure.
25 *
26 * @param fe Frontend to attach to.
27 * @param config zl10036_config structure
28 * @return FE pointer on success, NULL on failure.
29 */
30
31struct zl10036_config { 23struct zl10036_config {
32 u8 tuner_address; 24 u8 tuner_address;
33 int rf_loop_enable; 25 int rf_loop_enable;
34}; 26};
35 27
36#if IS_REACHABLE(CONFIG_DVB_ZL10036) 28#if IS_REACHABLE(CONFIG_DVB_ZL10036)
29/**
30 * Attach a zl10036 tuner to the supplied frontend structure.
31 *
32 * @fe: Frontend to attach to.
33 * @config: zl10036_config structure.
34 * @i2c: pointer to struct i2c_adapter.
35 * return: FE pointer on success, NULL on failure.
36 */
37extern struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe, 37extern struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe,
38 const struct zl10036_config *config, struct i2c_adapter *i2c); 38 const struct zl10036_config *config, struct i2c_adapter *i2c);
39#else 39#else
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-29 19:08:35 -0400