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authorAntoine Tenart <antoine.tenart@free-electrons.com>2015-05-15 19:48:08 -0400
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2015-05-18 12:10:11 -0400
commitb8b59d4cb7a3d1f5b048a2e33563773e9b1183f5 (patch)
tree1a9ad1a4f53ec8f0ddbcef466eb11a78c088c908
parent18df8165a022d83ec928c0fca5590310f4b61ec4 (diff)
ARM: berlin: move BG2CD clock node
With the introduction of the Berlin simple-mfd controller driver, all drivers previously sharing the chip and system controller nodes now have their own sub-node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/berlin2cd.dtsi38
1 files changed, 21 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 7544fea43e3a..6ff0194cf77d 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -53,7 +53,7 @@
53 sdhci0: sdhci@ab0000 { 53 sdhci0: sdhci@ab0000 {
54 compatible = "mrvl,pxav3-mmc"; 54 compatible = "mrvl,pxav3-mmc";
55 reg = <0xab0000 0x200>; 55 reg = <0xab0000 0x200>;
56 clocks = <&chip CLKID_SDIO0XIN>, <&chip CLKID_SDIO0>; 56 clocks = <&chip_clk CLKID_SDIO0XIN>, <&chip_clk CLKID_SDIO0>;
57 clock-names = "io", "core"; 57 clock-names = "io", "core";
58 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 58 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
59 status = "disabled"; 59 status = "disabled";
@@ -77,7 +77,7 @@
77 compatible = "arm,cortex-a9-twd-timer"; 77 compatible = "arm,cortex-a9-twd-timer";
78 reg = <0xad0600 0x20>; 78 reg = <0xad0600 0x20>;
79 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 79 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
80 clocks = <&chip CLKID_TWD>; 80 clocks = <&chip_clk CLKID_TWD>;
81 }; 81 };
82 82
83 usb_phy0: usb-phy@b74000 { 83 usb_phy0: usb-phy@b74000 {
@@ -99,7 +99,7 @@
99 eth1: ethernet@b90000 { 99 eth1: ethernet@b90000 {
100 compatible = "marvell,pxa168-eth"; 100 compatible = "marvell,pxa168-eth";
101 reg = <0xb90000 0x10000>; 101 reg = <0xb90000 0x10000>;
102 clocks = <&chip CLKID_GETH1>; 102 clocks = <&chip_clk CLKID_GETH1>;
103 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 103 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
104 /* set by bootloader */ 104 /* set by bootloader */
105 local-mac-address = [00 00 00 00 00 00]; 105 local-mac-address = [00 00 00 00 00 00];
@@ -117,7 +117,7 @@
117 eth0: ethernet@e50000 { 117 eth0: ethernet@e50000 {
118 compatible = "marvell,pxa168-eth"; 118 compatible = "marvell,pxa168-eth";
119 reg = <0xe50000 0x10000>; 119 reg = <0xe50000 0x10000>;
120 clocks = <&chip CLKID_GETH0>; 120 clocks = <&chip_clk CLKID_GETH0>;
121 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 121 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
122 /* set by bootloader */ 122 /* set by bootloader */
123 local-mac-address = [00 00 00 00 00 00]; 123 local-mac-address = [00 00 00 00 00 00];
@@ -216,7 +216,7 @@
216 compatible = "snps,dw-apb-timer"; 216 compatible = "snps,dw-apb-timer";
217 reg = <0x2c00 0x14>; 217 reg = <0x2c00 0x14>;
218 interrupts = <8>; 218 interrupts = <8>;
219 clocks = <&chip CLKID_CFG>; 219 clocks = <&chip_clk CLKID_CFG>;
220 clock-names = "timer"; 220 clock-names = "timer";
221 status = "okay"; 221 status = "okay";
222 }; 222 };
@@ -225,7 +225,7 @@
225 compatible = "snps,dw-apb-timer"; 225 compatible = "snps,dw-apb-timer";
226 reg = <0x2c14 0x14>; 226 reg = <0x2c14 0x14>;
227 interrupts = <9>; 227 interrupts = <9>;
228 clocks = <&chip CLKID_CFG>; 228 clocks = <&chip_clk CLKID_CFG>;
229 clock-names = "timer"; 229 clock-names = "timer";
230 status = "okay"; 230 status = "okay";
231 }; 231 };
@@ -234,7 +234,7 @@
234 compatible = "snps,dw-apb-timer"; 234 compatible = "snps,dw-apb-timer";
235 reg = <0x2c28 0x14>; 235 reg = <0x2c28 0x14>;
236 interrupts = <10>; 236 interrupts = <10>;
237 clocks = <&chip CLKID_CFG>; 237 clocks = <&chip_clk CLKID_CFG>;
238 clock-names = "timer"; 238 clock-names = "timer";
239 status = "disabled"; 239 status = "disabled";
240 }; 240 };
@@ -243,7 +243,7 @@
243 compatible = "snps,dw-apb-timer"; 243 compatible = "snps,dw-apb-timer";
244 reg = <0x2c3c 0x14>; 244 reg = <0x2c3c 0x14>;
245 interrupts = <11>; 245 interrupts = <11>;
246 clocks = <&chip CLKID_CFG>; 246 clocks = <&chip_clk CLKID_CFG>;
247 clock-names = "timer"; 247 clock-names = "timer";
248 status = "disabled"; 248 status = "disabled";
249 }; 249 };
@@ -252,7 +252,7 @@
252 compatible = "snps,dw-apb-timer"; 252 compatible = "snps,dw-apb-timer";
253 reg = <0x2c50 0x14>; 253 reg = <0x2c50 0x14>;
254 interrupts = <12>; 254 interrupts = <12>;
255 clocks = <&chip CLKID_CFG>; 255 clocks = <&chip_clk CLKID_CFG>;
256 clock-names = "timer"; 256 clock-names = "timer";
257 status = "disabled"; 257 status = "disabled";
258 }; 258 };
@@ -261,7 +261,7 @@
261 compatible = "snps,dw-apb-timer"; 261 compatible = "snps,dw-apb-timer";
262 reg = <0x2c64 0x14>; 262 reg = <0x2c64 0x14>;
263 interrupts = <13>; 263 interrupts = <13>;
264 clocks = <&chip CLKID_CFG>; 264 clocks = <&chip_clk CLKID_CFG>;
265 clock-names = "timer"; 265 clock-names = "timer";
266 status = "disabled"; 266 status = "disabled";
267 }; 267 };
@@ -270,7 +270,7 @@
270 compatible = "snps,dw-apb-timer"; 270 compatible = "snps,dw-apb-timer";
271 reg = <0x2c78 0x14>; 271 reg = <0x2c78 0x14>;
272 interrupts = <14>; 272 interrupts = <14>;
273 clocks = <&chip CLKID_CFG>; 273 clocks = <&chip_clk CLKID_CFG>;
274 clock-names = "timer"; 274 clock-names = "timer";
275 status = "disabled"; 275 status = "disabled";
276 }; 276 };
@@ -279,7 +279,7 @@
279 compatible = "snps,dw-apb-timer"; 279 compatible = "snps,dw-apb-timer";
280 reg = <0x2c8c 0x14>; 280 reg = <0x2c8c 0x14>;
281 interrupts = <15>; 281 interrupts = <15>;
282 clocks = <&chip CLKID_CFG>; 282 clocks = <&chip_clk CLKID_CFG>;
283 clock-names = "timer"; 283 clock-names = "timer";
284 status = "disabled"; 284 status = "disabled";
285 }; 285 };
@@ -296,10 +296,14 @@
296 296
297 chip: chip-control@ea0000 { 297 chip: chip-control@ea0000 {
298 compatible = "marvell,berlin2cd-chip-ctrl", "simple-mfd", "syscon"; 298 compatible = "marvell,berlin2cd-chip-ctrl", "simple-mfd", "syscon";
299 #clock-cells = <1>;
300 reg = <0xea0000 0x400>; 299 reg = <0xea0000 0x400>;
301 clocks = <&refclk>; 300
302 clock-names = "refclk"; 301 chip_clk: clock {
302 compatible = "marvell,berlin2-clk";
303 #clock-cells = <1>;
304 clocks = <&refclk>;
305 clock-names = "refclk";
306 };
303 307
304 soc_pinctrl: pin-controller { 308 soc_pinctrl: pin-controller {
305 compatible = "marvell,berlin2cd-soc-pinctrl"; 309 compatible = "marvell,berlin2cd-soc-pinctrl";
@@ -320,7 +324,7 @@
320 compatible = "chipidea,usb2"; 324 compatible = "chipidea,usb2";
321 reg = <0xed0000 0x200>; 325 reg = <0xed0000 0x200>;
322 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 326 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
323 clocks = <&chip CLKID_USB0>; 327 clocks = <&chip_clk CLKID_USB0>;
324 phys = <&usb_phy0>; 328 phys = <&usb_phy0>;
325 phy-names = "usb-phy"; 329 phy-names = "usb-phy";
326 status = "disabled"; 330 status = "disabled";
@@ -330,7 +334,7 @@
330 compatible = "chipidea,usb2"; 334 compatible = "chipidea,usb2";
331 reg = <0xee0000 0x200>; 335 reg = <0xee0000 0x200>;
332 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 336 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
333 clocks = <&chip CLKID_USB1>; 337 clocks = <&chip_clk CLKID_USB1>;
334 phys = <&usb_phy1>; 338 phys = <&usb_phy1>;
335 phy-names = "usb-phy"; 339 phy-names = "usb-phy";
336 status = "disabled"; 340 status = "disabled";
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 03:50:10 -0400