diff options
author | Vignesh R <vigneshr@ti.com> | 2018-09-28 02:04:42 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2018-09-28 13:27:17 -0400 |
commit | b830526f304764753fcb8b4a563a94080e982a6c (patch) | |
tree | 7cc8b703f9842552b6500d638f7910850f1ed6b2 | |
parent | 6d0af44a82be87c13f2320821e9fbb8b8cf5a56f (diff) |
ARM: dts: dra7: Enable workaround for errata i870 in PCIe host mode
Add ti,syscon-unaligned-access property to PCIe RC nodes to set
appropriate bits in CTRL_CORE_SMA_SW_7 register to enable workaround for
errata i870.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 9136b3cf9a2c..7ce24b282d42 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi | |||
@@ -336,6 +336,7 @@ | |||
336 | <0 0 0 2 &pcie1_intc 2>, | 336 | <0 0 0 2 &pcie1_intc 2>, |
337 | <0 0 0 3 &pcie1_intc 3>, | 337 | <0 0 0 3 &pcie1_intc 3>, |
338 | <0 0 0 4 &pcie1_intc 4>; | 338 | <0 0 0 4 &pcie1_intc 4>; |
339 | ti,syscon-unaligned-access = <&scm_conf1 0x14 1>; | ||
339 | status = "disabled"; | 340 | status = "disabled"; |
340 | pcie1_intc: interrupt-controller { | 341 | pcie1_intc: interrupt-controller { |
341 | interrupt-controller; | 342 | interrupt-controller; |
@@ -387,6 +388,7 @@ | |||
387 | <0 0 0 2 &pcie2_intc 2>, | 388 | <0 0 0 2 &pcie2_intc 2>, |
388 | <0 0 0 3 &pcie2_intc 3>, | 389 | <0 0 0 3 &pcie2_intc 3>, |
389 | <0 0 0 4 &pcie2_intc 4>; | 390 | <0 0 0 4 &pcie2_intc 4>; |
391 | ti,syscon-unaligned-access = <&scm_conf1 0x14 2>; | ||
390 | pcie2_intc: interrupt-controller { | 392 | pcie2_intc: interrupt-controller { |
391 | interrupt-controller; | 393 | interrupt-controller; |
392 | #address-cells = <0>; | 394 | #address-cells = <0>; |