diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-11 15:11:23 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-11 15:11:23 -0400 |
| commit | b70c9d37f6b5e539798699ad4b48ed3fcd9ce282 (patch) | |
| tree | 7708fd845e624892b4bf0c46cf967490632390e5 | |
| parent | 6f75edeadd0dd3d58017bc3bcdc2b80879a7cfd3 (diff) | |
| parent | 4725496e4872824fa6182d412c66c00cae978a62 (diff) | |
Merge tag 'rproc-v4.18' of git://github.com/andersson/remoteproc
Pull remoteproc updates from Bjorn Andersson:
"This brings a few minor fixes to the Davinci driver, drops a orphan
include file from the StE cleanup done ealier and introduces support
for booting the modem on Qualcomm's SDM845 platform"
* tag 'rproc-v4.18' of git://github.com/andersson/remoteproc:
remoteproc: q6v5: Allow defining GLINK edge for mss remoteproc
remoteproc: q6v5: Add support for mss remoteproc on SDM845
remoteproc: q6v5: Introduce reset assert/deassert helper functions
dt-bindings: remoteproc: Add Q6v5 Modem PIL binding for SDM845
remoteproc: q6v5: Move proxy unvote to handover irq handler
remoteproc: q6v5: Return irq from q6v5_request_irq()
remoteproc/ste: remove abandoned include file
remoteproc/davinci: use octal permissions for module_param()
remoteproc/davinci: prepare and unprepare the clock where needed
remoteproc/davinci: add the missing retval check for clk_enable()
remoteproc: Remove depends on HAS_DMA in case of platform dependency
remoteproc: Prevent incorrect rproc state on xfer mem ownership failure
| -rw-r--r-- | Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 1 | ||||
| -rw-r--r-- | drivers/remoteproc/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/remoteproc/da8xx_remoteproc.c | 12 | ||||
| -rw-r--r-- | drivers/remoteproc/qcom_q6v5_pil.c | 201 | ||||
| -rw-r--r-- | include/linux/ste_modem_shm.h | 56 |
5 files changed, 188 insertions, 83 deletions
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 00d3d58a102f..d90182425450 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | |||
| @@ -11,6 +11,7 @@ on the Qualcomm Hexagon core. | |||
| 11 | "qcom,msm8916-mss-pil", | 11 | "qcom,msm8916-mss-pil", |
| 12 | "qcom,msm8974-mss-pil" | 12 | "qcom,msm8974-mss-pil" |
| 13 | "qcom,msm8996-mss-pil" | 13 | "qcom,msm8996-mss-pil" |
| 14 | "qcom,sdm845-mss-pil" | ||
| 14 | 15 | ||
| 15 | - reg: | 16 | - reg: |
| 16 | Usage: required | 17 | Usage: required |
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 027274008b08..cd1c168fd188 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig | |||
| @@ -24,7 +24,6 @@ config IMX_REMOTEPROC | |||
| 24 | 24 | ||
| 25 | config OMAP_REMOTEPROC | 25 | config OMAP_REMOTEPROC |
| 26 | tristate "OMAP remoteproc support" | 26 | tristate "OMAP remoteproc support" |
| 27 | depends on HAS_DMA | ||
| 28 | depends on ARCH_OMAP4 || SOC_OMAP5 | 27 | depends on ARCH_OMAP4 || SOC_OMAP5 |
| 29 | depends on OMAP_IOMMU | 28 | depends on OMAP_IOMMU |
| 30 | select MAILBOX | 29 | select MAILBOX |
diff --git a/drivers/remoteproc/da8xx_remoteproc.c b/drivers/remoteproc/da8xx_remoteproc.c index bf3b9034c319..b668e32996e2 100644 --- a/drivers/remoteproc/da8xx_remoteproc.c +++ b/drivers/remoteproc/da8xx_remoteproc.c | |||
| @@ -25,7 +25,7 @@ | |||
| 25 | #include "remoteproc_internal.h" | 25 | #include "remoteproc_internal.h" |
| 26 | 26 | ||
| 27 | static char *da8xx_fw_name; | 27 | static char *da8xx_fw_name; |
| 28 | module_param(da8xx_fw_name, charp, S_IRUGO); | 28 | module_param(da8xx_fw_name, charp, 0444); |
| 29 | MODULE_PARM_DESC(da8xx_fw_name, | 29 | MODULE_PARM_DESC(da8xx_fw_name, |
| 30 | "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')"); | 30 | "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')"); |
| 31 | 31 | ||
| @@ -138,6 +138,7 @@ static int da8xx_rproc_start(struct rproc *rproc) | |||
| 138 | struct device *dev = rproc->dev.parent; | 138 | struct device *dev = rproc->dev.parent; |
| 139 | struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; | 139 | struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; |
| 140 | struct clk *dsp_clk = drproc->dsp_clk; | 140 | struct clk *dsp_clk = drproc->dsp_clk; |
| 141 | int ret; | ||
| 141 | 142 | ||
| 142 | /* hw requires the start (boot) address be on 1KB boundary */ | 143 | /* hw requires the start (boot) address be on 1KB boundary */ |
| 143 | if (rproc->bootaddr & 0x3ff) { | 144 | if (rproc->bootaddr & 0x3ff) { |
| @@ -148,7 +149,12 @@ static int da8xx_rproc_start(struct rproc *rproc) | |||
| 148 | 149 | ||
| 149 | writel(rproc->bootaddr, drproc->bootreg); | 150 | writel(rproc->bootaddr, drproc->bootreg); |
| 150 | 151 | ||
| 151 | clk_enable(dsp_clk); | 152 | ret = clk_prepare_enable(dsp_clk); |
| 153 | if (ret) { | ||
| 154 | dev_err(dev, "clk_prepare_enable() failed: %d\n", ret); | ||
| 155 | return ret; | ||
| 156 | } | ||
| 157 | |||
| 152 | davinci_clk_reset_deassert(dsp_clk); | 158 | davinci_clk_reset_deassert(dsp_clk); |
| 153 | 159 | ||
| 154 | return 0; | 160 | return 0; |
| @@ -159,7 +165,7 @@ static int da8xx_rproc_stop(struct rproc *rproc) | |||
| 159 | struct da8xx_rproc *drproc = rproc->priv; | 165 | struct da8xx_rproc *drproc = rproc->priv; |
| 160 | 166 | ||
| 161 | davinci_clk_reset_assert(drproc->dsp_clk); | 167 | davinci_clk_reset_assert(drproc->dsp_clk); |
| 162 | clk_disable(drproc->dsp_clk); | 168 | clk_disable_unprepare(drproc->dsp_clk); |
| 163 | 169 | ||
| 164 | return 0; | 170 | return 0; |
| 165 | } | 171 | } |
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index cbbafdcaaecb..2190debf3d35 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c | |||
| @@ -57,6 +57,8 @@ | |||
| 57 | #define RMB_PMI_META_DATA_REG 0x10 | 57 | #define RMB_PMI_META_DATA_REG 0x10 |
| 58 | #define RMB_PMI_CODE_START_REG 0x14 | 58 | #define RMB_PMI_CODE_START_REG 0x14 |
| 59 | #define RMB_PMI_CODE_LENGTH_REG 0x18 | 59 | #define RMB_PMI_CODE_LENGTH_REG 0x18 |
| 60 | #define RMB_MBA_MSS_STATUS 0x40 | ||
| 61 | #define RMB_MBA_ALT_RESET 0x44 | ||
| 60 | 62 | ||
| 61 | #define RMB_CMD_META_DATA_READY 0x1 | 63 | #define RMB_CMD_META_DATA_READY 0x1 |
| 62 | #define RMB_CMD_LOAD_READY 0x2 | 64 | #define RMB_CMD_LOAD_READY 0x2 |
| @@ -104,6 +106,13 @@ | |||
| 104 | #define QDSP6SS_XO_CBCR 0x0038 | 106 | #define QDSP6SS_XO_CBCR 0x0038 |
| 105 | #define QDSP6SS_ACC_OVERRIDE_VAL 0x20 | 107 | #define QDSP6SS_ACC_OVERRIDE_VAL 0x20 |
| 106 | 108 | ||
| 109 | /* QDSP6v65 parameters */ | ||
| 110 | #define QDSP6SS_SLEEP 0x3C | ||
| 111 | #define QDSP6SS_BOOT_CORE_START 0x400 | ||
| 112 | #define QDSP6SS_BOOT_CMD 0x404 | ||
| 113 | #define SLEEP_CHECK_MAX_LOOPS 200 | ||
| 114 | #define BOOT_FSM_TIMEOUT 10000 | ||
| 115 | |||
| 107 | struct reg_info { | 116 | struct reg_info { |
| 108 | struct regulator *reg; | 117 | struct regulator *reg; |
| 109 | int uV; | 118 | int uV; |
| @@ -121,9 +130,11 @@ struct rproc_hexagon_res { | |||
| 121 | struct qcom_mss_reg_res *proxy_supply; | 130 | struct qcom_mss_reg_res *proxy_supply; |
| 122 | struct qcom_mss_reg_res *active_supply; | 131 | struct qcom_mss_reg_res *active_supply; |
| 123 | char **proxy_clk_names; | 132 | char **proxy_clk_names; |
| 133 | char **reset_clk_names; | ||
| 124 | char **active_clk_names; | 134 | char **active_clk_names; |
| 125 | int version; | 135 | int version; |
| 126 | bool need_mem_protection; | 136 | bool need_mem_protection; |
| 137 | bool has_alt_reset; | ||
| 127 | }; | 138 | }; |
| 128 | 139 | ||
| 129 | struct q6v5 { | 140 | struct q6v5 { |
| @@ -143,9 +154,15 @@ struct q6v5 { | |||
| 143 | struct qcom_smem_state *state; | 154 | struct qcom_smem_state *state; |
| 144 | unsigned stop_bit; | 155 | unsigned stop_bit; |
| 145 | 156 | ||
| 157 | int handover_irq; | ||
| 158 | |||
| 159 | bool proxy_unvoted; | ||
| 160 | |||
| 146 | struct clk *active_clks[8]; | 161 | struct clk *active_clks[8]; |
| 162 | struct clk *reset_clks[4]; | ||
| 147 | struct clk *proxy_clks[4]; | 163 | struct clk *proxy_clks[4]; |
| 148 | int active_clk_count; | 164 | int active_clk_count; |
| 165 | int reset_clk_count; | ||
| 149 | int proxy_clk_count; | 166 | int proxy_clk_count; |
| 150 | 167 | ||
| 151 | struct reg_info active_regs[1]; | 168 | struct reg_info active_regs[1]; |
| @@ -166,10 +183,12 @@ struct q6v5 { | |||
| 166 | void *mpss_region; | 183 | void *mpss_region; |
| 167 | size_t mpss_size; | 184 | size_t mpss_size; |
| 168 | 185 | ||
| 186 | struct qcom_rproc_glink glink_subdev; | ||
| 169 | struct qcom_rproc_subdev smd_subdev; | 187 | struct qcom_rproc_subdev smd_subdev; |
| 170 | struct qcom_rproc_ssr ssr_subdev; | 188 | struct qcom_rproc_ssr ssr_subdev; |
| 171 | struct qcom_sysmon *sysmon; | 189 | struct qcom_sysmon *sysmon; |
| 172 | bool need_mem_protection; | 190 | bool need_mem_protection; |
| 191 | bool has_alt_reset; | ||
| 173 | int mpss_perm; | 192 | int mpss_perm; |
| 174 | int mba_perm; | 193 | int mba_perm; |
| 175 | int version; | 194 | int version; |
| @@ -179,6 +198,7 @@ enum { | |||
| 179 | MSS_MSM8916, | 198 | MSS_MSM8916, |
| 180 | MSS_MSM8974, | 199 | MSS_MSM8974, |
| 181 | MSS_MSM8996, | 200 | MSS_MSM8996, |
| 201 | MSS_SDM845, | ||
| 182 | }; | 202 | }; |
| 183 | 203 | ||
| 184 | static int q6v5_regulator_init(struct device *dev, struct reg_info *regs, | 204 | static int q6v5_regulator_init(struct device *dev, struct reg_info *regs, |
| @@ -333,6 +353,29 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw) | |||
| 333 | return 0; | 353 | return 0; |
| 334 | } | 354 | } |
| 335 | 355 | ||
| 356 | static int q6v5_reset_assert(struct q6v5 *qproc) | ||
| 357 | { | ||
| 358 | if (qproc->has_alt_reset) | ||
| 359 | return reset_control_reset(qproc->mss_restart); | ||
| 360 | else | ||
| 361 | return reset_control_assert(qproc->mss_restart); | ||
| 362 | } | ||
| 363 | |||
| 364 | static int q6v5_reset_deassert(struct q6v5 *qproc) | ||
| 365 | { | ||
| 366 | int ret; | ||
| 367 | |||
| 368 | if (qproc->has_alt_reset) { | ||
| 369 | writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); | ||
| 370 | ret = reset_control_reset(qproc->mss_restart); | ||
| 371 | writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); | ||
| 372 | } else { | ||
| 373 | ret = reset_control_deassert(qproc->mss_restart); | ||
| 374 | } | ||
| 375 | |||
| 376 | return ret; | ||
| 377 | } | ||
| 378 | |||
| 336 | static int q6v5_rmb_pbl_wait(struct q6v5 *qproc, int ms) | 379 | static int q6v5_rmb_pbl_wait(struct q6v5 *qproc, int ms) |
| 337 | { | 380 | { |
| 338 | unsigned long timeout; | 381 | unsigned long timeout; |
| @@ -385,8 +428,35 @@ static int q6v5proc_reset(struct q6v5 *qproc) | |||
| 385 | int ret; | 428 | int ret; |
| 386 | int i; | 429 | int i; |
| 387 | 430 | ||
| 431 | if (qproc->version == MSS_SDM845) { | ||
| 432 | val = readl(qproc->reg_base + QDSP6SS_SLEEP); | ||
| 433 | val |= 0x1; | ||
| 434 | writel(val, qproc->reg_base + QDSP6SS_SLEEP); | ||
| 388 | 435 | ||
| 389 | if (qproc->version == MSS_MSM8996) { | 436 | ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, |
| 437 | val, !(val & BIT(31)), 1, | ||
| 438 | SLEEP_CHECK_MAX_LOOPS); | ||
| 439 | if (ret) { | ||
| 440 | dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); | ||
| 441 | return -ETIMEDOUT; | ||
| 442 | } | ||
| 443 | |||
| 444 | /* De-assert QDSP6 stop core */ | ||
| 445 | writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); | ||
| 446 | /* Trigger boot FSM */ | ||
| 447 | writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); | ||
| 448 | |||
| 449 | ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, | ||
| 450 | val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT); | ||
| 451 | if (ret) { | ||
| 452 | dev_err(qproc->dev, "Boot FSM failed to complete.\n"); | ||
| 453 | /* Reset the modem so that boot FSM is in reset state */ | ||
| 454 | q6v5_reset_deassert(qproc); | ||
| 455 | return ret; | ||
| 456 | } | ||
| 457 | |||
| 458 | goto pbl_wait; | ||
| 459 | } else if (qproc->version == MSS_MSM8996) { | ||
| 390 | /* Override the ACC value if required */ | 460 | /* Override the ACC value if required */ |
| 391 | writel(QDSP6SS_ACC_OVERRIDE_VAL, | 461 | writel(QDSP6SS_ACC_OVERRIDE_VAL, |
| 392 | qproc->reg_base + QDSP6SS_STRAP_ACC); | 462 | qproc->reg_base + QDSP6SS_STRAP_ACC); |
| @@ -494,6 +564,7 @@ static int q6v5proc_reset(struct q6v5 *qproc) | |||
| 494 | val &= ~Q6SS_STOP_CORE; | 564 | val &= ~Q6SS_STOP_CORE; |
| 495 | writel(val, qproc->reg_base + QDSP6SS_RESET_REG); | 565 | writel(val, qproc->reg_base + QDSP6SS_RESET_REG); |
| 496 | 566 | ||
| 567 | pbl_wait: | ||
| 497 | /* Wait for PBL status */ | 568 | /* Wait for PBL status */ |
| 498 | ret = q6v5_rmb_pbl_wait(qproc, 1000); | 569 | ret = q6v5_rmb_pbl_wait(qproc, 1000); |
| 499 | if (ret == -ETIMEDOUT) { | 570 | if (ret == -ETIMEDOUT) { |
| @@ -727,11 +798,15 @@ static int q6v5_start(struct rproc *rproc) | |||
| 727 | int xfermemop_ret; | 798 | int xfermemop_ret; |
| 728 | int ret; | 799 | int ret; |
| 729 | 800 | ||
| 801 | qproc->proxy_unvoted = false; | ||
| 802 | |||
| 803 | enable_irq(qproc->handover_irq); | ||
| 804 | |||
| 730 | ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, | 805 | ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, |
| 731 | qproc->proxy_reg_count); | 806 | qproc->proxy_reg_count); |
| 732 | if (ret) { | 807 | if (ret) { |
| 733 | dev_err(qproc->dev, "failed to enable proxy supplies\n"); | 808 | dev_err(qproc->dev, "failed to enable proxy supplies\n"); |
| 734 | return ret; | 809 | goto disable_irqs; |
| 735 | } | 810 | } |
| 736 | 811 | ||
| 737 | ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, | 812 | ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, |
| @@ -747,12 +822,20 @@ static int q6v5_start(struct rproc *rproc) | |||
| 747 | dev_err(qproc->dev, "failed to enable supplies\n"); | 822 | dev_err(qproc->dev, "failed to enable supplies\n"); |
| 748 | goto disable_proxy_clk; | 823 | goto disable_proxy_clk; |
| 749 | } | 824 | } |
| 750 | ret = reset_control_deassert(qproc->mss_restart); | 825 | |
| 826 | ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, | ||
| 827 | qproc->reset_clk_count); | ||
| 751 | if (ret) { | 828 | if (ret) { |
| 752 | dev_err(qproc->dev, "failed to deassert mss restart\n"); | 829 | dev_err(qproc->dev, "failed to enable reset clocks\n"); |
| 753 | goto disable_vdd; | 830 | goto disable_vdd; |
| 754 | } | 831 | } |
| 755 | 832 | ||
| 833 | ret = q6v5_reset_deassert(qproc); | ||
| 834 | if (ret) { | ||
| 835 | dev_err(qproc->dev, "failed to deassert mss restart\n"); | ||
| 836 | goto disable_reset_clks; | ||
| 837 | } | ||
| 838 | |||
| 756 | ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, | 839 | ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, |
| 757 | qproc->active_clk_count); | 840 | qproc->active_clk_count); |
| 758 | if (ret) { | 841 | if (ret) { |
| @@ -761,13 +844,11 @@ static int q6v5_start(struct rproc *rproc) | |||
| 761 | } | 844 | } |
| 762 | 845 | ||
| 763 | /* Assign MBA image access in DDR to q6 */ | 846 | /* Assign MBA image access in DDR to q6 */ |
| 764 | xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, | 847 | ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, |
| 765 | qproc->mba_phys, | 848 | qproc->mba_phys, qproc->mba_size); |
| 766 | qproc->mba_size); | 849 | if (ret) { |
| 767 | if (xfermemop_ret) { | ||
| 768 | dev_err(qproc->dev, | 850 | dev_err(qproc->dev, |
| 769 | "assigning Q6 access to mba memory failed: %d\n", | 851 | "assigning Q6 access to mba memory failed: %d\n", ret); |
| 770 | xfermemop_ret); | ||
| 771 | goto disable_active_clks; | 852 | goto disable_active_clks; |
| 772 | } | 853 | } |
| 773 | 854 | ||
| @@ -810,11 +891,6 @@ static int q6v5_start(struct rproc *rproc) | |||
| 810 | "Failed to reclaim mba buffer system may become unstable\n"); | 891 | "Failed to reclaim mba buffer system may become unstable\n"); |
| 811 | qproc->running = true; | 892 | qproc->running = true; |
| 812 | 893 | ||
| 813 | q6v5_clk_disable(qproc->dev, qproc->proxy_clks, | ||
| 814 | qproc->proxy_clk_count); | ||
| 815 | q6v5_regulator_disable(qproc, qproc->proxy_regs, | ||
| 816 | qproc->proxy_reg_count); | ||
| 817 | |||
| 818 | return 0; | 894 | return 0; |
| 819 | 895 | ||
| 820 | reclaim_mpss: | 896 | reclaim_mpss: |
| @@ -842,7 +918,10 @@ disable_active_clks: | |||
| 842 | qproc->active_clk_count); | 918 | qproc->active_clk_count); |
| 843 | 919 | ||
| 844 | assert_reset: | 920 | assert_reset: |
| 845 | reset_control_assert(qproc->mss_restart); | 921 | q6v5_reset_assert(qproc); |
| 922 | disable_reset_clks: | ||
| 923 | q6v5_clk_disable(qproc->dev, qproc->reset_clks, | ||
| 924 | qproc->reset_clk_count); | ||
| 846 | disable_vdd: | 925 | disable_vdd: |
| 847 | q6v5_regulator_disable(qproc, qproc->active_regs, | 926 | q6v5_regulator_disable(qproc, qproc->active_regs, |
| 848 | qproc->active_reg_count); | 927 | qproc->active_reg_count); |
| @@ -853,6 +932,9 @@ disable_proxy_reg: | |||
| 853 | q6v5_regulator_disable(qproc, qproc->proxy_regs, | 932 | q6v5_regulator_disable(qproc, qproc->proxy_regs, |
| 854 | qproc->proxy_reg_count); | 933 | qproc->proxy_reg_count); |
| 855 | 934 | ||
| 935 | disable_irqs: | ||
| 936 | disable_irq(qproc->handover_irq); | ||
| 937 | |||
| 856 | return ret; | 938 | return ret; |
| 857 | } | 939 | } |
| 858 | 940 | ||
| @@ -892,7 +974,19 @@ static int q6v5_stop(struct rproc *rproc) | |||
| 892 | qproc->mpss_phys, qproc->mpss_size); | 974 | qproc->mpss_phys, qproc->mpss_size); |
| 893 | WARN_ON(ret); | 975 | WARN_ON(ret); |
| 894 | 976 | ||
| 895 | reset_control_assert(qproc->mss_restart); | 977 | q6v5_reset_assert(qproc); |
| 978 | |||
| 979 | disable_irq(qproc->handover_irq); | ||
| 980 | |||
| 981 | if (!qproc->proxy_unvoted) { | ||
| 982 | q6v5_clk_disable(qproc->dev, qproc->proxy_clks, | ||
| 983 | qproc->proxy_clk_count); | ||
| 984 | q6v5_regulator_disable(qproc, qproc->proxy_regs, | ||
| 985 | qproc->proxy_reg_count); | ||
| 986 | } | ||
| 987 | |||
| 988 | q6v5_clk_disable(qproc->dev, qproc->reset_clks, | ||
| 989 | qproc->reset_clk_count); | ||
| 896 | q6v5_clk_disable(qproc->dev, qproc->active_clks, | 990 | q6v5_clk_disable(qproc->dev, qproc->active_clks, |
| 897 | qproc->active_clk_count); | 991 | qproc->active_clk_count); |
| 898 | q6v5_regulator_disable(qproc, qproc->active_regs, | 992 | q6v5_regulator_disable(qproc, qproc->active_regs, |
| @@ -960,7 +1054,7 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *dev) | |||
| 960 | return IRQ_HANDLED; | 1054 | return IRQ_HANDLED; |
| 961 | } | 1055 | } |
| 962 | 1056 | ||
| 963 | static irqreturn_t q6v5_handover_interrupt(int irq, void *dev) | 1057 | static irqreturn_t q6v5_ready_interrupt(int irq, void *dev) |
| 964 | { | 1058 | { |
| 965 | struct q6v5 *qproc = dev; | 1059 | struct q6v5 *qproc = dev; |
| 966 | 1060 | ||
| @@ -968,6 +1062,20 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *dev) | |||
| 968 | return IRQ_HANDLED; | 1062 | return IRQ_HANDLED; |
| 969 | } | 1063 | } |
| 970 | 1064 | ||
| 1065 | static irqreturn_t q6v5_handover_interrupt(int irq, void *dev) | ||
| 1066 | { | ||
| 1067 | struct q6v5 *qproc = dev; | ||
| 1068 | |||
| 1069 | q6v5_clk_disable(qproc->dev, qproc->proxy_clks, | ||
| 1070 | qproc->proxy_clk_count); | ||
| 1071 | q6v5_regulator_disable(qproc, qproc->proxy_regs, | ||
| 1072 | qproc->proxy_reg_count); | ||
| 1073 | |||
| 1074 | qproc->proxy_unvoted = true; | ||
| 1075 | |||
| 1076 | return IRQ_HANDLED; | ||
| 1077 | } | ||
| 1078 | |||
| 971 | static irqreturn_t q6v5_stop_ack_interrupt(int irq, void *dev) | 1079 | static irqreturn_t q6v5_stop_ack_interrupt(int irq, void *dev) |
| 972 | { | 1080 | { |
| 973 | struct q6v5 *qproc = dev; | 1081 | struct q6v5 *qproc = dev; |
| @@ -1051,22 +1159,23 @@ static int q6v5_request_irq(struct q6v5 *qproc, | |||
| 1051 | const char *name, | 1159 | const char *name, |
| 1052 | irq_handler_t thread_fn) | 1160 | irq_handler_t thread_fn) |
| 1053 | { | 1161 | { |
| 1162 | int irq; | ||
| 1054 | int ret; | 1163 | int ret; |
| 1055 | 1164 | ||
| 1056 | ret = platform_get_irq_byname(pdev, name); | 1165 | irq = platform_get_irq_byname(pdev, name); |
| 1057 | if (ret < 0) { | 1166 | if (irq < 0) { |
| 1058 | dev_err(&pdev->dev, "no %s IRQ defined\n", name); | 1167 | dev_err(&pdev->dev, "no %s IRQ defined\n", name); |
| 1059 | return ret; | 1168 | return irq; |
| 1060 | } | 1169 | } |
| 1061 | 1170 | ||
| 1062 | ret = devm_request_threaded_irq(&pdev->dev, ret, | 1171 | ret = devm_request_threaded_irq(&pdev->dev, irq, |
| 1063 | NULL, thread_fn, | 1172 | NULL, thread_fn, |
| 1064 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | 1173 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, |
| 1065 | "q6v5", qproc); | 1174 | "q6v5", qproc); |
| 1066 | if (ret) | 1175 | if (ret) |
| 1067 | dev_err(&pdev->dev, "request %s IRQ failed\n", name); | 1176 | dev_err(&pdev->dev, "request %s IRQ failed\n", name); |
| 1068 | 1177 | ||
| 1069 | return ret; | 1178 | return ret ? : irq; |
| 1070 | } | 1179 | } |
| 1071 | 1180 | ||
| 1072 | static int q6v5_alloc_memory_region(struct q6v5 *qproc) | 1181 | static int q6v5_alloc_memory_region(struct q6v5 *qproc) |
| @@ -1157,6 +1266,14 @@ static int q6v5_probe(struct platform_device *pdev) | |||
| 1157 | } | 1266 | } |
| 1158 | qproc->proxy_clk_count = ret; | 1267 | qproc->proxy_clk_count = ret; |
| 1159 | 1268 | ||
| 1269 | ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, | ||
| 1270 | desc->reset_clk_names); | ||
| 1271 | if (ret < 0) { | ||
| 1272 | dev_err(&pdev->dev, "Failed to get reset clocks.\n"); | ||
| 1273 | goto free_rproc; | ||
| 1274 | } | ||
| 1275 | qproc->reset_clk_count = ret; | ||
| 1276 | |||
| 1160 | ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, | 1277 | ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, |
| 1161 | desc->active_clk_names); | 1278 | desc->active_clk_names); |
| 1162 | if (ret < 0) { | 1279 | if (ret < 0) { |
| @@ -1186,6 +1303,7 @@ static int q6v5_probe(struct platform_device *pdev) | |||
| 1186 | goto free_rproc; | 1303 | goto free_rproc; |
| 1187 | 1304 | ||
| 1188 | qproc->version = desc->version; | 1305 | qproc->version = desc->version; |
| 1306 | qproc->has_alt_reset = desc->has_alt_reset; | ||
| 1189 | qproc->need_mem_protection = desc->need_mem_protection; | 1307 | qproc->need_mem_protection = desc->need_mem_protection; |
| 1190 | ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt); | 1308 | ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt); |
| 1191 | if (ret < 0) | 1309 | if (ret < 0) |
| @@ -1195,9 +1313,15 @@ static int q6v5_probe(struct platform_device *pdev) | |||
| 1195 | if (ret < 0) | 1313 | if (ret < 0) |
| 1196 | goto free_rproc; | 1314 | goto free_rproc; |
| 1197 | 1315 | ||
| 1316 | ret = q6v5_request_irq(qproc, pdev, "ready", q6v5_ready_interrupt); | ||
| 1317 | if (ret < 0) | ||
| 1318 | goto free_rproc; | ||
| 1319 | |||
| 1198 | ret = q6v5_request_irq(qproc, pdev, "handover", q6v5_handover_interrupt); | 1320 | ret = q6v5_request_irq(qproc, pdev, "handover", q6v5_handover_interrupt); |
| 1199 | if (ret < 0) | 1321 | if (ret < 0) |
| 1200 | goto free_rproc; | 1322 | goto free_rproc; |
| 1323 | qproc->handover_irq = ret; | ||
| 1324 | disable_irq(qproc->handover_irq); | ||
| 1201 | 1325 | ||
| 1202 | ret = q6v5_request_irq(qproc, pdev, "stop-ack", q6v5_stop_ack_interrupt); | 1326 | ret = q6v5_request_irq(qproc, pdev, "stop-ack", q6v5_stop_ack_interrupt); |
| 1203 | if (ret < 0) | 1327 | if (ret < 0) |
| @@ -1210,6 +1334,7 @@ static int q6v5_probe(struct platform_device *pdev) | |||
| 1210 | } | 1334 | } |
| 1211 | qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); | 1335 | qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); |
| 1212 | qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); | 1336 | qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); |
| 1337 | qcom_add_glink_subdev(rproc, &qproc->glink_subdev); | ||
| 1213 | qcom_add_smd_subdev(rproc, &qproc->smd_subdev); | 1338 | qcom_add_smd_subdev(rproc, &qproc->smd_subdev); |
| 1214 | qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); | 1339 | qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); |
| 1215 | qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); | 1340 | qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); |
| @@ -1233,6 +1358,7 @@ static int q6v5_remove(struct platform_device *pdev) | |||
| 1233 | rproc_del(qproc->rproc); | 1358 | rproc_del(qproc->rproc); |
| 1234 | 1359 | ||
| 1235 | qcom_remove_sysmon_subdev(qproc->sysmon); | 1360 | qcom_remove_sysmon_subdev(qproc->sysmon); |
| 1361 | qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev); | ||
| 1236 | qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev); | 1362 | qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev); |
| 1237 | qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev); | 1363 | qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev); |
| 1238 | rproc_free(qproc->rproc); | 1364 | rproc_free(qproc->rproc); |
| @@ -1240,6 +1366,31 @@ static int q6v5_remove(struct platform_device *pdev) | |||
| 1240 | return 0; | 1366 | return 0; |
| 1241 | } | 1367 | } |
| 1242 | 1368 | ||
| 1369 | static const struct rproc_hexagon_res sdm845_mss = { | ||
| 1370 | .hexagon_mba_image = "mba.mbn", | ||
| 1371 | .proxy_clk_names = (char*[]){ | ||
| 1372 | "xo", | ||
| 1373 | "axis2", | ||
| 1374 | "prng", | ||
| 1375 | NULL | ||
| 1376 | }, | ||
| 1377 | .reset_clk_names = (char*[]){ | ||
| 1378 | "iface", | ||
| 1379 | "snoc_axi", | ||
| 1380 | NULL | ||
| 1381 | }, | ||
| 1382 | .active_clk_names = (char*[]){ | ||
| 1383 | "bus", | ||
| 1384 | "mem", | ||
| 1385 | "gpll0_mss", | ||
| 1386 | "mnoc_axi", | ||
| 1387 | NULL | ||
| 1388 | }, | ||
| 1389 | .need_mem_protection = true, | ||
| 1390 | .has_alt_reset = true, | ||
| 1391 | .version = MSS_SDM845, | ||
| 1392 | }; | ||
| 1393 | |||
| 1243 | static const struct rproc_hexagon_res msm8996_mss = { | 1394 | static const struct rproc_hexagon_res msm8996_mss = { |
| 1244 | .hexagon_mba_image = "mba.mbn", | 1395 | .hexagon_mba_image = "mba.mbn", |
| 1245 | .proxy_clk_names = (char*[]){ | 1396 | .proxy_clk_names = (char*[]){ |
| @@ -1255,6 +1406,7 @@ static const struct rproc_hexagon_res msm8996_mss = { | |||
| 1255 | NULL | 1406 | NULL |
| 1256 | }, | 1407 | }, |
| 1257 | .need_mem_protection = true, | 1408 | .need_mem_protection = true, |
| 1409 | .has_alt_reset = false, | ||
| 1258 | .version = MSS_MSM8996, | 1410 | .version = MSS_MSM8996, |
| 1259 | }; | 1411 | }; |
| 1260 | 1412 | ||
| @@ -1286,6 +1438,7 @@ static const struct rproc_hexagon_res msm8916_mss = { | |||
| 1286 | NULL | 1438 | NULL |
| 1287 | }, | 1439 | }, |
| 1288 | .need_mem_protection = false, | 1440 | .need_mem_protection = false, |
| 1441 | .has_alt_reset = false, | ||
| 1289 | .version = MSS_MSM8916, | 1442 | .version = MSS_MSM8916, |
| 1290 | }; | 1443 | }; |
| 1291 | 1444 | ||
| @@ -1325,6 +1478,7 @@ static const struct rproc_hexagon_res msm8974_mss = { | |||
| 1325 | NULL | 1478 | NULL |
| 1326 | }, | 1479 | }, |
| 1327 | .need_mem_protection = false, | 1480 | .need_mem_protection = false, |
| 1481 | .has_alt_reset = false, | ||
| 1328 | .version = MSS_MSM8974, | 1482 | .version = MSS_MSM8974, |
| 1329 | }; | 1483 | }; |
| 1330 | 1484 | ||
| @@ -1333,6 +1487,7 @@ static const struct of_device_id q6v5_of_match[] = { | |||
| 1333 | { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, | 1487 | { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, |
| 1334 | { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, | 1488 | { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, |
| 1335 | { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, | 1489 | { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, |
| 1490 | { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss}, | ||
| 1336 | { }, | 1491 | { }, |
| 1337 | }; | 1492 | }; |
| 1338 | MODULE_DEVICE_TABLE(of, q6v5_of_match); | 1493 | MODULE_DEVICE_TABLE(of, q6v5_of_match); |
diff --git a/include/linux/ste_modem_shm.h b/include/linux/ste_modem_shm.h deleted file mode 100644 index 8444a4eff1bb..000000000000 --- a/include/linux/ste_modem_shm.h +++ /dev/null | |||
| @@ -1,56 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) ST-Ericsson AB 2012 | ||
| 3 | * Author: Sjur Brendeland / sjur.brandeland@stericsson.com | ||
| 4 | * | ||
| 5 | * License terms: GNU General Public License (GPL) version 2 | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef __INC_MODEM_DEV_H | ||
| 9 | #define __INC_MODEM_DEV_H | ||
| 10 | #include <linux/types.h> | ||
| 11 | #include <linux/platform_device.h> | ||
| 12 | |||
| 13 | struct ste_modem_device; | ||
| 14 | |||
| 15 | /** | ||
| 16 | * struct ste_modem_dev_cb - Callbacks for modem initiated events. | ||
| 17 | * @kick: Called when the modem kicks the host. | ||
| 18 | * | ||
| 19 | * This structure contains callbacks for actions triggered by the modem. | ||
| 20 | */ | ||
| 21 | struct ste_modem_dev_cb { | ||
| 22 | void (*kick)(struct ste_modem_device *mdev, int notify_id); | ||
| 23 | }; | ||
| 24 | |||
| 25 | /** | ||
| 26 | * struct ste_modem_dev_ops - Functions to control modem and modem interface. | ||
| 27 | * | ||
| 28 | * @power: Main power switch, used for cold-start or complete power off. | ||
| 29 | * @kick: Kick the modem. | ||
| 30 | * @kick_subscribe: Subscribe for notifications from the modem. | ||
| 31 | * @setup: Provide callback functions to modem device. | ||
| 32 | * | ||
| 33 | * This structure contains functions used by the ste remoteproc driver | ||
| 34 | * to manage the modem. | ||
| 35 | */ | ||
| 36 | struct ste_modem_dev_ops { | ||
| 37 | int (*power)(struct ste_modem_device *mdev, bool on); | ||
| 38 | int (*kick)(struct ste_modem_device *mdev, int notify_id); | ||
| 39 | int (*kick_subscribe)(struct ste_modem_device *mdev, int notify_id); | ||
| 40 | int (*setup)(struct ste_modem_device *mdev, | ||
| 41 | struct ste_modem_dev_cb *cfg); | ||
| 42 | }; | ||
| 43 | |||
| 44 | /** | ||
| 45 | * struct ste_modem_device - represent the STE modem device | ||
| 46 | * @pdev: Reference to platform device | ||
| 47 | * @ops: Operations used to manage the modem. | ||
| 48 | * @drv_data: Driver private data. | ||
| 49 | */ | ||
| 50 | struct ste_modem_device { | ||
| 51 | struct platform_device pdev; | ||
| 52 | struct ste_modem_dev_ops ops; | ||
| 53 | void *drv_data; | ||
| 54 | }; | ||
| 55 | |||
| 56 | #endif /*INC_MODEM_DEV_H*/ | ||
