Merge tag 'rproc-v4.18' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This brings a few minor fixes to the Davinci driver, drops a orphan
  include file from the StE cleanup done ealier and introduces support
  for booting the modem on Qualcomm's SDM845 platform"

* tag 'rproc-v4.18' of git://github.com/andersson/remoteproc:
  remoteproc: q6v5: Allow defining GLINK edge for mss remoteproc
  remoteproc: q6v5: Add support for mss remoteproc on SDM845
  remoteproc: q6v5: Introduce reset assert/deassert helper functions
  dt-bindings: remoteproc: Add Q6v5 Modem PIL binding for SDM845
  remoteproc: q6v5: Move proxy unvote to handover irq handler
  remoteproc: q6v5: Return irq from q6v5_request_irq()
  remoteproc/ste: remove abandoned include file
  remoteproc/davinci: use octal permissions for module_param()
  remoteproc/davinci: prepare and unprepare the clock where needed
  remoteproc/davinci: add the missing retval check for clk_enable()
  remoteproc: Remove depends on HAS_DMA in case of platform dependency
  remoteproc: Prevent incorrect rproc state on xfer mem ownership failure

5 files changed, 188 insertions, 83 deletions

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 00d3d58a102f..d90182425450 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -11,6 +11,7 @@ on the Qualcomm Hexagon core.
                     "qcom,msm8916-mss-pil",
                     "qcom,msm8974-mss-pil"
                     "qcom,msm8996-mss-pil"
+                    "qcom,sdm845-mss-pil"
 
 - reg:
         Usage: required
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 027274008b08..cd1c168fd188 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -24,7 +24,6 @@ config IMX_REMOTEPROC
 
 config OMAP_REMOTEPROC
         tristate "OMAP remoteproc support"
-        depends on HAS_DMA
         depends on ARCH_OMAP4 || SOC_OMAP5
         depends on OMAP_IOMMU
         select MAILBOX
diff --git a/drivers/remoteproc/da8xx_remoteproc.c b/drivers/remoteproc/da8xx_remoteproc.c
index bf3b9034c319..b668e32996e2 100644
--- a/drivers/remoteproc/da8xx_remoteproc.c
+++ b/drivers/remoteproc/da8xx_remoteproc.c
@@ -25,7 +25,7 @@
 #include "remoteproc_internal.h"
 
 static char *da8xx_fw_name;
-module_param(da8xx_fw_name, charp, S_IRUGO);
+module_param(da8xx_fw_name, charp, 0444);
 MODULE_PARM_DESC(da8xx_fw_name,
                  "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
 
@@ -138,6 +138,7 @@ static int da8xx_rproc_start(struct rproc *rproc)
         struct device *dev = rproc->dev.parent;
         struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
         struct clk *dsp_clk = drproc->dsp_clk;
+        int ret;
 
         /* hw requires the start (boot) address be on 1KB boundary */
         if (rproc->bootaddr & 0x3ff) {
@@ -148,7 +149,12 @@ static int da8xx_rproc_start(struct rproc *rproc)
 
         writel(rproc->bootaddr, drproc->bootreg);
 
-        clk_enable(dsp_clk);
+        ret = clk_prepare_enable(dsp_clk);
+        if (ret) {
+                dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
+                return ret;
+        }
+
         davinci_clk_reset_deassert(dsp_clk);
 
         return 0;
@@ -159,7 +165,7 @@ static int da8xx_rproc_stop(struct rproc *rproc)
         struct da8xx_rproc *drproc = rproc->priv;
 
         davinci_clk_reset_assert(drproc->dsp_clk);
-        clk_disable(drproc->dsp_clk);
+        clk_disable_unprepare(drproc->dsp_clk);
 
         return 0;
 }
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c
index cbbafdcaaecb..2190debf3d35 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -57,6 +57,8 @@
 #define RMB_PMI_META_DATA_REG           0x10
 #define RMB_PMI_CODE_START_REG          0x14
 #define RMB_PMI_CODE_LENGTH_REG         0x18
+#define RMB_MBA_MSS_STATUS              0x40
+#define RMB_MBA_ALT_RESET               0x44
 
 #define RMB_CMD_META_DATA_READY         0x1
 #define RMB_CMD_LOAD_READY              0x2
@@ -104,6 +106,13 @@
 #define QDSP6SS_XO_CBCR         0x0038
 #define QDSP6SS_ACC_OVERRIDE_VAL                0x20
 
+/* QDSP6v65 parameters */
+#define QDSP6SS_SLEEP                   0x3C
+#define QDSP6SS_BOOT_CORE_START         0x400
+#define QDSP6SS_BOOT_CMD                0x404
+#define SLEEP_CHECK_MAX_LOOPS           200
+#define BOOT_FSM_TIMEOUT                10000
+
 struct reg_info {
         struct regulator *reg;
         int uV;
@@ -121,9 +130,11 @@ struct rproc_hexagon_res {
         struct qcom_mss_reg_res *proxy_supply;
         struct qcom_mss_reg_res *active_supply;
         char **proxy_clk_names;
+        char **reset_clk_names;
         char **active_clk_names;
         int version;
         bool need_mem_protection;
+        bool has_alt_reset;
 };
 
 struct q6v5 {
@@ -143,9 +154,15 @@ struct q6v5 {
         struct qcom_smem_state *state;
         unsigned stop_bit;
 
+        int handover_irq;
+
+        bool proxy_unvoted;
+
         struct clk *active_clks[8];
+        struct clk *reset_clks[4];
         struct clk *proxy_clks[4];
         int active_clk_count;
+        int reset_clk_count;
         int proxy_clk_count;
 
         struct reg_info active_regs[1];
@@ -166,10 +183,12 @@ struct q6v5 {
         void *mpss_region;
         size_t mpss_size;
 
+        struct qcom_rproc_glink glink_subdev;
         struct qcom_rproc_subdev smd_subdev;
         struct qcom_rproc_ssr ssr_subdev;
         struct qcom_sysmon *sysmon;
         bool need_mem_protection;
+        bool has_alt_reset;
         int mpss_perm;
         int mba_perm;
         int version;
@@ -179,6 +198,7 @@ enum {
         MSS_MSM8916,
         MSS_MSM8974,
         MSS_MSM8996,
+        MSS_SDM845,
 };
 
 static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
@@ -333,6 +353,29 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
         return 0;
 }
 
+static int q6v5_reset_assert(struct q6v5 *qproc)
+{
+        if (qproc->has_alt_reset)
+                return reset_control_reset(qproc->mss_restart);
+        else
+                return reset_control_assert(qproc->mss_restart);
+}
+
+static int q6v5_reset_deassert(struct q6v5 *qproc)
+{
+        int ret;
+
+        if (qproc->has_alt_reset) {
+                writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET);
+                ret = reset_control_reset(qproc->mss_restart);
+                writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);