firmware: qcom: scm: Split out 32-bit specific SCM code

Split out the 32-bit SCM implementation into its own file to prep for
supporting a 64-bit/ARM64 implementation as well.  We create a simple shim
to ensure both versions conform to the same interface.

Signed-off-by: Kumar Gala <galak@codeaurora.org>

4 files changed, 527 insertions, 436 deletions

diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 3fdd3912709a..3001f1ae1062 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -12,7 +12,8 @@ obj-$(CONFIG_ISCSI_IBFT_FIND)	+= iscsi_ibft_find.o
 obj-$(CONFIG_ISCSI_IBFT)        += iscsi_ibft.o
 obj-$(CONFIG_FIRMWARE_MEMMAP)   += memmap.o
 obj-$(CONFIG_QCOM_SCM)          += qcom_scm.o
-CFLAGS_qcom_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
+obj-$(CONFIG_QCOM_SCM)          += qcom_scm-32.o
+CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
 
 obj-$(CONFIG_GOOGLE_FIRMWARE)   += google/
 obj-$(CONFIG_EFI)               += efi/
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
new file mode 100644
index 000000000000..b08b822ebafa
--- /dev/null
+++ b/drivers/firmware/qcom_scm-32.c
@@ -0,0 +1,480 @@
+/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+ * Copyright (C) 2015 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/qcom_scm.h>
+
+#include <asm/outercache.h>
+#include <asm/cacheflush.h>
+
+#include "qcom_scm.h"
+
+#define QCOM_SCM_FLAG_COLDBOOT_CPU0     0x00
+#define QCOM_SCM_FLAG_COLDBOOT_CPU1     0x01
+#define QCOM_SCM_FLAG_COLDBOOT_CPU2     0x08
+#define QCOM_SCM_FLAG_COLDBOOT_CPU3     0x20
+
+#define QCOM_SCM_FLAG_WARMBOOT_CPU0     0x04
+#define QCOM_SCM_FLAG_WARMBOOT_CPU1     0x02
+#define QCOM_SCM_FLAG_WARMBOOT_CPU2     0x10
+#define QCOM_SCM_FLAG_WARMBOOT_CPU3     0x40
+
+struct qcom_scm_entry {
+        int flag;
+        void *entry;
+};
+
+static struct qcom_scm_entry qcom_scm_wb[] = {
+        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU0 },
+        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU1 },
+        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU2 },
+        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU3 },
+};
+
+static DEFINE_MUTEX(qcom_scm_lock);
+
+/**
+ * struct qcom_scm_command - one SCM command buffer
+ * @len: total available memory for command and response
+ * @buf_offset: start of command buffer
+ * @resp_hdr_offset: start of response buffer
+ * @id: command to be executed
+ * @buf: buffer returned from qcom_scm_get_command_buffer()
+ *
+ * An SCM command is laid out in memory as follows:
+ *
+ *      ------------------- <--- struct qcom_scm_command
+ *      | command header  |
+ *      ------------------- <--- qcom_scm_get_command_buffer()
+ *      | command buffer  |
+ *      ------------------- <--- struct qcom_scm_response and
+ *      | response header |      qcom_scm_command_to_response()
+ *      ------------------- <--- qcom_scm_get_response_buffer()
+ *      | response buffer |
+ *      -------------------
+ *
+ * There can be arbitrary padding between the headers and buffers so
+ * you should always use the appropriate qcom_scm_get_*_buffer() routines
+ * to access the buffers in a safe manner.
+ */
+struct qcom_scm_command {
+        __le32 len;
+        __le32 buf_offset;
+        __le32 resp_hdr_offset;
+        __le32 id;
+        __le32 buf[0];
+};
+
+/**
+ * struct qcom_scm_response - one SCM response buffer
+ * @len: total available memory for response
+ * @buf_offset: start of response data relative to start of qcom_scm_response
+ * @is_complete: indicates if the command has finished processing
+ */
+struct qcom_scm_response {
+        __le32 len;
+        __le32 buf_offset;
+        __le32 is_complete;
+};
+
+/**
+ * alloc_qcom_scm_command() - Allocate an SCM command
+ * @cmd_size: size of the command buffer
+ * @resp_size: size of the response buffer
+ *
+ * Allocate an SCM command, including enough room for the command
+ * and response headers as well as the command and response buffers.
+ *
+ * Returns a valid &qcom_scm_command on success or %NULL if the allocation fails.
+ */
+static struct qcom_scm_command *alloc_qcom_scm_command(size_t cmd_size, size_t resp_size)
+{
+        struct qcom_scm_command *cmd;
+        size_t len = sizeof(*cmd) + sizeof(struct qcom_scm_response) + cmd_size +
+                resp_size;
+        u32 offset;
+
+        cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL);
+        if (cmd) {
+                cmd->len = cpu_to_le32(len);
+                offset = offsetof(struct qcom_scm_command, buf);
+                cmd->buf_offset = cpu_to_le32(offset);
+                cmd->resp_hdr_offset = cpu_to_le32(offset + cmd_size);
+        }
+        return cmd;
+}
+
+/**
+ * free_qcom_scm_command() - Free an SCM command
+ * @cmd: command to free
+ *
+ * Free an SCM command.
+ */
+static inline void free_qcom_scm_command(struct qcom_scm_command *cmd)
+{
+        kfree(cmd);
+}
+
+/**
+ * qcom_scm_command_to_response() - Get a pointer to a qcom_scm_response
+ * @cmd: command
+ *
+ * Returns a pointer to a response for a command.
+ */
+static inline struct qcom_scm_response *qcom_scm_command_to_response(
+                const struct qcom_scm_command *cmd)
+{
+        return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset);
+}
+
+/**
+ * qcom_scm_get_command_buffer() - Get a pointer to a command buffer
+ * @cmd: command
+ *
+ * Returns a pointer to the command buffer of a command.
+ */
+static inline void *qcom_scm_get_command_buffer(const struct qcom_scm_command *cmd)
+{
+        return (void *)cmd->buf;
+}
+
+/**
+ * qcom_scm_get_response_buffer() - Get a pointer to a response buffer
+ * @rsp: response
+ *
+ * Returns a pointer to a response buffer of a response.
+ */
+static inline void *qcom_scm_get_response_buffer(const struct qcom_scm_response *rsp)
+{
+        return (void *)rsp + le32_to_cpu(rsp->buf_offset);
+}
+
+static int qcom_scm_remap_error(int err)
+{
+        pr_err("qcom_scm_call failed with error code %d\n", err);
+        switch (err) {
+        case QCOM_SCM_ERROR:
+                return -EIO;
+        case QCOM_SCM_EINVAL_ADDR:
+        case QCOM_SCM_EINVAL_ARG:
+                return -EINVAL;
+        case QCOM_SCM_EOPNOTSUPP:
+                return -EOPNOTSUPP;
+        case QCOM_SCM_ENOMEM:
+                return -ENOMEM;
+        }
+        return -EINVAL;
+}
+
+static u32 smc(u32 cmd_addr)
+{
+        int context_id;
+        register u32 r0 asm("r0") = 1;
+        register u32 r1 asm("r1") = (u32)&context_id;
+        register u32 r2 asm("r2") = cmd_addr;
+        do {
+                asm volatile(
+                        __asmeq("%0", "r0")
+                        __asmeq("%1", "r0")
+                        __asmeq("%2", "r1")
+                        __asmeq("%3", "r2")
+#ifdef REQUIRES_SEC
+                        ".arch_extension sec\n"
+#endif
+                        "smc    #0      @ switch to secure world\n"
+                        : "=r" (r0)
+                        : "r" (r0), "r" (r1), "r" (r2)
+                        : "r3");
+        } while (r0 == QCOM_SCM_INTERRUPTED);
+
+        return r0;
+}
+
+static int __qcom_scm_call(const struct qcom_scm_command *cmd)
+{
+        int ret;
+        u32 cmd_addr = virt_to_phys(cmd);
+
+        /*
+         * Flush the command buffer so that the secure world sees
+         * the correct data.
+         */
+        __cpuc_flush_dcache_area((void *)cmd, cmd->len);
+        outer_flush_range(cmd_addr, cmd_addr + cmd->len);
+
+        ret = smc(cmd_addr);
+        if (ret < 0)
+                ret = qcom_scm_remap_error(ret);
+
+        return ret;
+}
+
+static void qcom_scm_inv_range(unsigned long start, unsigned long end)
+{
+        u32 cacheline_size, ctr;
+
+        asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
+        cacheline_size = 4 << ((ctr >> 16) & 0xf);
+
+        start = round_down(start, cacheline_size);
+        end = round_up(end, cacheline_size);
+        outer_inv_range(start, end);
+        while (start < end) {
+                asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
+                     : "memory");
+                start += cacheline_size;
+        }
+        dsb();
+        isb();
+}
+
+/**
+ * qcom_scm_call() - Send an SCM command
+ * @svc_id: service identifier
+ * @cmd_id: command identifier
+ * @cmd_buf: command buffer
+ * @cmd_len: length of the command buffer
+ * @resp_buf: response buffer
+ * @resp_len: length of the response buffer
+ *
+ * Sends a command to the SCM and waits for the command to finish processing.
+ *
+ * A note on cache maintenance:
+ * Note that any buffers that are expected to be accessed by the secure world
+ * must be flushed before invoking qcom_scm_call and invalidated in the cache
+ * immediately after qcom_scm_call returns. Cache maintenance on the command
+ * and response buffers is taken care of by qcom_scm_call; however, callers are
+ * responsible for any other cached buffers passed over to the secure world.
+ */
+static int qcom_scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf,
+                        size_t cmd_len, void *resp_buf, size_t resp_len)
+{
+        int ret;
+        struct qcom_scm_command *cmd;
+        struct qcom_scm_response *rsp;
+        unsigned long start, end;
+
+        cmd = alloc_qcom_scm_command(cmd_len, resp_len);
+        if (!cmd)
+                return -ENOMEM;
+
+        cmd->id = cpu_to_le32((svc_id << 10) | cmd_id);
+        if (cmd_buf)
+                memcpy(qcom_scm_get_command_buffer(cmd), cmd_buf, cmd_len);
+
+        mutex_lock(&qcom_scm_lock);
+        ret = __qcom_scm_call(cmd);
+        mutex_unlock(&qcom_scm_lock);
+        if (ret)
+                goto out;
+
+        rsp = qcom_scm_command_to_response(cmd);
+        start = (unsigned long)rsp;
+
+        do {
+                qcom_scm_inv_range(start, start + sizeof(*rsp));
+        } while (!rsp->is_complete);
+
+        end = (unsigned long)qcom_scm_get_response_buffer(rsp) + resp_len;
+        qcom_scm_inv_range(start, end);
+
+        if (resp_buf)
+                memcpy(resp_buf, qcom_scm_get_response_buffer(rsp), resp_len);
+out:
+        free_qcom_scm_command(cmd);
+        return ret;
+}
+
+#define SCM_CLASS_REGISTER      (0x2 << 8)
+#define SCM_MASK_IRQS           BIT(5)
+#define SCM_ATOMIC(svc, cmd, n) (((((svc) << 10)|((cmd) & 0x3ff)) << 12) | \
+                                SCM_CLASS_REGISTER | \
+                                SCM_MASK_IRQS | \
+                                (n & 0xf))
+
+/**
+ * qcom_scm_call_atomic1() - Send an atomic SCM command with one argument
+ * @svc_id: service identifier
+ * @cmd_id: command identifier
+ * @arg1: first argument
+ *
+ * This shall only be used with commands that are guaranteed to be
+ * uninterruptable, atomic and SMP safe.
+ */
+static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)
+{
+        int context_id;
+
+        register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 1);
+        register u32 r1 asm("r1") = (u32)&context_id;
+        register u32 r2 asm("r2") = arg1;
+
+        asm volatile(
+                        __asmeq("%0", "r0")
+                        __asmeq("%1", "r0")
+                        __asmeq("%2", "r1")
+                        __asmeq("%3", "r2")
+#ifdef REQUIRES_SEC
+                        ".arch_extension sec\n"
+#endif
+                        "smc    #0      @ switch to secure world\n"
+                        : "=r" (r0)
+                        : "r" (r0), "r" (r1), "r" (r2)
+                        : "r3");
+        return r0;
+}
+
+u32 qcom_scm_get_version(void)
+{
+        int context_id;
+        static u32 version = -1;
+        register u32 r0 asm("r0");
+        register u32 r1 asm("r1");
+
+        if (version != -1)
+                return version;
+
+        mutex_lock(&qcom_scm_lock);
+
+        r0 = 0x1 << 8;
+        r1 = (u32)&context_id;
+        do {
+                asm volatile(
+                        __asmeq("%0", "r0")
+                        __asmeq("%1", "r1")
+                        __asmeq("%2", "r0")
+                        __asmeq("%3", "r1")
+#ifdef REQUIRES_SEC
+                        ".arch_extension sec\n"
+#endif
+                        "smc    #0      @ switch to secure world\n"
+                        : "=r" (r0), "=r" (r1)
+                        : "r" (r0), "r" (r1)
+                        : "r2", "r3");
+        } while (r0 == QCOM_SCM_INTERRUPTED);
+
+        version = r1;
+        mutex_unlock(&qcom_scm_lock);
+
+        return version;
+}
+EXPORT_SYMBOL(qcom_scm_get_version);
+
+/*
+ * Set the cold/warm boot address for one of the CPU cores.
+ */
+static int qcom_scm_set_boot_addr(u32 addr, int flags)
+{
+        struct {
+                __le32 flags;
+                __le32 addr;
+        } cmd;
+
+        cmd.addr = cpu_to_le32(addr);
+        cmd.flags = cpu_to_le32(flags);
+        return qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR,
+                        &cmd, sizeof(cmd), NULL, 0);
+}
+
+/**
+ * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
+ * @entry: Entry point function for the cpus
+ * @cpus: The cpumask of cpus that will use the entry point
+ *
+ * Set the cold boot address of the cpus. Any cpu outside the supported
+ * range would be removed from the cpu present mask.
+ */
+int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
+{
+        int flags = 0;
+        int cpu;
+        int scm_cb_flags[] = {
+                QCOM_SCM_FLAG_COLDBOOT_CPU0,
+                QCOM_SCM_FLAG_COLDBOOT_CPU1,
+                QCOM_SCM_FLAG_COLDBOOT_CPU2,
+                QCOM_SCM_FLAG_COLDBOOT_CPU3,
+        };
+
+        if (!cpus || (cpus && cpumask_empty(cpus)))
+                return -EINVAL;
+
+        for_each_cpu(cpu, cpus) {
+                if (cpu < ARRAY_SIZE(scm_cb_flags))
+                        flags |= scm_cb_flags[cpu];
+                else
+                        set_cpu_present(cpu, false);
+        }
+
+        return qcom_scm_set_boot_addr(virt_to_phys(entry), flags);
+}
+
+/**
+ * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
+ * @entry: Entry point function for the cpus
+ * @cpus: The cpumask of cpus that will use the entry point
+ *
+ * Set the Linux entry point for the SCM to transfer control to when coming
+ * out of a power down. CPU power down may be executed on cpuidle or hotplug.
+ */
+int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
+{
+        int ret;
+        int flags = 0;
+        int cpu;
+
+        /*
+         * Reassign only if we are switching from hotplug entry point
+         * to cpuidle entry point or vice versa.
+         */
+        for_each_cpu(cpu, cpus) {
+                if (entry == qcom_scm_wb[cpu].entry)
+                        continue;
+                flags |= qcom_scm_wb[cpu].flag;
+        }
+
+        /* No change in entry function */
+        if (!flags)
+                return 0;
+
+        ret = qcom_scm_set_boot_addr(virt_to_phys(entry), flags);
+        if (!ret) {
+                for_each_cpu(cpu, cpus)
+                        qcom_scm_wb[cpu].entry = entry;
+        }
+
+        return ret;
+}
+
+/**
+ * qcom_scm_cpu_power_down() - Power down the cpu
+ * @flags - Flags to flush cache
+ *
+ * This is an end point to power down cpu. If there was a pending interrupt,
+ * the control would return from this function, otherwise, the cpu jumps to the
+ * warm boot entry point set for this cpu upon reset.
+ */
+void __qcom_scm_cpu_power_down(u32 flags)
+{
+        qcom_scm_call_atomic1(QCOM_SCM_SVC_BOOT, QCOM_SCM_CMD_TERMINATE_PC,
+                        flags & QCOM_SCM_FLUSH_FLAG_MASK);
+}
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 994b50fd997c..99892415299b 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -16,393 +16,12 @@
  * 02110-1301, USA.
  */
 
-#include <linux/slab.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/errno.h>
-#include <linux/err.h>
+#include <linux/cpumask.h>
+#include <linux/export.h>
+#include <linux/types.h>
 #include <linux/qcom_scm.h>
 
-#include <asm/outercache.h>
-#include <asm/cacheflush.h>
-
-
-#define QCOM_SCM_ENOMEM         -5
-#define QCOM_SCM_EOPNOTSUPP     -4
-#define QCOM_SCM_EINVAL_ADDR    -3
-#define QCOM_SCM_EINVAL_ARG     -2
-#define QCOM_SCM_ERROR          -1
-#define QCOM_SCM_INTERRUPTED    1
-
-#define QCOM_SCM_FLAG_COLDBOOT_CPU0     0x00
-#define QCOM_SCM_FLAG_COLDBOOT_CPU1     0x01
-#define QCOM_SCM_FLAG_COLDBOOT_CPU2     0x08
-#define QCOM_SCM_FLAG_COLDBOOT_CPU3     0x20
-
-#define QCOM_SCM_FLAG_WARMBOOT_CPU0     0x04
-#define QCOM_SCM_FLAG_WARMBOOT_CPU1     0x02
-#define QCOM_SCM_FLAG_WARMBOOT_CPU2     0x10
-#define QCOM_SCM_FLAG_WARMBOOT_CPU3     0x40
-
-struct qcom_scm_entry {
-        int flag;
-        void *entry;
-};
-
-static struct qcom_scm_entry qcom_scm_wb[] = {
-        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU0 },
-        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU1 },
-        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU2 },
-        { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU3 },
-};
-
-static DEFINE_MUTEX(qcom_scm_lock);
-
-/**
- * struct qcom_scm_command - one SCM command buffer
- * @len: total available memory for command and response
- * @buf_offset: start of command buffer
- * @resp_hdr_offset: start of response buffer
- * @id: command to be executed
- * @buf: buffer returned from qcom_scm_get_command_buffer()
- *
- * An SCM command is laid out in memory as follows:
- *
- *      ------------------- <--- struct qcom_scm_command
- *      | command header  |
- *      ------------------- <--- qcom_scm_get_command_buffer()
- *      | command buffer  |
- *      ------------------- <--- struct qcom_scm_response and
- *      | response header |      qcom_scm_command_to_response()
- *      ------------------- <--- qcom_scm_get_response_buffer()
- *      | response buffer |
- *      -------------------
- *
- * There can be arbitrary padding between the headers and buffers so
- * you should always use the appropriate qcom_scm_get_*_buffer() routines
- * to access the buffers in a safe manner.
- */
-struct qcom_scm_command {
-        __le32 len;
-        __le32 buf_offset;
-        __le32 resp_hdr_offset;
-        __le32 id;
-        __le32 buf[0];
-};
-
-/**
- * struct qcom_scm_response - one SCM response buffer
- * @len: total available memory for response
- * @buf_offset: start of response data relative to start of qcom_scm_response
- * @is_complete: indicates if the command has finished processing
- */
-struct qcom_scm_response {
-        __le32 len;
-        __le32 buf_offset;
-        __le32 is_complete;
-};
-
-/**
- * alloc_qcom_scm_command() - Allocate an SCM command
- * @cmd_size: size of the command buffer
- * @resp_size: size of the response buffer
- *
- * Allocate an SCM command, including enough room for the command
- * and response headers as well as the command and response buffers.
- *
- * Returns a valid &qcom_scm_command on success or %NULL if the allocation fails.
- */
-static struct qcom_scm_command *alloc_qcom_scm_command(size_t cmd_size, size_t resp_size)
-{
-        struct qcom_scm_command *cmd;
-        size_t len = sizeof(*cmd) + sizeof(struct qcom_scm_response) + cmd_size +
-                resp_size;
-        u32 offset;
-
-        cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL);
-        if (cmd) {
-                cmd->len = cpu_to_le32(len);
-                offset = offsetof(struct qcom_scm_command, buf);
-                cmd->buf_offset = cpu_to_le32(offset);
-                cmd->resp_hdr_offset = cpu_to_le32(offset + cmd_size);
-        }
-        return cmd;
-}
-
-/**
- * free_qcom_scm_command() - Free an SCM command
- * @cmd: command to free
- *
- * Free an SCM command.
- */
-static inline void free_qcom_scm_command(struct qcom_scm_command *cmd)
-{
-        kfree(cmd);
-}
-
-/**
- * qcom_scm_command_to_response() - Get a pointer to a qcom_scm_response
- * @cmd: command
- *
- * Returns a pointer to a response for a command.
- */
-static inline struct qcom_scm_response *qcom_scm_command_to_response(
-                const struct qcom_scm_command *cmd)
-{
-        return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset);
-}
-
-/**
- * qcom_scm_get_command_buffer() - Get a pointer to a command buffer
- * @cmd: command
- *
- * Returns a pointer to the command buffer of a command.
- */
-static inline void *qcom_scm_get_command_buffer(const struct qcom_scm_command *cmd)
-{
-        return (void *)cmd->buf;
-}
-
-/**
- * qcom_scm_get_response_buffer() - Get a pointer to a response buffer
- * @rsp: response
- *
- * Returns a pointer to a response buffer of a response.
- */
-static inline void *qcom_scm_get_response_buffer(const struct qcom_scm_response *rsp)
-{
-        return (void *)rsp + le32_to_cpu(rsp->buf_offset);
-}
-
-static int qcom_scm_remap_error(int err)
-{
-        pr_err("qcom_scm_call failed with error code %d\n", err);
-        switch (err) {
-        case QCOM_SCM_ERROR:
-                return -EIO;
-        case QCOM_SCM_EINVAL_ADDR:
-        case QCOM_SCM_EINVAL_ARG:
-                return -EINVAL;
-        case QCOM_SCM_EOPNOTSUPP:
-                return -EOPNOTSUPP;
-        case QCOM_SCM_ENOMEM:
-                return -ENOMEM;
-        }
-        return -EINVAL;
-}
-
-static u32 smc(u32 cmd_addr)
-{
-        int context_id;
-        register u32 r0 asm("r0") = 1;
-        register u32 r1 asm("r1") = (u32)&context_id;
-        register u32 r2 asm("r2") = cmd_addr;
-        do {
-                asm volatile(
-                        __asmeq("%0", "r0")
-                        __asmeq("%1", "r0")
-                        __asmeq("%2", "r1")
-                        __asmeq("%3", "r2")
-#ifdef REQUIRES_SEC
-                        ".arch_extension sec\n"
-#endif
-                        "smc    #0      @ switch to secure world\n"
-                        : "=r" (r0)
-                        : "r" (r0), "r" (r1), "r" (r2)
-                        : "r3");
-        } while (r0 == QCOM_SCM_INTERRUPTED);
-
-        return r0;
-}
-
-static int __qcom_scm_call(const struct qcom_scm_command *cmd)
-{
-        int ret;
-        u32 cmd_addr = virt_to_phys(cmd);
-
-        /*
-         * Flush the command buffer so that the secure world sees
-         * the correct data.
-         */
-        __cpuc_flush_dcache_area((void *)cmd, cmd->len);
-        outer_flush_range(cmd_addr, cmd_addr + cmd->len);
-
-        ret = smc(cmd_addr);
-        if (ret < 0)
-                ret = qcom_scm_remap_error(ret);
-
-        return ret;
-}
-
-static void qcom_scm_inv_range(unsigned long start, unsigned long end)
-{
-        u32 cacheline_size, ctr;
-
-        asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
-        cacheline_size = 4 << ((ctr >> 16) & 0xf);
-
-        start = round_down(start, cacheline_size);
-        end = round_up(end, cacheline_size);
-        outer_inv_range(start, end);
-        while (start < end) {
-                asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
-                     : "memory");
-                start += cacheline_size;
-        }
-        dsb();
-        isb();
-}
-
-/**
- * qcom_scm_call() - Send an SCM command
- * @svc_id: service identifier
- * @cmd_id: command identifier
- * @cmd_buf: command buffer
- * @cmd_len: length of the command buffer
- * @resp_buf: response buffer
- * @resp_len: length of the response buffer
- *
- * Sends a command to the SCM and waits for the command to finish processing.
- *
- * A note on cache maintenance:
- * Note that any buffers that are expected to be accessed by the secure world
- * must be flushed before invoking qcom_scm_call and invalidated in the cache
- * immediately after qcom_scm_call returns. Cache maintenance on the command
- * and response buffers is taken care of by qcom_scm_call; however, callers are
- * responsible for any other cached buffers passed over to the secure world.
- */
-static int qcom_scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf,
-                        size_t cmd_len, void *resp_buf, size_t resp_len)
-{
-        int ret;
-        struct qcom_scm_command *cmd;
-        struct qcom_scm_response *rsp;
-        unsigned long start, end;
-
-        cmd = alloc_qcom_scm_command(cmd_len, resp_len);
-        if (!cmd)
-                return -ENOMEM;
-
-        cmd->id = cpu_to_le32((svc_id << 10) | cmd_id);
-        if (cmd_buf)
-                memcpy(qcom_scm_get_command_buffer(cmd), cmd_buf, cmd_len);
-
-        mutex_lock(&qcom_scm_lock);
-        ret = __qcom_scm_call(cmd);
-        mutex_unlock(&qcom_scm_lock);
-        if (ret)
-                goto out;
-
-        rsp = qcom_scm_command_to_response(cmd);
-        start = (unsigned long)rsp;
-
-        do {
-                qcom_scm_inv_range(start, start + sizeof(*rsp));
-        } while (!rsp->is_complete);
-
-        end = (unsigned long)qcom_scm_get_response_buffer(rsp) + resp_len;
-        qcom_scm_inv_range(start, end);
-
-        if (resp_buf)
-                memcpy(resp_buf, qcom_scm_get_response_buffer(rsp), resp_len);
-out:
-        free_qcom_scm_command(cmd);
-        return ret;
-}
-
-#define SCM_CLASS_REGISTER      (0x2 << 8)
-#define SCM_MASK_IRQS           BIT(5)
-#define SCM_ATOMIC(svc, cmd, n) (((((svc) << 10)|((cmd) & 0x3ff)) << 12) | \
-                                SCM_CLASS_REGISTER | \
-                                SCM_MASK_IRQS | \
-                                (n & 0xf))
-
-/**
- * qcom_scm_call_atomic1() - Send an atomic SCM command with one argument
- * @svc_id: service identifier
- * @cmd_id: command identifier
- * @arg1: first argument
- *
- * This shall only be used with commands that are guaranteed to be
- * uninterruptable, atomic and SMP safe.
- */
-static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)
-{
-        int context_id;
-
-        register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 1);
-        register u32 r1 asm("r1") = (u32)&context_id;
-        register u32 r2 asm("r2") = arg1;
-
-        asm volatile(
-                        __asmeq("%0", "r0")
-                        __asmeq("%1", "r0")
-                        __asmeq("%2", "r1")
-                        __asmeq("%3", "r2")
-#ifdef REQUIRES_SEC
-                        ".arch_extension sec\n"
-#endif
-                        "smc    #0      @ switch to secure world\n"
-                        : "=r" (r0)
-                        : "r" (r0), "r" (r1), "r" (r2)
-                        : "r3");
-        return r0;
-}
-
-u32 qcom_scm_get_version(void)
-{
-        int context_id;
-        static u32 version = -1;
-        register u32 r0 asm("r0");
-        register u32 r1 asm("r1");
-
-        if (version != -1)
-                return version;
-
-        mutex_lock(&qcom_scm_lock);
-
-        r0 = 0x1 << 8;
-        r1 = (u32)&context_id;
-        do {
-                asm volatile(
-                        __asmeq("%0", "r0")
-                        __asmeq("%1", "r1")
-                        __asmeq("%2", "r0")
-                        __asmeq("%3", "r1")
-#ifdef REQUIRES_SEC
-                        ".arch_extension sec\n"
-#endif
-                        "smc    #0      @ switch to secure world\n"
-                        : "=r" (r0), "=r" (r1)
-                        : "r" (r0), "r" (r1)
-                        : "r2", "r3");
-        } while (r0 == QCOM_SCM_INTERRUPTED);
-
-        version = r1;
-        mutex_unlock(&qcom_scm_lock);
-
-        return version;
-}
-EXPORT_SYMBOL(qcom_scm_get_version);
-
-#define QCOM_SCM_SVC_BOOT                       0x1
-#define QCOM_SCM_BOOT_ADDR                      0x1
-/*
- * Set the cold/warm boot address for one of the CPU cores.
- */
-static int qcom_scm_set_boot_addr(u32 addr, int flags)
-{
-        struct {
-                __le32 flags;
-                __le32 addr;
-        } cmd;
-
-        cmd.addr = cpu_to_le32(addr);
-        cmd.flags = cpu_to_le32(flags);
-        return qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR,
-                        &cmd, sizeof(cmd), NULL, 0);
-}
+#include "qcom_scm.h"
 
 /**
  * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
@@ -414,26 +33,7 @@ static int qcom_scm_set_boot_addr(u32 addr, int flags)
  */
 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
 {
-        int flags = 0;
-        int cpu;
-        int scm_cb_flags[] = {
-                QCOM_SCM_FLAG_COLDBOOT_CPU0,
-                QCOM_SCM_FLAG_COLDBOOT_CPU1,
-                QCOM_SCM_FLAG_COLDBOOT_CPU2,
-                QCOM_SCM_FLAG_COLDBOOT_CPU3,
-        };
-
-        if (!cpus || (cpus && cpumask_empty(cpus)))
-                return -EINVAL;
-
-        for_each_cpu(cpu, cpus) {
-                if (cpu < ARRAY_SIZE(scm_cb_flags))
-                        flags |= scm_cb_flags[cpu];
-                else
-                        set_cpu_present(cpu, false);
-        }
-
-        return qcom_scm_set_boot_addr(virt_to_phys(entry), flags);
+        return __qcom_scm_set_cold_boot_addr(entry, cpus);
 }
 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
 
@@ -447,37 +47,10 @@ EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
  */
 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
 {
-        int ret;
-        int flags = 0;
-        int cpu;
-
-        /*
-         * Reassign only if we are switching from hotplug entry point
-         * to cpuidle entry point or vice versa.
-         */
-        for_each_cpu(cpu, cpus) {
-                if (entry == qcom_scm_wb[cpu].entry)
-                        continue;
-                flags |= qcom_scm_wb[cpu].flag;
-        }
-
-        /* No change in entry function */
-        if (!flags)
-                return 0;
-
-        ret = qcom_scm_set_boot_addr(virt_to_phys(entry), flags);
-        if (!ret) {
-                for_each_cpu(cpu, cpus)
-                        qcom_scm_wb[cpu].entry = entry;
-        }
-
-        return ret;
+        return __qcom_scm_set_warm_boot_addr(entry, cpus);
 }
 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
 
-#define QCOM_SCM_CMD_TERMINATE_PC       0x2
-#define QCOM_SCM_FLUSH_FLAG_MASK        0x3
-
 /**
  * qcom_scm_cpu_power_down() - Power down the cpu
  * @flags - Flags to flush cache
@@ -488,7 +61,6 @@ EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
  */
 void qcom_scm_cpu_power_down(u32 flags)
 {
-        qcom_scm_call_atomic1(QCOM_SCM_SVC_BOOT, QCOM_SCM_CMD_TERMINATE_PC,
-                        flags & QCOM_SCM_FLUSH_FLAG_MASK);
+        __qcom_scm_cpu_power_down(flags);
 }
 EXPORT_SYMBOL(qcom_scm_cpu_power_down);
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
new file mode 100644
index 000000000000..1172be917307
--- /dev/null
+++ b/drivers/firmware/qcom_scm.h
@@ -0,0 +1,38 @@
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __QCOM_SCM_INT_H
+#define __QCOM_SCM_INT_H
+
+#define QCOM_SCM_SVC_BOOT               0x1
+#define QCOM_SCM_BOOT_ADDR              0x1
+#define QCOM_SCM_BOOT_ADDR_MC           0x11
+
+#define QCOM_SCM_FLAG_HLOS              0x01
+#define QCOM_SCM_FLAG_COLDBOOT_MC       0x02
+#define QCOM_SCM_FLAG_WARMBOOT_MC       0x04
+extern int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
+extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
+
+#define QCOM_SCM_CMD_TERMINATE_PC       0x2
+#define QCOM_SCM_FLUSH_FLAG_MASK        0x3
+#define QCOM_SCM_CMD_CORE_HOTPLUGGED    0x10
+extern void __qcom_scm_cpu_power_down(u32 flags);
+
+/* common error codes */
+#define QCOM_SCM_ENOMEM         -5
+#define QCOM_SCM_EOPNOTSUPP     -4
+#define QCOM_SCM_EINVAL_ADDR    -3
+#define QCOM_SCM_EINVAL_ARG     -2
+#define QCOM_SCM_ERROR          -1
+#define QCOM_SCM_INTERRUPTED    1
+
+#endif