diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-11-18 13:54:59 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-11-18 13:54:59 -0500 |
| commit | b53e27f618b58d50db72375eb8e1b6ddcef7cdb5 (patch) | |
| tree | bb409766aa4562b1308afb13fa9b29ed6e25eed9 | |
| parent | 743a4863fddc4fdd591e1cbf4157e981a71b0f09 (diff) | |
| parent | 4d47d6407ac7b4b442a4e717488a3bb137398b6c (diff) | |
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Fix uncore PMU enumeration for CofeeLake CPUs"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel/uncore: Support CoffeeLake 8th CBOX
perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUs
| -rw-r--r-- | arch/x86/events/intel/uncore.h | 33 | ||||
| -rw-r--r-- | arch/x86/events/intel/uncore_snb.c | 121 |
2 files changed, 144 insertions, 10 deletions
diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index e17ab885b1e9..cb46d602a6b8 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h | |||
| @@ -129,8 +129,15 @@ struct intel_uncore_box { | |||
| 129 | struct intel_uncore_extra_reg shared_regs[0]; | 129 | struct intel_uncore_extra_reg shared_regs[0]; |
| 130 | }; | 130 | }; |
| 131 | 131 | ||
| 132 | #define UNCORE_BOX_FLAG_INITIATED 0 | 132 | /* CFL uncore 8th cbox MSRs */ |
| 133 | #define UNCORE_BOX_FLAG_CTL_OFFS8 1 /* event config registers are 8-byte apart */ | 133 | #define CFL_UNC_CBO_7_PERFEVTSEL0 0xf70 |
| 134 | #define CFL_UNC_CBO_7_PER_CTR0 0xf76 | ||
| 135 | |||
| 136 | #define UNCORE_BOX_FLAG_INITIATED 0 | ||
| 137 | /* event config registers are 8-byte apart */ | ||
| 138 | #define UNCORE_BOX_FLAG_CTL_OFFS8 1 | ||
| 139 | /* CFL 8th CBOX has different MSR space */ | ||
| 140 | #define UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS 2 | ||
| 134 | 141 | ||
| 135 | struct uncore_event_desc { | 142 | struct uncore_event_desc { |
| 136 | struct kobj_attribute attr; | 143 | struct kobj_attribute attr; |
| @@ -297,17 +304,27 @@ unsigned int uncore_freerunning_counter(struct intel_uncore_box *box, | |||
| 297 | static inline | 304 | static inline |
| 298 | unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx) | 305 | unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx) |
| 299 | { | 306 | { |
| 300 | return box->pmu->type->event_ctl + | 307 | if (test_bit(UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS, &box->flags)) { |
| 301 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + | 308 | return CFL_UNC_CBO_7_PERFEVTSEL0 + |
| 302 | uncore_msr_box_offset(box); | 309 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx); |
| 310 | } else { | ||
| 311 | return box->pmu->type->event_ctl + | ||
| 312 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + | ||
| 313 | uncore_msr_box_offset(box); | ||
| 314 | } | ||
| 303 | } | 315 | } |
| 304 | 316 | ||
| 305 | static inline | 317 | static inline |
| 306 | unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx) | 318 | unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx) |
| 307 | { | 319 | { |
| 308 | return box->pmu->type->perf_ctr + | 320 | if (test_bit(UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS, &box->flags)) { |
| 309 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + | 321 | return CFL_UNC_CBO_7_PER_CTR0 + |
| 310 | uncore_msr_box_offset(box); | 322 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx); |
| 323 | } else { | ||
| 324 | return box->pmu->type->perf_ctr + | ||
| 325 | (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + | ||
| 326 | uncore_msr_box_offset(box); | ||
| 327 | } | ||
| 311 | } | 328 | } |
| 312 | 329 | ||
| 313 | static inline | 330 | static inline |
diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c index 8527c3e1038b..2593b0d7aeee 100644 --- a/arch/x86/events/intel/uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c | |||
| @@ -15,6 +15,25 @@ | |||
| 15 | #define PCI_DEVICE_ID_INTEL_SKL_HQ_IMC 0x1910 | 15 | #define PCI_DEVICE_ID_INTEL_SKL_HQ_IMC 0x1910 |
| 16 | #define PCI_DEVICE_ID_INTEL_SKL_SD_IMC 0x190f | 16 | #define PCI_DEVICE_ID_INTEL_SKL_SD_IMC 0x190f |
| 17 | #define PCI_DEVICE_ID_INTEL_SKL_SQ_IMC 0x191f | 17 | #define PCI_DEVICE_ID_INTEL_SKL_SQ_IMC 0x191f |
| 18 | #define PCI_DEVICE_ID_INTEL_KBL_Y_IMC 0x590c | ||
| 19 | #define PCI_DEVICE_ID_INTEL_KBL_U_IMC 0x5904 | ||
| 20 | #define PCI_DEVICE_ID_INTEL_KBL_UQ_IMC 0x5914 | ||
| 21 | #define PCI_DEVICE_ID_INTEL_KBL_SD_IMC 0x590f | ||
| 22 | #define PCI_DEVICE_ID_INTEL_KBL_SQ_IMC 0x591f | ||
| 23 | #define PCI_DEVICE_ID_INTEL_CFL_2U_IMC 0x3ecc | ||
| 24 | #define PCI_DEVICE_ID_INTEL_CFL_4U_IMC 0x3ed0 | ||
| 25 | #define PCI_DEVICE_ID_INTEL_CFL_4H_IMC 0x3e10 | ||
| 26 | #define PCI_DEVICE_ID_INTEL_CFL_6H_IMC 0x3ec4 | ||
| 27 | #define PCI_DEVICE_ID_INTEL_CFL_2S_D_IMC 0x3e0f | ||
| 28 | #define PCI_DEVICE_ID_INTEL_CFL_4S_D_IMC 0x3e1f | ||
| 29 | #define PCI_DEVICE_ID_INTEL_CFL_6S_D_IMC 0x3ec2 | ||
| 30 | #define PCI_DEVICE_ID_INTEL_CFL_8S_D_IMC 0x3e30 | ||
| 31 | #define PCI_DEVICE_ID_INTEL_CFL_4S_W_IMC 0x3e18 | ||
| 32 | #define PCI_DEVICE_ID_INTEL_CFL_6S_W_IMC 0x3ec6 | ||
| 33 | #define PCI_DEVICE_ID_INTEL_CFL_8S_W_IMC 0x3e31 | ||
| 34 | #define PCI_DEVICE_ID_INTEL_CFL_4S_S_IMC 0x3e33 | ||
| 35 | #define PCI_DEVICE_ID_INTEL_CFL_6S_S_IMC 0x3eca | ||
| 36 | #define PCI_DEVICE_ID_INTEL_CFL_8S_S_IMC 0x3e32 | ||
| 18 | 37 | ||
| 19 | /* SNB event control */ | 38 | /* SNB event control */ |
| 20 | #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff | 39 | #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff |
| @@ -202,6 +221,10 @@ static void skl_uncore_msr_init_box(struct intel_uncore_box *box) | |||
| 202 | wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, | 221 | wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, |
| 203 | SNB_UNC_GLOBAL_CTL_EN | SKL_UNC_GLOBAL_CTL_CORE_ALL); | 222 | SNB_UNC_GLOBAL_CTL_EN | SKL_UNC_GLOBAL_CTL_CORE_ALL); |
| 204 | } | 223 | } |
| 224 | |||
| 225 | /* The 8th CBOX has different MSR space */ | ||
| 226 | if (box->pmu->pmu_idx == 7) | ||
| 227 | __set_bit(UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS, &box->flags); | ||
| 205 | } | 228 | } |
| 206 | 229 | ||
| 207 | static void skl_uncore_msr_enable_box(struct intel_uncore_box *box) | 230 | static void skl_uncore_msr_enable_box(struct intel_uncore_box *box) |
| @@ -228,7 +251,7 @@ static struct intel_uncore_ops skl_uncore_msr_ops = { | |||
| 228 | static struct intel_uncore_type skl_uncore_cbox = { | 251 | static struct intel_uncore_type skl_uncore_cbox = { |
| 229 | .name = "cbox", | 252 | .name = "cbox", |
| 230 | .num_counters = 4, | 253 | .num_counters = 4, |
| 231 | .num_boxes = 5, | 254 | .num_boxes = 8, |
| 232 | .perf_ctr_bits = 44, | 255 | .perf_ctr_bits = 44, |
| 233 | .fixed_ctr_bits = 48, | 256 | .fixed_ctr_bits = 48, |
| 234 | .perf_ctr = SNB_UNC_CBO_0_PER_CTR0, | 257 | .perf_ctr = SNB_UNC_CBO_0_PER_CTR0, |
| @@ -569,7 +592,82 @@ static const struct pci_device_id skl_uncore_pci_ids[] = { | |||
| 569 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SKL_SQ_IMC), | 592 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SKL_SQ_IMC), |
| 570 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | 593 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), |
| 571 | }, | 594 | }, |
| 572 | 595 | { /* IMC */ | |
| 596 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_Y_IMC), | ||
| 597 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 598 | }, | ||
| 599 | { /* IMC */ | ||
| 600 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_U_IMC), | ||
| 601 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 602 | }, | ||
| 603 | { /* IMC */ | ||
| 604 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_UQ_IMC), | ||
| 605 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 606 | }, | ||
| 607 | { /* IMC */ | ||
| 608 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_SD_IMC), | ||
| 609 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 610 | }, | ||
| 611 | { /* IMC */ | ||
| 612 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_SQ_IMC), | ||
| 613 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 614 | }, | ||
| 615 | { /* IMC */ | ||
| 616 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_2U_IMC), | ||
| 617 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 618 | }, | ||
| 619 | { /* IMC */ | ||
| 620 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4U_IMC), | ||
| 621 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 622 | }, | ||
| 623 | { /* IMC */ | ||
| 624 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4H_IMC), | ||
| 625 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 626 | }, | ||
| 627 | { /* IMC */ | ||
| 628 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6H_IMC), | ||
| 629 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 630 | }, | ||
| 631 | { /* IMC */ | ||
| 632 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_2S_D_IMC), | ||
| 633 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 634 | }, | ||
| 635 | { /* IMC */ | ||
| 636 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_D_IMC), | ||
| 637 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 638 | }, | ||
| 639 | { /* IMC */ | ||
| 640 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_D_IMC), | ||
| 641 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 642 | }, | ||
| 643 | { /* IMC */ | ||
| 644 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_D_IMC), | ||
| 645 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 646 | }, | ||
| 647 | { /* IMC */ | ||
| 648 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_W_IMC), | ||
| 649 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 650 | }, | ||
| 651 | { /* IMC */ | ||
| 652 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_W_IMC), | ||
| 653 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 654 | }, | ||
| 655 | { /* IMC */ | ||
| 656 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_W_IMC), | ||
| 657 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 658 | }, | ||
| 659 | { /* IMC */ | ||
| 660 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_S_IMC), | ||
| 661 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 662 | }, | ||
| 663 | { /* IMC */ | ||
| 664 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_S_IMC), | ||
| 665 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 666 | }, | ||
| 667 | { /* IMC */ | ||
| 668 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_S_IMC), | ||
| 669 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
| 670 | }, | ||
| 573 | { /* end: all zeroes */ }, | 671 | { /* end: all zeroes */ }, |
| 574 | }; | 672 | }; |
| 575 | 673 | ||
| @@ -618,6 +716,25 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = { | |||
| 618 | IMC_DEV(SKL_HQ_IMC, &skl_uncore_pci_driver), /* 6th Gen Core H Quad Core */ | 716 | IMC_DEV(SKL_HQ_IMC, &skl_uncore_pci_driver), /* 6th Gen Core H Quad Core */ |
| 619 | IMC_DEV(SKL_SD_IMC, &skl_uncore_pci_driver), /* 6th Gen Core S Dual Core */ | 717 | IMC_DEV(SKL_SD_IMC, &skl_uncore_pci_driver), /* 6th Gen Core S Dual Core */ |
| 620 | IMC_DEV(SKL_SQ_IMC, &skl_uncore_pci_driver), /* 6th Gen Core S Quad Core */ | 718 | IMC_DEV(SKL_SQ_IMC, &skl_uncore_pci_driver), /* 6th Gen Core S Quad Core */ |
| 719 | IMC_DEV(KBL_Y_IMC, &skl_uncore_pci_driver), /* 7th Gen Core Y */ | ||
| 720 | IMC_DEV(KBL_U_IMC, &skl_uncore_pci_driver), /* 7th Gen Core U */ | ||
| 721 | IMC_DEV(KBL_UQ_IMC, &skl_uncore_pci_driver), /* 7th Gen Core U Quad Core */ | ||
| 722 | IMC_DEV(KBL_SD_IMC, &skl_uncore_pci_driver), /* 7th Gen Core S Dual Core */ | ||
| 723 | IMC_DEV(KBL_SQ_IMC, &skl_uncore_pci_driver), /* 7th Gen Core S Quad Core */ | ||
| 724 | IMC_DEV(CFL_2U_IMC, &skl_uncore_pci_driver), /* 8th Gen Core U 2 Cores */ | ||
| 725 | IMC_DEV(CFL_4U_IMC, &skl_uncore_pci_driver), /* 8th Gen Core U 4 Cores */ | ||
| 726 | IMC_DEV(CFL_4H_IMC, &skl_uncore_pci_driver), /* 8th Gen Core H 4 Cores */ | ||
| 727 | IMC_DEV(CFL_6H_IMC, &skl_uncore_pci_driver), /* 8th Gen Core H 6 Cores */ | ||
| 728 | IMC_DEV(CFL_2S_D_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 2 Cores Desktop */ | ||
| 729 | IMC_DEV(CFL_4S_D_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 4 Cores Desktop */ | ||
| 730 | IMC_DEV(CFL_6S_D_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 6 Cores Desktop */ | ||
| 731 | IMC_DEV(CFL_8S_D_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 8 Cores Desktop */ | ||
| 732 | IMC_DEV(CFL_4S_W_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 4 Cores Work Station */ | ||
| 733 | IMC_DEV(CFL_6S_W_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 6 Cores Work Station */ | ||
| 734 | IMC_DEV(CFL_8S_W_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 8 Cores Work Station */ | ||
| 735 | IMC_DEV(CFL_4S_S_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 4 Cores Server */ | ||
| 736 | IMC_DEV(CFL_6S_S_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 6 Cores Server */ | ||
| 737 | IMC_DEV(CFL_8S_S_IMC, &skl_uncore_pci_driver), /* 8th Gen Core S 8 Cores Server */ | ||
| 621 | { /* end marker */ } | 738 | { /* end marker */ } |
| 622 | }; | 739 | }; |
| 623 | 740 | ||
