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authorTony Lindgren <tony@atomide.com>2017-04-09 19:35:51 -0400
committerTony Lindgren <tony@atomide.com>2017-04-09 19:35:51 -0400
commitb4e1566e4c5e9fcaf9e17ad741b6094b4f3ddce5 (patch)
treebe69fd137d881ccfa34a62354ad27555bae8d936
parentc0bde0bf2bfefe2bae04e09d3741f6f9899c7858 (diff)
parent8434fbefc63790ee928d04cad0458508eaa39ffd (diff)
Merge branch 'omap-for-v4.12/dt-droid4-v2' into omap-for-v4.12/dt-v2
-rw-r--r--arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi51
-rw-r--r--arch/arm/boot/dts/omap4-droid4-xt894.dts13
2 files changed, 51 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
index 49b76aa16e5f..f5aeb3959afd 100644
--- a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
+++ b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
@@ -11,7 +11,7 @@
11 compatible = "motorola,cpcap", "st,6556002"; 11 compatible = "motorola,cpcap", "st,6556002";
12 reg = <0>; /* cs0 */ 12 reg = <0>; /* cs0 */
13 interrupt-parent = <&gpio1>; 13 interrupt-parent = <&gpio1>;
14 interrupts = <7 IRQ_TYPE_EDGE_RISING>; 14 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
15 interrupt-controller; 15 interrupt-controller;
16 #interrupt-cells = <2>; 16 #interrupt-cells = <2>;
17 #address-cells = <1>; 17 #address-cells = <1>;
@@ -19,6 +19,32 @@
19 spi-max-frequency = <3000000>; 19 spi-max-frequency = <3000000>;
20 spi-cs-high; 20 spi-cs-high;
21 21
22 cpcap_adc: adc {
23 compatible = "motorola,mapphone-cpcap-adc";
24 interrupts-extended = <&cpcap 8 0>;
25 interrupt-names = "adcdone";
26 #io-channel-cells = <1>;
27 };
28
29 cpcap_charger: charger {
30 compatible = "motorola,mapphone-cpcap-charger";
31 interrupts-extended = <
32 &cpcap 13 0 &cpcap 12 0 &cpcap 29 0 &cpcap 28 0
33 &cpcap 22 0 &cpcap 20 0 &cpcap 19 0 &cpcap 54 0
34 >;
35 interrupt-names =
36 "chrg_det", "rvrs_chrg", "chrg_se1b", "se0conn",
37 "rvrs_mode", "chrgcurr1", "vbusvld", "battdetb";
38 mode-gpios = <&gpio3 29 GPIO_ACTIVE_LOW
39 &gpio3 23 GPIO_ACTIVE_LOW>;
40 io-channels = <&cpcap_adc 0 &cpcap_adc 1
41 &cpcap_adc 2 &cpcap_adc 5
42 &cpcap_adc 6>;
43 io-channel-names = "battdetb", "battp",
44 "vbus", "chg_isense",
45 "batti";
46 };
47
22 cpcap_regulator: regulator { 48 cpcap_regulator: regulator {
23 compatible = "motorola,mapphone-cpcap-regulator"; 49 compatible = "motorola,mapphone-cpcap-regulator";
24 50
@@ -39,6 +65,29 @@
39 interrupts = <23 IRQ_TYPE_NONE>; 65 interrupts = <23 IRQ_TYPE_NONE>;
40 }; 66 };
41 67
68 cpcap_usb2_phy: phy {
69 compatible = "motorola,mapphone-cpcap-usb-phy";
70 pinctrl-0 = <&usb_gpio_mux_sel1 &usb_gpio_mux_sel2>;
71 pinctrl-1 = <&usb_ulpi_pins>;
72 pinctrl-2 = <&usb_utmi_pins>;
73 pinctrl-3 = <&uart3_pins>;
74 pinctrl-names = "default", "ulpi", "utmi", "uart";
75 #phy-cells = <0>;
76 interrupts-extended = <
77 &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0
78 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0
79 &cpcap 48 1
80 >;
81 interrupt-names =
82 "id_ground", "id_float", "se0conn", "vbusvld",
83 "sessvld", "sessend", "se1", "dm", "dp";
84 mode-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH
85 &gpio1 0 GPIO_ACTIVE_HIGH>;
86 io-channels = <&cpcap_adc 2>, <&cpcap_adc 7>;
87 io-channel-names = "vbus", "id";
88 vusb-supply = <&vusb>;
89 };
90
42 led_red: led-red { 91 led_red: led-red {
43 compatible = "motorola,cpcap-led-red"; 92 compatible = "motorola,cpcap-led-red";
44 vdd-supply = <&sw5>; 93 vdd-supply = <&sw5>;
diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts
index f27966e3cbc0..89eb607f4a9e 100644
--- a/arch/arm/boot/dts/omap4-droid4-xt894.dts
+++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts
@@ -24,8 +24,7 @@
24 24
25 /* 25 /*
26 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, 26 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
27 * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes 27 * then 1023 - 1024 seems to contain mbm.
28 * below about SRAM and L3_ICLK2 being unused by default,
29 */ 28 */
30 memory { 29 memory {
31 device_type = "memory"; 30 device_type = "memory";
@@ -176,11 +175,6 @@
176 }; 175 };
177}; 176};
178 177
179/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
180&gpmc {
181 status = "disabled";
182};
183
184&hdmi { 178&hdmi {
185 status = "okay"; 179 status = "okay";
186 pinctrl-0 = <&dss_hdmi_pins>; 180 pinctrl-0 = <&dss_hdmi_pins>;
@@ -356,11 +350,6 @@
356 }; 350 };
357}; 351};
358 352
359/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
360&ocmcram {
361 status = "disabled";
362};
363
364&omap4_pmx_core { 353&omap4_pmx_core {
365 354
366 /* hdmi_hpd.gpio_63 */ 355 /* hdmi_hpd.gpio_63 */