aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGuo Zeng <Guo.Zeng@csr.com>2015-12-01 22:37:47 -0500
committerWim Van Sebroeck <wim@iguana.be>2015-12-28 16:09:50 -0500
commitb466ee89509a1593441537f34c313edafe2ba47c (patch)
tree146c733b737ed1b795e8e70f2ab49dbaa4613db9
parent71388840ec360e0489be7a75971b595c729b5323 (diff)
watchdog: atlas7: add watchdog driver of CSRatlas7
This patch adds watchdog driver for CSRatlas7 platform. On CSRatlas7, the 6th timer can act as a watchdog timer when the Watchdog mode is enabled. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: William Wang <William.Wang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
-rw-r--r--drivers/watchdog/Kconfig10
-rw-r--r--drivers/watchdog/Makefile1
-rw-r--r--drivers/watchdog/atlas7_wdt.c242
3 files changed, 253 insertions, 0 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 71e47dde7d4a..2116e088fd25 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -585,6 +585,16 @@ config LPC18XX_WATCHDOG
585 To compile this driver as a module, choose M here: the 585 To compile this driver as a module, choose M here: the
586 module will be called lpc18xx_wdt. 586 module will be called lpc18xx_wdt.
587 587
588config ATLAS7_WATCHDOG
589 tristate "CSRatlas7 watchdog"
590 depends on ARCH_ATLAS7
591 help
592 Say Y here to include Watchdog timer support for the watchdog
593 existing on the CSRatlas7 series platforms.
594
595 To compile this driver as a module, choose M here: the
596 module will be called atlas7_wdt.
597
588# AVR32 Architecture 598# AVR32 Architecture
589 599
590config AT32AP700X_WDT 600config AT32AP700X_WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 53d4827ddfe1..e2bc52c79aa7 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_wdt.o
69obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o 69obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o
70obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o 70obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o
71obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o 71obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
72obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
72 73
73# AVR32 Architecture 74# AVR32 Architecture
74obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o 75obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
diff --git a/drivers/watchdog/atlas7_wdt.c b/drivers/watchdog/atlas7_wdt.c
new file mode 100644
index 000000000000..df6d9242a319
--- /dev/null
+++ b/drivers/watchdog/atlas7_wdt.c
@@ -0,0 +1,242 @@
1/*
2 * Watchdog driver for CSR Atlas7
3 *
4 * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2.
7 */
8
9#include <linux/clk.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/of.h>
14#include <linux/platform_device.h>
15#include <linux/watchdog.h>
16
17#define ATLAS7_TIMER_WDT_INDEX 5
18#define ATLAS7_WDT_DEFAULT_TIMEOUT 20
19
20#define ATLAS7_WDT_CNT_CTRL (0 + 4 * ATLAS7_TIMER_WDT_INDEX)
21#define ATLAS7_WDT_CNT_MATCH (0x18 + 4 * ATLAS7_TIMER_WDT_INDEX)
22#define ATLAS7_WDT_CNT (0x48 + 4 * ATLAS7_TIMER_WDT_INDEX)
23#define ATLAS7_WDT_CNT_EN (BIT(0) | BIT(1))
24#define ATLAS7_WDT_EN 0x64
25
26static unsigned int timeout = ATLAS7_WDT_DEFAULT_TIMEOUT;
27static bool nowayout = WATCHDOG_NOWAYOUT;
28
29module_param(timeout, uint, 0);
30module_param(nowayout, bool, 0);
31
32MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
33MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
34 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
35
36struct atlas7_wdog {
37 struct device *dev;
38 void __iomem *base;
39 unsigned long tick_rate;
40 struct clk *clk;
41};
42
43static unsigned int atlas7_wdt_gettimeleft(struct watchdog_device *wdd)
44{
45 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
46 u32 counter, match, delta;
47
48 counter = readl(wdt->base + ATLAS7_WDT_CNT);
49 match = readl(wdt->base + ATLAS7_WDT_CNT_MATCH);
50 delta = match - counter;
51
52 return delta / wdt->tick_rate;
53}
54
55static int atlas7_wdt_ping(struct watchdog_device *wdd)
56{
57 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
58 u32 counter, match, delta;
59
60 counter = readl(wdt->base + ATLAS7_WDT_CNT);
61 delta = wdd->timeout * wdt->tick_rate;
62 match = counter + delta;
63
64 writel(match, wdt->base + ATLAS7_WDT_CNT_MATCH);
65
66 return 0;
67}
68
69static int atlas7_wdt_enable(struct watchdog_device *wdd)
70{
71 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
72
73 atlas7_wdt_ping(wdd);
74
75 writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) | ATLAS7_WDT_CNT_EN,
76 wdt->base + ATLAS7_WDT_CNT_CTRL);
77 writel(1, wdt->base + ATLAS7_WDT_EN);
78
79 return 0;
80}
81
82static int atlas7_wdt_disable(struct watchdog_device *wdd)
83{
84 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
85
86 writel(0, wdt->base + ATLAS7_WDT_EN);
87 writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) & ~ATLAS7_WDT_CNT_EN,
88 wdt->base + ATLAS7_WDT_CNT_CTRL);
89
90 return 0;
91}
92
93static int atlas7_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
94{
95 wdd->timeout = to;
96
97 return 0;
98}
99
100#define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
101
102static const struct watchdog_info atlas7_wdt_ident = {
103 .options = OPTIONS,
104 .firmware_version = 0,
105 .identity = "atlas7 Watchdog",
106};
107
108static struct watchdog_ops atlas7_wdt_ops = {
109 .owner = THIS_MODULE,
110 .start = atlas7_wdt_enable,
111 .stop = atlas7_wdt_disable,
112 .get_timeleft = atlas7_wdt_gettimeleft,
113 .ping = atlas7_wdt_ping,
114 .set_timeout = atlas7_wdt_settimeout,
115};
116
117static struct watchdog_device atlas7_wdd = {
118 .info = &atlas7_wdt_ident,
119 .ops = &atlas7_wdt_ops,
120 .timeout = ATLAS7_WDT_DEFAULT_TIMEOUT,
121};
122
123static const struct of_device_id atlas7_wdt_ids[] = {
124 { .compatible = "sirf,atlas7-tick"},
125 {}
126};
127
128static int atlas7_wdt_probe(struct platform_device *pdev)
129{
130 struct device_node *np = pdev->dev.of_node;
131 struct atlas7_wdog *wdt;
132 struct resource *res;
133 struct clk *clk;
134 int ret;
135
136 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
137 if (!wdt)
138 return -ENOMEM;
139 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
140 wdt->base = devm_ioremap_resource(&pdev->dev, res);
141 if (IS_ERR(wdt->base))
142 return PTR_ERR(wdt->base);
143
144 clk = of_clk_get(np, 0);
145 if (IS_ERR(clk))
146 return PTR_ERR(clk);
147 ret = clk_prepare_enable(clk);
148 if (ret) {
149 dev_err(&pdev->dev, "clk enable failed\n");
150 goto err;
151 }
152
153 /* disable watchdog hardware */
154 writel(0, wdt->base + ATLAS7_WDT_CNT_CTRL);
155
156 wdt->tick_rate = clk_get_rate(clk);
157 wdt->clk = clk;
158 atlas7_wdd.min_timeout = 1;
159 atlas7_wdd.max_timeout = UINT_MAX / wdt->tick_rate;
160
161 watchdog_init_timeout(&atlas7_wdd, 0, &pdev->dev);
162 watchdog_set_nowayout(&atlas7_wdd, nowayout);
163
164 watchdog_set_drvdata(&atlas7_wdd, wdt);
165 platform_set_drvdata(pdev, &atlas7_wdd);
166
167 ret = watchdog_register_device(&atlas7_wdd);
168 if (ret)
169 goto err1;
170
171 return 0;
172
173err1:
174 clk_disable_unprepare(clk);
175err:
176 clk_put(clk);
177 return ret;
178}
179
180static void atlas7_wdt_shutdown(struct platform_device *pdev)
181{
182 struct watchdog_device *wdd = platform_get_drvdata(pdev);
183 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
184
185 atlas7_wdt_disable(wdd);
186 clk_disable_unprepare(wdt->clk);
187}
188
189static int atlas7_wdt_remove(struct platform_device *pdev)
190{
191 struct watchdog_device *wdd = platform_get_drvdata(pdev);
192 struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
193
194 atlas7_wdt_shutdown(pdev);
195 clk_put(wdt->clk);
196 return 0;
197}
198
199static int __maybe_unused atlas7_wdt_suspend(struct device *dev)
200{
201 /*
202 * NOTE:timer controller registers settings are saved
203 * and restored back by the timer-atlas7.c
204 */
205 return 0;
206}
207
208static int __maybe_unused atlas7_wdt_resume(struct device *dev)
209{
210 struct watchdog_device *wdd = dev_get_drvdata(dev);
211
212 /*
213 * NOTE: Since timer controller registers settings are saved
214 * and restored back by the timer-atlas7.c, so we need not
215 * update WD settings except refreshing timeout.
216 */
217 atlas7_wdt_ping(wdd);
218
219 return 0;
220}
221
222static SIMPLE_DEV_PM_OPS(atlas7_wdt_pm_ops,
223 atlas7_wdt_suspend, atlas7_wdt_resume);
224
225MODULE_DEVICE_TABLE(of, atlas7_wdt_ids);
226
227static struct platform_driver atlas7_wdt_driver = {
228 .driver = {
229 .name = "atlas7-wdt",
230 .pm = &atlas7_wdt_pm_ops,
231 .of_match_table = atlas7_wdt_ids,
232 },
233 .probe = atlas7_wdt_probe,
234 .remove = atlas7_wdt_remove,
235 .shutdown = atlas7_wdt_shutdown,
236};
237module_platform_driver(atlas7_wdt_driver);
238
239MODULE_DESCRIPTION("CSRatlas7 watchdog driver");
240MODULE_AUTHOR("Guo Zeng <Guo.Zeng@csr.com>");
241MODULE_LICENSE("GPL v2");
242MODULE_ALIAS("platform:atlas7-wdt");