drm/i915/gvt: control the scheduler by timeslice usage

The timeslice usage will determine vGPU whether has chance to
schedule or not at every vGPU switch checkpoint.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

1 files changed, 7 insertions, 2 deletions

diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
index dd5b38c3e4ed..f84959170674 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -187,8 +187,11 @@ static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
                 if (!vgpu_has_pending_workload(vgpu_data->vgpu))
                         continue;
 
-                vgpu = vgpu_data->vgpu;
-                break;
+                /* Return the vGPU only if it has time slice left */
+                if (vgpu_data->left_ts > 0) {
+                        vgpu = vgpu_data->vgpu;
+                        break;
+                }
         }
 
         return vgpu;
@@ -223,6 +226,8 @@ static void tbs_sched_func(struct gvt_sched_data *sched_data)
                                 &sched_data->lru_runq_head);
 
                 gvt_dbg_sched("pick next vgpu %d\n", vgpu->id);
+        } else {
+                scheduler->next_vgpu = gvt->idle_vgpu;
         }
 out:
         if (scheduler->next_vgpu) {