diff options
author | Hariprasad Shenai <hariprasad@chelsio.com> | 2014-11-21 02:22:05 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-11-22 16:57:47 -0500 |
commit | b2e1a3f091cddd4e81a64d04a6641c2e860ea266 (patch) | |
tree | cf92c5174b665a036f03d16cdd9852918425425e | |
parent | 2b5fb1f25e7b22cb96fa8662f9c8f8cf34abc109 (diff) |
RDMA/cxgb4/cxgb4vf/csiostor: Cleanup macros/register defines related to PCIE, RSS and FW
This patch cleanups all PCIE, RSS & FW related macros/register defines that are
defined in t4fw_api.h and the affected files.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/infiniband/hw/cxgb4/provider.c | 8 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 8 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 56 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 68 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 227 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 16 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | 52 | ||||
-rw-r--r-- | drivers/scsi/csiostor/csio_hw.c | 18 | ||||
-rw-r--r-- | drivers/scsi/csiostor/csio_init.c | 8 | ||||
-rw-r--r-- | drivers/scsi/csiostor/csio_mb.c | 2 |
10 files changed, 282 insertions, 181 deletions
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c index 72e3b69d1b76..66bd6a2ad83b 100644 --- a/drivers/infiniband/hw/cxgb4/provider.c +++ b/drivers/infiniband/hw/cxgb4/provider.c | |||
@@ -408,10 +408,10 @@ static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, | |||
408 | PDBG("%s dev 0x%p\n", __func__, dev); | 408 | PDBG("%s dev 0x%p\n", __func__, dev); |
409 | 409 | ||
410 | return sprintf(buf, "%u.%u.%u.%u\n", | 410 | return sprintf(buf, "%u.%u.%u.%u\n", |
411 | FW_HDR_FW_VER_MAJOR_GET(c4iw_dev->rdev.lldi.fw_vers), | 411 | FW_HDR_FW_VER_MAJOR_G(c4iw_dev->rdev.lldi.fw_vers), |
412 | FW_HDR_FW_VER_MINOR_GET(c4iw_dev->rdev.lldi.fw_vers), | 412 | FW_HDR_FW_VER_MINOR_G(c4iw_dev->rdev.lldi.fw_vers), |
413 | FW_HDR_FW_VER_MICRO_GET(c4iw_dev->rdev.lldi.fw_vers), | 413 | FW_HDR_FW_VER_MICRO_G(c4iw_dev->rdev.lldi.fw_vers), |
414 | FW_HDR_FW_VER_BUILD_GET(c4iw_dev->rdev.lldi.fw_vers)); | 414 | FW_HDR_FW_VER_BUILD_G(c4iw_dev->rdev.lldi.fw_vers)); |
415 | } | 415 | } |
416 | 416 | ||
417 | static ssize_t show_hca(struct device *dev, struct device_attribute *attr, | 417 | static ssize_t show_hca(struct device *dev, struct device_attribute *attr, |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index a2196bc94485..e8b09bbdc226 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -318,10 +318,10 @@ struct adapter_params { | |||
318 | #include "t4fw_api.h" | 318 | #include "t4fw_api.h" |
319 | 319 | ||
320 | #define FW_VERSION(chip) ( \ | 320 | #define FW_VERSION(chip) ( \ |
321 | FW_HDR_FW_VER_MAJOR_GET(chip##FW_VERSION_MAJOR) | \ | 321 | FW_HDR_FW_VER_MAJOR_G(chip##FW_VERSION_MAJOR) | \ |
322 | FW_HDR_FW_VER_MINOR_GET(chip##FW_VERSION_MINOR) | \ | 322 | FW_HDR_FW_VER_MINOR_G(chip##FW_VERSION_MINOR) | \ |
323 | FW_HDR_FW_VER_MICRO_GET(chip##FW_VERSION_MICRO) | \ | 323 | FW_HDR_FW_VER_MICRO_G(chip##FW_VERSION_MICRO) | \ |
324 | FW_HDR_FW_VER_BUILD_GET(chip##FW_VERSION_BUILD)) | 324 | FW_HDR_FW_VER_BUILD_G(chip##FW_VERSION_BUILD)) |
325 | #define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf) | 325 | #define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf) |
326 | 326 | ||
327 | struct fw_info { | 327 | struct fw_info { |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 4c663cc106f1..a576da1eedf4 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -1616,14 +1616,14 @@ static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |||
1616 | if (adapter->params.fw_vers) | 1616 | if (adapter->params.fw_vers) |
1617 | snprintf(info->fw_version, sizeof(info->fw_version), | 1617 | snprintf(info->fw_version, sizeof(info->fw_version), |
1618 | "%u.%u.%u.%u, TP %u.%u.%u.%u", | 1618 | "%u.%u.%u.%u, TP %u.%u.%u.%u", |
1619 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.fw_vers), | 1619 | FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), |
1620 | FW_HDR_FW_VER_MINOR_GET(adapter->params.fw_vers), | 1620 | FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), |
1621 | FW_HDR_FW_VER_MICRO_GET(adapter->params.fw_vers), | 1621 | FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), |
1622 | FW_HDR_FW_VER_BUILD_GET(adapter->params.fw_vers), | 1622 | FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), |
1623 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.tp_vers), | 1623 | FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), |
1624 | FW_HDR_FW_VER_MINOR_GET(adapter->params.tp_vers), | 1624 | FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), |
1625 | FW_HDR_FW_VER_MICRO_GET(adapter->params.tp_vers), | 1625 | FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), |
1626 | FW_HDR_FW_VER_BUILD_GET(adapter->params.tp_vers)); | 1626 | FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); |
1627 | } | 1627 | } |
1628 | 1628 | ||
1629 | static void get_strings(struct net_device *dev, u32 stringset, u8 *data) | 1629 | static void get_strings(struct net_device *dev, u32 stringset, u8 *data) |
@@ -2935,7 +2935,7 @@ static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) | |||
2935 | int ret; | 2935 | int ret; |
2936 | const struct firmware *fw; | 2936 | const struct firmware *fw; |
2937 | struct adapter *adap = netdev2adap(netdev); | 2937 | struct adapter *adap = netdev2adap(netdev); |
2938 | unsigned int mbox = FW_PCIE_FW_MASTER_MASK + 1; | 2938 | unsigned int mbox = PCIE_FW_MASTER_M + 1; |
2939 | 2939 | ||
2940 | ef->data[sizeof(ef->data) - 1] = '\0'; | 2940 | ef->data[sizeof(ef->data) - 1] = '\0'; |
2941 | ret = request_firmware(&fw, ef->data, adap->pdev_dev); | 2941 | ret = request_firmware(&fw, ef->data, adap->pdev_dev); |
@@ -3046,45 +3046,45 @@ static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, | |||
3046 | info->data = 0; | 3046 | info->data = 0; |
3047 | switch (info->flow_type) { | 3047 | switch (info->flow_type) { |
3048 | case TCP_V4_FLOW: | 3048 | case TCP_V4_FLOW: |
3049 | if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) | 3049 | if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) |
3050 | info->data = RXH_IP_SRC | RXH_IP_DST | | 3050 | info->data = RXH_IP_SRC | RXH_IP_DST | |
3051 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | 3051 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
3052 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) | 3052 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) |
3053 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3053 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3054 | break; | 3054 | break; |
3055 | case UDP_V4_FLOW: | 3055 | case UDP_V4_FLOW: |
3056 | if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) && | 3056 | if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && |
3057 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN)) | 3057 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) |
3058 | info->data = RXH_IP_SRC | RXH_IP_DST | | 3058 | info->data = RXH_IP_SRC | RXH_IP_DST | |
3059 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | 3059 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
3060 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) | 3060 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) |
3061 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3061 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3062 | break; | 3062 | break; |
3063 | case SCTP_V4_FLOW: | 3063 | case SCTP_V4_FLOW: |
3064 | case AH_ESP_V4_FLOW: | 3064 | case AH_ESP_V4_FLOW: |
3065 | case IPV4_FLOW: | 3065 | case IPV4_FLOW: |
3066 | if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) | 3066 | if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) |
3067 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3067 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3068 | break; | 3068 | break; |
3069 | case TCP_V6_FLOW: | 3069 | case TCP_V6_FLOW: |
3070 | if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) | 3070 | if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) |
3071 | info->data = RXH_IP_SRC | RXH_IP_DST | | 3071 | info->data = RXH_IP_SRC | RXH_IP_DST | |
3072 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | 3072 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
3073 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) | 3073 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) |
3074 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3074 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3075 | break; | 3075 | break; |
3076 | case UDP_V6_FLOW: | 3076 | case UDP_V6_FLOW: |
3077 | if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) && | 3077 | if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && |
3078 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN)) | 3078 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) |
3079 | info->data = RXH_IP_SRC | RXH_IP_DST | | 3079 | info->data = RXH_IP_SRC | RXH_IP_DST | |
3080 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | 3080 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
3081 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) | 3081 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) |
3082 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3082 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3083 | break; | 3083 | break; |
3084 | case SCTP_V6_FLOW: | 3084 | case SCTP_V6_FLOW: |
3085 | case AH_ESP_V6_FLOW: | 3085 | case AH_ESP_V6_FLOW: |
3086 | case IPV6_FLOW: | 3086 | case IPV6_FLOW: |
3087 | if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) | 3087 | if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) |
3088 | info->data = RXH_IP_SRC | RXH_IP_DST; | 3088 | info->data = RXH_IP_SRC | RXH_IP_DST; |
3089 | break; | 3089 | break; |
3090 | } | 3090 | } |
@@ -3420,7 +3420,7 @@ int cxgb4_clip_get(const struct net_device *dev, | |||
3420 | memset(&c, 0, sizeof(c)); | 3420 | memset(&c, 0, sizeof(c)); |
3421 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | | 3421 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | |
3422 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); | 3422 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
3423 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_ALLOC | FW_LEN16(c)); | 3423 | c.alloc_to_len16 = htonl(FW_CLIP_CMD_ALLOC_F | FW_LEN16(c)); |
3424 | c.ip_hi = *(__be64 *)(lip->s6_addr); | 3424 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
3425 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); | 3425 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
3426 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); | 3426 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); |
@@ -3437,7 +3437,7 @@ int cxgb4_clip_release(const struct net_device *dev, | |||
3437 | memset(&c, 0, sizeof(c)); | 3437 | memset(&c, 0, sizeof(c)); |
3438 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | | 3438 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | |
3439 | FW_CMD_REQUEST_F | FW_CMD_READ_F); | 3439 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
3440 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_FREE | FW_LEN16(c)); | 3440 | c.alloc_to_len16 = htonl(FW_CLIP_CMD_FREE_F | FW_LEN16(c)); |
3441 | c.ip_hi = *(__be64 *)(lip->s6_addr); | 3441 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
3442 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); | 3442 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
3443 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); | 3443 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); |
@@ -4988,8 +4988,8 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) | |||
4988 | 4988 | ||
4989 | ret = t4_config_glbl_rss(adap, adap->fn, | 4989 | ret = t4_config_glbl_rss(adap, adap->fn, |
4990 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, | 4990 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, |
4991 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN | | 4991 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F | |
4992 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP); | 4992 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F); |
4993 | if (ret < 0) | 4993 | if (ret < 0) |
4994 | return ret; | 4994 | return ret; |
4995 | 4995 | ||
@@ -5365,10 +5365,10 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5365 | adapter->flags |= RSS_TNLALLLOOKUP; | 5365 | adapter->flags |= RSS_TNLALLLOOKUP; |
5366 | ret = t4_config_glbl_rss(adapter, adapter->mbox, | 5366 | ret = t4_config_glbl_rss(adapter, adapter->mbox, |
5367 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, | 5367 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, |
5368 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN | | 5368 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F | |
5369 | FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ | | 5369 | FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F | |
5370 | ((adapter->flags & RSS_TNLALLLOOKUP) ? | 5370 | ((adapter->flags & RSS_TNLALLLOOKUP) ? |
5371 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP : 0)); | 5371 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F : 0)); |
5372 | if (ret < 0) | 5372 | if (ret < 0) |
5373 | goto bye; | 5373 | goto bye; |
5374 | 5374 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 20432e2bb17f..7975d26f50df 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -188,9 +188,9 @@ static void t4_report_fw_error(struct adapter *adap) | |||
188 | u32 pcie_fw; | 188 | u32 pcie_fw; |
189 | 189 | ||
190 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); | 190 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); |
191 | if (pcie_fw & FW_PCIE_FW_ERR) | 191 | if (pcie_fw & PCIE_FW_ERR) |
192 | dev_err(adap->pdev_dev, "Firmware reports adapter error: %s\n", | 192 | dev_err(adap->pdev_dev, "Firmware reports adapter error: %s\n", |
193 | reason[FW_PCIE_FW_EVAL_GET(pcie_fw)]); | 193 | reason[PCIE_FW_EVAL_G(pcie_fw)]); |
194 | } | 194 | } |
195 | 195 | ||
196 | /* | 196 | /* |
@@ -993,10 +993,10 @@ static int should_install_fs_fw(struct adapter *adap, int card_fw_usable, | |||
993 | install: | 993 | install: |
994 | dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, " | 994 | dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, " |
995 | "installing firmware %u.%u.%u.%u on card.\n", | 995 | "installing firmware %u.%u.%u.%u on card.\n", |
996 | FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c), | 996 | FW_HDR_FW_VER_MAJOR_G(c), FW_HDR_FW_VER_MINOR_G(c), |
997 | FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), reason, | 997 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), reason, |
998 | FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k), | 998 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), |
999 | FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k)); | 999 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); |
1000 | 1000 | ||
1001 | return 1; | 1001 | return 1; |
1002 | } | 1002 | } |
@@ -1068,12 +1068,12 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, | |||
1068 | "driver compiled with %d.%d.%d.%d, " | 1068 | "driver compiled with %d.%d.%d.%d, " |
1069 | "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n", | 1069 | "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n", |
1070 | state, | 1070 | state, |
1071 | FW_HDR_FW_VER_MAJOR_GET(d), FW_HDR_FW_VER_MINOR_GET(d), | 1071 | FW_HDR_FW_VER_MAJOR_G(d), FW_HDR_FW_VER_MINOR_G(d), |
1072 | FW_HDR_FW_VER_MICRO_GET(d), FW_HDR_FW_VER_BUILD_GET(d), | 1072 | FW_HDR_FW_VER_MICRO_G(d), FW_HDR_FW_VER_BUILD_G(d), |
1073 | FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c), | 1073 | FW_HDR_FW_VER_MAJOR_G(c), FW_HDR_FW_VER_MINOR_G(c), |
1074 | FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), | 1074 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), |
1075 | FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k), | 1075 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), |
1076 | FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k)); | 1076 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); |
1077 | ret = EINVAL; | 1077 | ret = EINVAL; |
1078 | goto bye; | 1078 | goto bye; |
1079 | } | 1079 | } |
@@ -1564,7 +1564,7 @@ static void cim_intr_handler(struct adapter *adapter) | |||
1564 | 1564 | ||
1565 | int fat; | 1565 | int fat; |
1566 | 1566 | ||
1567 | if (t4_read_reg(adapter, MA_PCIE_FW) & FW_PCIE_FW_ERR) | 1567 | if (t4_read_reg(adapter, MA_PCIE_FW) & PCIE_FW_ERR) |
1568 | t4_report_fw_error(adapter); | 1568 | t4_report_fw_error(adapter); |
1569 | 1569 | ||
1570 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, | 1570 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, |
@@ -2074,7 +2074,7 @@ int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, | |||
2074 | memset(&cmd, 0, sizeof(cmd)); | 2074 | memset(&cmd, 0, sizeof(cmd)); |
2075 | cmd.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | | 2075 | cmd.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
2076 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | | 2076 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
2077 | FW_RSS_IND_TBL_CMD_VIID(viid)); | 2077 | FW_RSS_IND_TBL_CMD_VIID_V(viid)); |
2078 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); | 2078 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); |
2079 | 2079 | ||
2080 | /* each fw_rss_ind_tbl_cmd takes up to 32 entries */ | 2080 | /* each fw_rss_ind_tbl_cmd takes up to 32 entries */ |
@@ -2091,13 +2091,13 @@ int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, | |||
2091 | while (nq > 0) { | 2091 | while (nq > 0) { |
2092 | unsigned int v; | 2092 | unsigned int v; |
2093 | 2093 | ||
2094 | v = FW_RSS_IND_TBL_CMD_IQ0(*rsp); | 2094 | v = FW_RSS_IND_TBL_CMD_IQ0_V(*rsp); |
2095 | if (++rsp >= rsp_end) | 2095 | if (++rsp >= rsp_end) |
2096 | rsp = rspq; | 2096 | rsp = rspq; |
2097 | v |= FW_RSS_IND_TBL_CMD_IQ1(*rsp); | 2097 | v |= FW_RSS_IND_TBL_CMD_IQ1_V(*rsp); |
2098 | if (++rsp >= rsp_end) | 2098 | if (++rsp >= rsp_end) |
2099 | rsp = rspq; | 2099 | rsp = rspq; |
2100 | v |= FW_RSS_IND_TBL_CMD_IQ2(*rsp); | 2100 | v |= FW_RSS_IND_TBL_CMD_IQ2_V(*rsp); |
2101 | if (++rsp >= rsp_end) | 2101 | if (++rsp >= rsp_end) |
2102 | rsp = rspq; | 2102 | rsp = rspq; |
2103 | 2103 | ||
@@ -2131,10 +2131,10 @@ int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, | |||
2131 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); | 2131 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
2132 | c.retval_len16 = htonl(FW_LEN16(c)); | 2132 | c.retval_len16 = htonl(FW_LEN16(c)); |
2133 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { | 2133 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { |
2134 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); | 2134 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE_V(mode)); |
2135 | } else if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) { | 2135 | } else if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) { |
2136 | c.u.basicvirtual.mode_pkd = | 2136 | c.u.basicvirtual.mode_pkd = |
2137 | htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); | 2137 | htonl(FW_RSS_GLB_CONFIG_CMD_MODE_V(mode)); |
2138 | c.u.basicvirtual.synmapen_to_hashtoeplitz = htonl(flags); | 2138 | c.u.basicvirtual.synmapen_to_hashtoeplitz = htonl(flags); |
2139 | } else | 2139 | } else |
2140 | return -EINVAL; | 2140 | return -EINVAL; |
@@ -2793,7 +2793,7 @@ retry: | |||
2793 | if (ret < 0) { | 2793 | if (ret < 0) { |
2794 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) | 2794 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) |
2795 | goto retry; | 2795 | goto retry; |
2796 | if (t4_read_reg(adap, MA_PCIE_FW) & FW_PCIE_FW_ERR) | 2796 | if (t4_read_reg(adap, MA_PCIE_FW) & PCIE_FW_ERR) |
2797 | t4_report_fw_error(adap); | 2797 | t4_report_fw_error(adap); |
2798 | return ret; | 2798 | return ret; |
2799 | } | 2799 | } |
@@ -2818,7 +2818,7 @@ retry: | |||
2818 | * and we wouldn't want to fail pointlessly. (This can happen when an | 2818 | * and we wouldn't want to fail pointlessly. (This can happen when an |
2819 | * OS loads lots of different drivers rapidly at the same time). In | 2819 | * OS loads lots of different drivers rapidly at the same time). In |
2820 | * this case, the Master PF returned by the firmware will be | 2820 | * this case, the Master PF returned by the firmware will be |
2821 | * FW_PCIE_FW_MASTER_MASK so the test below will work ... | 2821 | * PCIE_FW_MASTER_M so the test below will work ... |
2822 | */ | 2822 | */ |
2823 | if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 && | 2823 | if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 && |
2824 | master_mbox != mbox) { | 2824 | master_mbox != mbox) { |
@@ -2844,7 +2844,7 @@ retry: | |||
2844 | * our retries ... | 2844 | * our retries ... |
2845 | */ | 2845 | */ |
2846 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); | 2846 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); |
2847 | if (!(pcie_fw & (FW_PCIE_FW_ERR|FW_PCIE_FW_INIT))) { | 2847 | if (!(pcie_fw & (PCIE_FW_ERR|PCIE_FW_INIT))) { |
2848 | if (waiting <= 0) { | 2848 | if (waiting <= 0) { |
2849 | if (retries-- > 0) | 2849 | if (retries-- > 0) |
2850 | goto retry; | 2850 | goto retry; |
@@ -2859,9 +2859,9 @@ retry: | |||
2859 | * report errors preferentially. | 2859 | * report errors preferentially. |
2860 | */ | 2860 | */ |
2861 | if (state) { | 2861 | if (state) { |
2862 | if (pcie_fw & FW_PCIE_FW_ERR) | 2862 | if (pcie_fw & PCIE_FW_ERR) |
2863 | *state = DEV_STATE_ERR; | 2863 | *state = DEV_STATE_ERR; |
2864 | else if (pcie_fw & FW_PCIE_FW_INIT) | 2864 | else if (pcie_fw & PCIE_FW_INIT) |
2865 | *state = DEV_STATE_INIT; | 2865 | *state = DEV_STATE_INIT; |
2866 | } | 2866 | } |
2867 | 2867 | ||
@@ -2870,9 +2870,9 @@ retry: | |||
2870 | * there's not a valid Master PF, grab its identity | 2870 | * there's not a valid Master PF, grab its identity |
2871 | * for our caller. | 2871 | * for our caller. |
2872 | */ | 2872 | */ |
2873 | if (master_mbox == FW_PCIE_FW_MASTER_MASK && | 2873 | if (master_mbox == PCIE_FW_MASTER_M && |
2874 | (pcie_fw & FW_PCIE_FW_MASTER_VLD)) | 2874 | (pcie_fw & PCIE_FW_MASTER_VLD)) |
2875 | master_mbox = FW_PCIE_FW_MASTER_GET(pcie_fw); | 2875 | master_mbox = PCIE_FW_MASTER_G(pcie_fw); |
2876 | break; | 2876 | break; |
2877 | } | 2877 | } |
2878 | } | 2878 | } |
@@ -2940,7 +2940,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) | |||
2940 | * Issues a RESET command to firmware (if desired) with a HALT indication | 2940 | * Issues a RESET command to firmware (if desired) with a HALT indication |
2941 | * and then puts the microprocessor into RESET state. The RESET command | 2941 | * and then puts the microprocessor into RESET state. The RESET command |
2942 | * will only be issued if a legitimate mailbox is provided (mbox <= | 2942 | * will only be issued if a legitimate mailbox is provided (mbox <= |
2943 | * FW_PCIE_FW_MASTER_MASK). | 2943 | * PCIE_FW_MASTER_M). |
2944 | * | 2944 | * |
2945 | * This is generally used in order for the host to safely manipulate the | 2945 | * This is generally used in order for the host to safely manipulate the |
2946 | * adapter without fear of conflicting with whatever the firmware might | 2946 | * adapter without fear of conflicting with whatever the firmware might |
@@ -2955,7 +2955,7 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force) | |||
2955 | * If a legitimate mailbox is provided, issue a RESET command | 2955 | * If a legitimate mailbox is provided, issue a RESET command |
2956 | * with a HALT indication. | 2956 | * with a HALT indication. |
2957 | */ | 2957 | */ |
2958 | if (mbox <= FW_PCIE_FW_MASTER_MASK) { | 2958 | if (mbox <= PCIE_FW_MASTER_M) { |
2959 | struct fw_reset_cmd c; | 2959 | struct fw_reset_cmd c; |
2960 | 2960 | ||
2961 | memset(&c, 0, sizeof(c)); | 2961 | memset(&c, 0, sizeof(c)); |
@@ -2980,8 +2980,8 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force) | |||
2980 | */ | 2980 | */ |
2981 | if (ret == 0 || force) { | 2981 | if (ret == 0 || force) { |
2982 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, UPCRST); | 2982 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, UPCRST); |
2983 | t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT, | 2983 | t4_set_reg_field(adap, PCIE_FW, PCIE_FW_HALT_F, |
2984 | FW_PCIE_FW_HALT); | 2984 | PCIE_FW_HALT_F); |
2985 | } | 2985 | } |
2986 | 2986 | ||
2987 | /* | 2987 | /* |
@@ -3020,7 +3020,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3020 | * doing it automatically, we need to clear the PCIE_FW.HALT | 3020 | * doing it automatically, we need to clear the PCIE_FW.HALT |
3021 | * bit. | 3021 | * bit. |
3022 | */ | 3022 | */ |
3023 | t4_set_reg_field(adap, PCIE_FW, FW_PCIE_FW_HALT, 0); | 3023 | t4_set_reg_field(adap, PCIE_FW, PCIE_FW_HALT_F, 0); |
3024 | 3024 | ||
3025 | /* | 3025 | /* |
3026 | * If we've been given a valid mailbox, first try to get the | 3026 | * If we've been given a valid mailbox, first try to get the |
@@ -3029,7 +3029,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3029 | * valid mailbox or the RESET command failed, fall back to | 3029 | * valid mailbox or the RESET command failed, fall back to |
3030 | * hitting the chip with a hammer. | 3030 | * hitting the chip with a hammer. |
3031 | */ | 3031 | */ |
3032 | if (mbox <= FW_PCIE_FW_MASTER_MASK) { | 3032 | if (mbox <= PCIE_FW_MASTER_M) { |
3033 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); | 3033 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); |
3034 | msleep(100); | 3034 | msleep(100); |
3035 | if (t4_fw_reset(adap, mbox, | 3035 | if (t4_fw_reset(adap, mbox, |
@@ -3044,7 +3044,7 @@ static int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset) | |||
3044 | 3044 | ||
3045 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); | 3045 | t4_set_reg_field(adap, CIM_BOOT_CFG, UPCRST, 0); |
3046 | for (ms = 0; ms < FW_CMD_MAX_TIMEOUT; ) { | 3046 | for (ms = 0; ms < FW_CMD_MAX_TIMEOUT; ) { |
3047 | if (!(t4_read_reg(adap, PCIE_FW) & FW_PCIE_FW_HALT)) | 3047 | if (!(t4_read_reg(adap, PCIE_FW) & PCIE_FW_HALT_F)) |
3048 | return 0; | 3048 | return 0; |
3049 | msleep(100); | 3049 | msleep(100); |
3050 | ms += 100; | 3050 | ms += 100; |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index 4c8eb875fdea..beaf80a6214b 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |||
@@ -613,7 +613,6 @@ struct fw_ofld_tx_data_wr { | |||
613 | 613 | ||
614 | struct fw_cmd_wr { | 614 | struct fw_cmd_wr { |
615 | __be32 op_dma; | 615 | __be32 op_dma; |
616 | #define FW_CMD_WR_DMA (1U << 17) | ||
617 | __be32 len16_pkd; | 616 | __be32 len16_pkd; |
618 | __be64 cookie_daddr; | 617 | __be64 cookie_daddr; |
619 | }; | 618 | }; |
@@ -2644,11 +2643,6 @@ struct fw_port_stats_cmd { | |||
2644 | } u; | 2643 | } u; |
2645 | }; | 2644 | }; |
2646 | 2645 | ||
2647 | #define FW_PORT_STATS_CMD_NSTATS(x) ((x) << 4) | ||
2648 | #define FW_PORT_STATS_CMD_BG_BM(x) ((x) << 0) | ||
2649 | #define FW_PORT_STATS_CMD_TX(x) ((x) << 7) | ||
2650 | #define FW_PORT_STATS_CMD_IX(x) ((x) << 0) | ||
2651 | |||
2652 | /* port loopback stats */ | 2646 | /* port loopback stats */ |
2653 | #define FW_NUM_LB_STATS 16 | 2647 | #define FW_NUM_LB_STATS 16 |
2654 | enum fw_port_lb_stats_index { | 2648 | enum fw_port_lb_stats_index { |
@@ -2704,22 +2698,13 @@ struct fw_port_lb_stats_cmd { | |||
2704 | } u; | 2698 | } u; |
2705 | }; | 2699 | }; |
2706 | 2700 | ||
2707 | #define FW_PORT_LB_STATS_CMD_LBPORT(x) ((x) << 0) | ||
2708 | #define FW_PORT_LB_STATS_CMD_NSTATS(x) ((x) << 4) | ||
2709 | #define FW_PORT_LB_STATS_CMD_BG_BM(x) ((x) << 0) | ||
2710 | #define FW_PORT_LB_STATS_CMD_IX(x) ((x) << 0) | ||
2711 | |||
2712 | struct fw_rss_ind_tbl_cmd { | 2701 | struct fw_rss_ind_tbl_cmd { |
2713 | __be32 op_to_viid; | 2702 | __be32 op_to_viid; |
2714 | #define FW_RSS_IND_TBL_CMD_VIID(x) ((x) << 0) | ||
2715 | __be32 retval_len16; | 2703 | __be32 retval_len16; |
2716 | __be16 niqid; | 2704 | __be16 niqid; |
2717 | __be16 startidx; | 2705 | __be16 startidx; |
2718 | __be32 r3; | 2706 | __be32 r3; |
2719 | __be32 iq0_to_iq2; | 2707 | __be32 iq0_to_iq2; |
2720 | #define FW_RSS_IND_TBL_CMD_IQ0(x) ((x) << 20) | ||
2721 | #define FW_RSS_IND_TBL_CMD_IQ1(x) ((x) << 10) | ||
2722 | #define FW_RSS_IND_TBL_CMD_IQ2(x) ((x) << 0) | ||
2723 | __be32 iq3_to_iq5; | 2708 | __be32 iq3_to_iq5; |
2724 | __be32 iq6_to_iq8; | 2709 | __be32 iq6_to_iq8; |
2725 | __be32 iq9_to_iq11; | 2710 | __be32 iq9_to_iq11; |
@@ -2733,6 +2718,18 @@ struct fw_rss_ind_tbl_cmd { | |||
2733 | __be32 r15_lo; | 2718 | __be32 r15_lo; |
2734 | }; | 2719 | }; |
2735 | 2720 | ||
2721 | #define FW_RSS_IND_TBL_CMD_VIID_S 0 | ||
2722 | #define FW_RSS_IND_TBL_CMD_VIID_V(x) ((x) << FW_RSS_IND_TBL_CMD_VIID_S) | ||
2723 | |||
2724 | #define FW_RSS_IND_TBL_CMD_IQ0_S 20 | ||
2725 | #define FW_RSS_IND_TBL_CMD_IQ0_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ0_S) | ||
2726 | |||
2727 | #define FW_RSS_IND_TBL_CMD_IQ1_S 10 | ||
2728 | #define FW_RSS_IND_TBL_CMD_IQ1_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ1_S) | ||
2729 | |||
2730 | #define FW_RSS_IND_TBL_CMD_IQ2_S 0 | ||
2731 | #define FW_RSS_IND_TBL_CMD_IQ2_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ2_S) | ||
2732 | |||
2736 | struct fw_rss_glb_config_cmd { | 2733 | struct fw_rss_glb_config_cmd { |
2737 | __be32 op_to_write; | 2734 | __be32 op_to_write; |
2738 | __be32 retval_len16; | 2735 | __be32 retval_len16; |
@@ -2746,27 +2743,75 @@ struct fw_rss_glb_config_cmd { | |||
2746 | struct fw_rss_glb_config_basicvirtual { | 2743 | struct fw_rss_glb_config_basicvirtual { |
2747 | __be32 mode_pkd; | 2744 | __be32 mode_pkd; |
2748 | __be32 synmapen_to_hashtoeplitz; | 2745 | __be32 synmapen_to_hashtoeplitz; |
2749 | #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN (1U << 8) | ||
2750 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6 (1U << 7) | ||
2751 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6 (1U << 6) | ||
2752 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4 (1U << 5) | ||
2753 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4 (1U << 4) | ||
2754 | #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN (1U << 3) | ||
2755 | #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN (1U << 2) | ||
2756 | #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP (1U << 1) | ||
2757 | #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ (1U << 0) | ||
2758 | __be64 r8; | 2746 | __be64 r8; |
2759 | __be64 r9; | 2747 | __be64 r9; |
2760 | } basicvirtual; | 2748 | } basicvirtual; |
2761 | } u; | 2749 | } u; |
2762 | }; | 2750 | }; |
2763 | 2751 | ||
2764 | #define FW_RSS_GLB_CONFIG_CMD_MODE(x) ((x) << 28) | 2752 | #define FW_RSS_GLB_CONFIG_CMD_MODE_S 28 |
2765 | #define FW_RSS_GLB_CONFIG_CMD_MODE_GET(x) (((x) >> 28) & 0xf) | 2753 | #define FW_RSS_GLB_CONFIG_CMD_MODE_M 0xf |
2754 | #define FW_RSS_GLB_CONFIG_CMD_MODE_V(x) ((x) << FW_RSS_GLB_CONFIG_CMD_MODE_S) | ||
2755 | #define FW_RSS_GLB_CONFIG_CMD_MODE_G(x) \ | ||
2756 | (((x) >> FW_RSS_GLB_CONFIG_CMD_MODE_S) & FW_RSS_GLB_CONFIG_CMD_MODE_M) | ||
2766 | 2757 | ||
2767 | #define FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL 0 | 2758 | #define FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL 0 |
2768 | #define FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL 1 | 2759 | #define FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL 1 |
2769 | 2760 | ||
2761 | #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_S 8 | ||
2762 | #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_V(x) \ | ||
2763 | ((x) << FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_S) | ||
2764 | #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F \ | ||
2765 | FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_V(1U) | ||
2766 | |||
2767 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_S 7 | ||
2768 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_V(x) \ | ||
2769 | ((x) << FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_S) | ||
2770 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F \ | ||
2771 | FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_V(1U) | ||
2772 | |||
2773 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_S 6 | ||
2774 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_V(x) \ | ||
2775 | ((x) << FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_S) | ||
2776 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F \ | ||
2777 | FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_V(1U) | ||
2778 | |||
2779 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_S 5 | ||
2780 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_V(x) \ | ||
2781 | ((x) << FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_S) | ||
2782 | #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F \ | ||
2783 | FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_V(1U) | ||
2784 | |||
2785 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_S 4 | ||
2786 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_V(x) \ | ||
2787 | ((x) << FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_S) | ||
2788 | #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F \ | ||
2789 | FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_V(1U) | ||
2790 | |||
2791 | #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_S 3 | ||
2792 | #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_V(x) \ | ||
2793 | ((x) << FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_S) | ||
2794 | #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F \ | ||
2795 | FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_V(1U) | ||
2796 | |||
2797 | #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_S 2 | ||
2798 | #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_V(x) \ | ||
2799 | ((x) << FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_S) | ||
2800 | #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F \ | ||
2801 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_V(1U) | ||
2802 | |||
2803 | #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_S 1 | ||
2804 | #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_V(x) \ | ||
2805 | ((x) << FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_S) | ||
2806 | #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F \ | ||
2807 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_V(1U) | ||
2808 | |||
2809 | #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_S 0 | ||
2810 | #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_V(x) \ | ||
2811 | ((x) << FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_S) | ||
2812 | #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F \ | ||
2813 | FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_V(1U) | ||
2814 | |||
2770 | struct fw_rss_vi_config_cmd { | 2815 | struct fw_rss_vi_config_cmd { |
2771 | __be32 op_to_viid; | 2816 | __be32 op_to_viid; |
2772 | #define FW_RSS_VI_CONFIG_CMD_VIID(x) ((x) << 0) | 2817 | #define FW_RSS_VI_CONFIG_CMD_VIID(x) ((x) << 0) |
@@ -2780,19 +2825,51 @@ struct fw_rss_vi_config_cmd { | |||
2780 | struct fw_rss_vi_config_basicvirtual { | 2825 | struct fw_rss_vi_config_basicvirtual { |
2781 | __be32 r6; | 2826 | __be32 r6; |
2782 | __be32 defaultq_to_udpen; | 2827 | __be32 defaultq_to_udpen; |
2783 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ(x) ((x) << 16) | ||
2784 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_GET(x) (((x) >> 16) & 0x3ff) | ||
2785 | #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN (1U << 4) | ||
2786 | #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN (1U << 3) | ||
2787 | #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN (1U << 2) | ||
2788 | #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN (1U << 1) | ||
2789 | #define FW_RSS_VI_CONFIG_CMD_UDPEN (1U << 0) | ||
2790 | __be64 r9; | 2828 | __be64 r9; |
2791 | __be64 r10; | 2829 | __be64 r10; |
2792 | } basicvirtual; | 2830 | } basicvirtual; |
2793 | } u; | 2831 | } u; |
2794 | }; | 2832 | }; |
2795 | 2833 | ||
2834 | #define FW_RSS_VI_CONFIG_CMD_VIID_S 0 | ||
2835 | #define FW_RSS_VI_CONFIG_CMD_VIID_V(x) ((x) << FW_RSS_VI_CONFIG_CMD_VIID_S) | ||
2836 | |||
2837 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S 16 | ||
2838 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_M 0x3ff | ||
2839 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V(x) \ | ||
2840 | ((x) << FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S) | ||
2841 | #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(x) \ | ||
2842 | (((x) >> FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S) & \ | ||
2843 | FW_RSS_VI_CONFIG_CMD_DEFAULTQ_M) | ||
2844 | |||
2845 | #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_S 4 | ||
2846 | #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_V(x) \ | ||
2847 | ((x) << FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_S) | ||
2848 | #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F \ | ||
2849 | FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_V(1U) | ||
2850 | |||
2851 | #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_S 3 | ||
2852 | #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_V(x) \ | ||
2853 | ((x) << FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_S) | ||
2854 | #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F \ | ||
2855 | FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_V(1U) | ||
2856 | |||
2857 | #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_S 2 | ||
2858 | #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_V(x) \ | ||
2859 | ((x) << FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_S) | ||
2860 | #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F \ | ||
2861 | FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_V(1U) | ||
2862 | |||
2863 | #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_S 1 | ||
2864 | #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_V(x) \ | ||
2865 | ((x) << FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_S) | ||
2866 | #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F \ | ||
2867 | FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_V(1U) | ||
2868 | |||
2869 | #define FW_RSS_VI_CONFIG_CMD_UDPEN_S 0 | ||
2870 | #define FW_RSS_VI_CONFIG_CMD_UDPEN_V(x) ((x) << FW_RSS_VI_CONFIG_CMD_UDPEN_S) | ||
2871 | #define FW_RSS_VI_CONFIG_CMD_UDPEN_F FW_RSS_VI_CONFIG_CMD_UDPEN_V(1U) | ||
2872 | |||
2796 | struct fw_clip_cmd { | 2873 | struct fw_clip_cmd { |
2797 | __be32 op_to_write; | 2874 | __be32 op_to_write; |
2798 | __be32 alloc_to_len16; | 2875 | __be32 alloc_to_len16; |
@@ -2801,19 +2878,13 @@ struct fw_clip_cmd { | |||
2801 | __be32 r4[2]; | 2878 | __be32 r4[2]; |
2802 | }; | 2879 | }; |
2803 | 2880 | ||
2804 | #define S_FW_CLIP_CMD_ALLOC 31 | 2881 | #define FW_CLIP_CMD_ALLOC_S 31 |
2805 | #define M_FW_CLIP_CMD_ALLOC 0x1 | 2882 | #define FW_CLIP_CMD_ALLOC_V(x) ((x) << FW_CLIP_CMD_ALLOC_S) |
2806 | #define V_FW_CLIP_CMD_ALLOC(x) ((x) << S_FW_CLIP_CMD_ALLOC) | 2883 | #define FW_CLIP_CMD_ALLOC_F FW_CLIP_CMD_ALLOC_V(1U) |
2807 | #define G_FW_CLIP_CMD_ALLOC(x) \ | ||
2808 | (((x) >> S_FW_CLIP_CMD_ALLOC) & M_FW_CLIP_CMD_ALLOC) | ||
2809 | #define F_FW_CLIP_CMD_ALLOC V_FW_CLIP_CMD_ALLOC(1U) | ||
2810 | 2884 | ||
2811 | #define S_FW_CLIP_CMD_FREE 30 | 2885 | #define FW_CLIP_CMD_FREE_S 30 |
2812 | #define M_FW_CLIP_CMD_FREE 0x1 | 2886 | #define FW_CLIP_CMD_FREE_V(x) ((x) << FW_CLIP_CMD_FREE_S) |
2813 | #define V_FW_CLIP_CMD_FREE(x) ((x) << S_FW_CLIP_CMD_FREE) | 2887 | #define FW_CLIP_CMD_FREE_F FW_CLIP_CMD_FREE_V(1U) |
2814 | #define G_FW_CLIP_CMD_FREE(x) \ | ||
2815 | (((x) >> S_FW_CLIP_CMD_FREE) & M_FW_CLIP_CMD_FREE) | ||
2816 | #define F_FW_CLIP_CMD_FREE V_FW_CLIP_CMD_FREE(1U) | ||
2817 | 2888 | ||
2818 | enum fw_error_type { | 2889 | enum fw_error_type { |
2819 | FW_ERROR_TYPE_EXCEPTION = 0x0, | 2890 | FW_ERROR_TYPE_EXCEPTION = 0x0, |
@@ -2852,7 +2923,6 @@ struct fw_error_cmd { | |||
2852 | 2923 | ||
2853 | struct fw_debug_cmd { | 2924 | struct fw_debug_cmd { |
2854 | __be32 op_type; | 2925 | __be32 op_type; |
2855 | #define FW_DEBUG_CMD_TYPE_GET(x) ((x) & 0xff) | ||
2856 | __be32 len16_pkd; | 2926 | __be32 len16_pkd; |
2857 | union fw_debug { | 2927 | union fw_debug { |
2858 | struct fw_debug_assert { | 2928 | struct fw_debug_assert { |
@@ -2875,19 +2945,35 @@ struct fw_debug_cmd { | |||
2875 | } u; | 2945 | } u; |
2876 | }; | 2946 | }; |
2877 | 2947 | ||
2878 | #define FW_PCIE_FW_ERR (1U << 31) | 2948 | #define FW_DEBUG_CMD_TYPE_S 0 |
2879 | #define FW_PCIE_FW_INIT (1U << 30) | 2949 | #define FW_DEBUG_CMD_TYPE_M 0xff |
2880 | #define FW_PCIE_FW_HALT (1U << 29) | 2950 | #define FW_DEBUG_CMD_TYPE_G(x) \ |
2881 | #define FW_PCIE_FW_MASTER_VLD (1U << 15) | 2951 | (((x) >> FW_DEBUG_CMD_TYPE_S) & FW_DEBUG_CMD_TYPE_M) |
2882 | #define FW_PCIE_FW_MASTER_MASK 0x7 | 2952 | |
2883 | #define FW_PCIE_FW_MASTER_SHIFT 12 | 2953 | #define PCIE_FW_ERR_S 31 |
2884 | #define FW_PCIE_FW_MASTER(x) ((x) << FW_PCIE_FW_MASTER_SHIFT) | 2954 | #define PCIE_FW_ERR_V(x) ((x) << PCIE_FW_ERR_S) |
2885 | #define FW_PCIE_FW_MASTER_GET(x) (((x) >> FW_PCIE_FW_MASTER_SHIFT) & \ | 2955 | #define PCIE_FW_ERR_F PCIE_FW_ERR_V(1U) |
2886 | FW_PCIE_FW_MASTER_MASK) | 2956 | |
2887 | #define FW_PCIE_FW_EVAL_MASK 0x7 | 2957 | #define PCIE_FW_INIT_S 30 |
2888 | #define FW_PCIE_FW_EVAL_SHIFT 24 | 2958 | #define PCIE_FW_INIT_V(x) ((x) << PCIE_FW_INIT_S) |
2889 | #define FW_PCIE_FW_EVAL_GET(x) (((x) >> FW_PCIE_FW_EVAL_SHIFT) & \ | 2959 | #define PCIE_FW_INIT_F PCIE_FW_INIT_V(1U) |
2890 | FW_PCIE_FW_EVAL_MASK) | 2960 | |
2961 | #define PCIE_FW_HALT_S 29 | ||
2962 | #define PCIE_FW_HALT_V(x) ((x) << PCIE_FW_HALT_S) | ||
2963 | #define PCIE_FW_HALT_F PCIE_FW_HALT_V(1U) | ||
2964 | |||
2965 | #define PCIE_FW_EVAL_S 24 | ||
2966 | #define PCIE_FW_EVAL_M 0x7 | ||
2967 | #define PCIE_FW_EVAL_G(x) (((x) >> PCIE_FW_EVAL_S) & PCIE_FW_EVAL_M) | ||
2968 | |||
2969 | #define PCIE_FW_MASTER_VLD_S 15 | ||
2970 | #define PCIE_FW_MASTER_VLD_V(x) ((x) << PCIE_FW_MASTER_VLD_S) | ||
2971 | #define PCIE_FW_MASTER_VLD_F PCIE_FW_MASTER_VLD_V(1U) | ||
2972 | |||
2973 | #define PCIE_FW_MASTER_S 12 | ||
2974 | #define PCIE_FW_MASTER_M 0x7 | ||
2975 | #define PCIE_FW_MASTER_V(x) ((x) << PCIE_FW_MASTER_S) | ||
2976 | #define PCIE_FW_MASTER_G(x) (((x) >> PCIE_FW_MASTER_S) & PCIE_FW_MASTER_M) | ||
2891 | 2977 | ||
2892 | struct fw_hdr { | 2978 | struct fw_hdr { |
2893 | u8 ver; | 2979 | u8 ver; |
@@ -2915,10 +3001,25 @@ enum fw_hdr_chip { | |||
2915 | FW_HDR_CHIP_T5 | 3001 | FW_HDR_CHIP_T5 |
2916 | }; | 3002 | }; |
2917 | 3003 | ||
2918 | #define FW_HDR_FW_VER_MAJOR_GET(x) (((x) >> 24) & 0xff) | 3004 | #define FW_HDR_FW_VER_MAJOR_S 24 |
2919 | #define FW_HDR_FW_VER_MINOR_GET(x) (((x) >> 16) & 0xff) | 3005 | #define FW_HDR_FW_VER_MAJOR_M 0xff |
2920 | #define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff) | 3006 | #define FW_HDR_FW_VER_MAJOR_G(x) \ |
2921 | #define FW_HDR_FW_VER_BUILD_GET(x) (((x) >> 0) & 0xff) | 3007 | (((x) >> FW_HDR_FW_VER_MAJOR_S) & FW_HDR_FW_VER_MAJOR_M) |
3008 | |||
3009 | #define FW_HDR_FW_VER_MINOR_S 16 | ||
3010 | #define FW_HDR_FW_VER_MINOR_M 0xff | ||
3011 | #define FW_HDR_FW_VER_MINOR_G(x) \ | ||
3012 | (((x) >> FW_HDR_FW_VER_MINOR_S) & FW_HDR_FW_VER_MINOR_M) | ||
3013 | |||
3014 | #define FW_HDR_FW_VER_MICRO_S 8 | ||
3015 | #define FW_HDR_FW_VER_MICRO_M 0xff | ||
3016 | #define FW_HDR_FW_VER_MICRO_G(x) \ | ||
3017 | (((x) >> FW_HDR_FW_VER_MICRO_S) & FW_HDR_FW_VER_MICRO_M) | ||
3018 | |||
3019 | #define FW_HDR_FW_VER_BUILD_S 0 | ||
3020 | #define FW_HDR_FW_VER_BUILD_M 0xff | ||
3021 | #define FW_HDR_FW_VER_BUILD_G(x) \ | ||
3022 | (((x) >> FW_HDR_FW_VER_BUILD_S) & FW_HDR_FW_VER_BUILD_M) | ||
2922 | 3023 | ||
2923 | enum fw_hdr_intfver { | 3024 | enum fw_hdr_intfver { |
2924 | FW_HDR_INTFVER_NIC = 0x00, | 3025 | FW_HDR_INTFVER_NIC = 0x00, |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c index 7c24b50c7d0b..099f7ce056f2 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | |||
@@ -1230,14 +1230,14 @@ static void cxgb4vf_get_drvinfo(struct net_device *dev, | |||
1230 | sizeof(drvinfo->bus_info)); | 1230 | sizeof(drvinfo->bus_info)); |
1231 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), | 1231 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), |
1232 | "%u.%u.%u.%u, TP %u.%u.%u.%u", | 1232 | "%u.%u.%u.%u, TP %u.%u.%u.%u", |
1233 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.fwrev), | 1233 | FW_HDR_FW_VER_MAJOR_G(adapter->params.dev.fwrev), |
1234 | FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.fwrev), | 1234 | FW_HDR_FW_VER_MINOR_G(adapter->params.dev.fwrev), |
1235 | FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.fwrev), | 1235 | FW_HDR_FW_VER_MICRO_G(adapter->params.dev.fwrev), |
1236 | FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.fwrev), | 1236 | FW_HDR_FW_VER_BUILD_G(adapter->params.dev.fwrev), |
1237 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.tprev), | 1237 | FW_HDR_FW_VER_MAJOR_G(adapter->params.dev.tprev), |
1238 | FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.tprev), | 1238 | FW_HDR_FW_VER_MINOR_G(adapter->params.dev.tprev), |
1239 | FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.tprev), | 1239 | FW_HDR_FW_VER_MICRO_G(adapter->params.dev.tprev), |
1240 | FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.tprev)); | 1240 | FW_HDR_FW_VER_BUILD_G(adapter->params.dev.tprev)); |
1241 | } | 1241 | } |
1242 | 1242 | ||
1243 | /* | 1243 | /* |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c index 960d35c6c370..624a213dea87 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | |||
@@ -585,7 +585,7 @@ int t4vf_get_rss_glb_config(struct adapter *adapter) | |||
585 | * filtering at this point to weed out modes which don't support | 585 | * filtering at this point to weed out modes which don't support |
586 | * VF Drivers ... | 586 | * VF Drivers ... |
587 | */ | 587 | */ |
588 | rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_GET( | 588 | rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( |
589 | be32_to_cpu(rpl.u.manual.mode_pkd)); | 589 | be32_to_cpu(rpl.u.manual.mode_pkd)); |
590 | switch (rss->mode) { | 590 | switch (rss->mode) { |
591 | case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { | 591 | case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { |
@@ -593,26 +593,26 @@ int t4vf_get_rss_glb_config(struct adapter *adapter) | |||
593 | rpl.u.basicvirtual.synmapen_to_hashtoeplitz); | 593 | rpl.u.basicvirtual.synmapen_to_hashtoeplitz); |
594 | 594 | ||
595 | rss->u.basicvirtual.synmapen = | 595 | rss->u.basicvirtual.synmapen = |
596 | ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN) != 0); | 596 | ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); |
597 | rss->u.basicvirtual.syn4tupenipv6 = | 597 | rss->u.basicvirtual.syn4tupenipv6 = |
598 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6) != 0); | 598 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); |
599 | rss->u.basicvirtual.syn2tupenipv6 = | 599 | rss->u.basicvirtual.syn2tupenipv6 = |
600 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6) != 0); | 600 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); |
601 | rss->u.basicvirtual.syn4tupenipv4 = | 601 | rss->u.basicvirtual.syn4tupenipv4 = |
602 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4) != 0); | 602 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); |
603 | rss->u.basicvirtual.syn2tupenipv4 = | 603 | rss->u.basicvirtual.syn2tupenipv4 = |
604 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4) != 0); | 604 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); |
605 | 605 | ||
606 | rss->u.basicvirtual.ofdmapen = | 606 | rss->u.basicvirtual.ofdmapen = |
607 | ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN) != 0); | 607 | ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); |
608 | 608 | ||
609 | rss->u.basicvirtual.tnlmapen = | 609 | rss->u.basicvirtual.tnlmapen = |
610 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN) != 0); | 610 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); |
611 | rss->u.basicvirtual.tnlalllookup = | 611 | rss->u.basicvirtual.tnlalllookup = |
612 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP) != 0); | 612 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); |
613 | 613 | ||
614 | rss->u.basicvirtual.hashtoeplitz = | 614 | rss->u.basicvirtual.hashtoeplitz = |
615 | ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ) != 0); | 615 | ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); |
616 | 616 | ||
617 | /* we need at least Tunnel Map Enable to be set */ | 617 | /* we need at least Tunnel Map Enable to be set */ |
618 | if (!rss->u.basicvirtual.tnlmapen) | 618 | if (!rss->u.basicvirtual.tnlmapen) |
@@ -709,17 +709,17 @@ int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, | |||
709 | u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); | 709 | u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); |
710 | 710 | ||
711 | config->basicvirtual.ip6fourtupen = | 711 | config->basicvirtual.ip6fourtupen = |
712 | ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) != 0); | 712 | ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); |
713 | config->basicvirtual.ip6twotupen = | 713 | config->basicvirtual.ip6twotupen = |
714 | ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) != 0); | 714 | ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); |
715 | config->basicvirtual.ip4fourtupen = | 715 | config->basicvirtual.ip4fourtupen = |
716 | ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) != 0); | 716 | ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); |
717 | config->basicvirtual.ip4twotupen = | 717 | config->basicvirtual.ip4twotupen = |
718 | ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) != 0); | 718 | ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); |
719 | config->basicvirtual.udpen = | 719 | config->basicvirtual.udpen = |
720 | ((word & FW_RSS_VI_CONFIG_CMD_UDPEN) != 0); | 720 | ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); |
721 | config->basicvirtual.defaultq = | 721 | config->basicvirtual.defaultq = |
722 | FW_RSS_VI_CONFIG_CMD_DEFAULTQ_GET(word); | 722 | FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); |
723 | break; | 723 | break; |
724 | } | 724 | } |
725 | 725 | ||
@@ -755,16 +755,16 @@ int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, | |||
755 | u32 word = 0; | 755 | u32 word = 0; |
756 | 756 | ||
757 | if (config->basicvirtual.ip6fourtupen) | 757 | if (config->basicvirtual.ip6fourtupen) |
758 | word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN; | 758 | word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; |
759 | if (config->basicvirtual.ip6twotupen) | 759 | if (config->basicvirtual.ip6twotupen) |
760 | word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN; | 760 | word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; |
761 | if (config->basicvirtual.ip4fourtupen) | 761 | if (config->basicvirtual.ip4fourtupen) |
762 | word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN; | 762 | word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; |
763 | if (config->basicvirtual.ip4twotupen) | 763 | if (config->basicvirtual.ip4twotupen) |
764 | word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN; | 764 | word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; |
765 | if (config->basicvirtual.udpen) | 765 | if (config->basicvirtual.udpen) |
766 | word |= FW_RSS_VI_CONFIG_CMD_UDPEN; | 766 | word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; |
767 | word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ( | 767 | word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( |
768 | config->basicvirtual.defaultq); | 768 | config->basicvirtual.defaultq); |
769 | cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); | 769 | cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); |
770 | break; | 770 | break; |
@@ -806,7 +806,7 @@ int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, | |||
806 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | | 806 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
807 | FW_CMD_REQUEST_F | | 807 | FW_CMD_REQUEST_F | |
808 | FW_CMD_WRITE_F | | 808 | FW_CMD_WRITE_F | |
809 | FW_RSS_IND_TBL_CMD_VIID(viid)); | 809 | FW_RSS_IND_TBL_CMD_VIID_V(viid)); |
810 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 810 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
811 | 811 | ||
812 | /* | 812 | /* |
@@ -857,9 +857,9 @@ int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, | |||
857 | if (rsp >= rsp_end) | 857 | if (rsp >= rsp_end) |
858 | rsp = rspq; | 858 | rsp = rspq; |
859 | } | 859 | } |
860 | *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0(qbuf[0]) | | 860 | *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | |
861 | FW_RSS_IND_TBL_CMD_IQ1(qbuf[1]) | | 861 | FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | |
862 | FW_RSS_IND_TBL_CMD_IQ2(qbuf[2])); | 862 | FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); |
863 | } | 863 | } |
864 | 864 | ||
865 | /* | 865 | /* |
diff --git a/drivers/scsi/csiostor/csio_hw.c b/drivers/scsi/csiostor/csio_hw.c index 80ad9c52eebd..1e4c4ee9e11e 100644 --- a/drivers/scsi/csiostor/csio_hw.c +++ b/drivers/scsi/csiostor/csio_hw.c | |||
@@ -650,10 +650,10 @@ static void | |||
650 | csio_hw_print_fw_version(struct csio_hw *hw, char *str) | 650 | csio_hw_print_fw_version(struct csio_hw *hw, char *str) |
651 | { | 651 | { |
652 | csio_info(hw, "%s: %u.%u.%u.%u\n", str, | 652 | csio_info(hw, "%s: %u.%u.%u.%u\n", str, |
653 | FW_HDR_FW_VER_MAJOR_GET(hw->fwrev), | 653 | FW_HDR_FW_VER_MAJOR_G(hw->fwrev), |
654 | FW_HDR_FW_VER_MINOR_GET(hw->fwrev), | 654 | FW_HDR_FW_VER_MINOR_G(hw->fwrev), |
655 | FW_HDR_FW_VER_MICRO_GET(hw->fwrev), | 655 | FW_HDR_FW_VER_MICRO_G(hw->fwrev), |
656 | FW_HDR_FW_VER_BUILD_GET(hw->fwrev)); | 656 | FW_HDR_FW_VER_BUILD_G(hw->fwrev)); |
657 | } | 657 | } |
658 | 658 | ||
659 | /* | 659 | /* |
@@ -706,9 +706,9 @@ csio_hw_check_fw_version(struct csio_hw *hw) | |||
706 | if (ret) | 706 | if (ret) |
707 | return ret; | 707 | return ret; |
708 | 708 | ||
709 | major = FW_HDR_FW_VER_MAJOR_GET(hw->fwrev); | 709 | major = FW_HDR_FW_VER_MAJOR_G(hw->fwrev); |
710 | minor = FW_HDR_FW_VER_MINOR_GET(hw->fwrev); | 710 | minor = FW_HDR_FW_VER_MINOR_G(hw->fwrev); |
711 | micro = FW_HDR_FW_VER_MICRO_GET(hw->fwrev); | 711 | micro = FW_HDR_FW_VER_MICRO_G(hw->fwrev); |
712 | 712 | ||
713 | if (major != FW_VERSION_MAJOR(hw)) { /* major mismatch - fail */ | 713 | if (major != FW_VERSION_MAJOR(hw)) { /* major mismatch - fail */ |
714 | csio_err(hw, "card FW has major version %u, driver wants %u\n", | 714 | csio_err(hw, "card FW has major version %u, driver wants %u\n", |
@@ -1998,13 +1998,13 @@ csio_hw_flash_fw(struct csio_hw *hw) | |||
1998 | 1998 | ||
1999 | hdr = (const struct fw_hdr *)fw->data; | 1999 | hdr = (const struct fw_hdr *)fw->data; |
2000 | fw_ver = ntohl(hdr->fw_ver); | 2000 | fw_ver = ntohl(hdr->fw_ver); |
2001 | if (FW_HDR_FW_VER_MAJOR_GET(fw_ver) != FW_VERSION_MAJOR(hw)) | 2001 | if (FW_HDR_FW_VER_MAJOR_G(fw_ver) != FW_VERSION_MAJOR(hw)) |
2002 | return -EINVAL; /* wrong major version, won't do */ | 2002 | return -EINVAL; /* wrong major version, won't do */ |
2003 | 2003 | ||
2004 | /* | 2004 | /* |
2005 | * If the flash FW is unusable or we found something newer, load it. | 2005 | * If the flash FW is unusable or we found something newer, load it. |
2006 | */ | 2006 | */ |
2007 | if (FW_HDR_FW_VER_MAJOR_GET(hw->fwrev) != FW_VERSION_MAJOR(hw) || | 2007 | if (FW_HDR_FW_VER_MAJOR_G(hw->fwrev) != FW_VERSION_MAJOR(hw) || |
2008 | fw_ver > hw->fwrev) { | 2008 | fw_ver > hw->fwrev) { |
2009 | ret = csio_hw_fw_upgrade(hw, hw->pfn, fw->data, fw->size, | 2009 | ret = csio_hw_fw_upgrade(hw, hw->pfn, fw->data, fw->size, |
2010 | /*force=*/false); | 2010 | /*force=*/false); |
diff --git a/drivers/scsi/csiostor/csio_init.c b/drivers/scsi/csiostor/csio_init.c index 70e1eb6d9640..1ed5b21c0dd8 100644 --- a/drivers/scsi/csiostor/csio_init.c +++ b/drivers/scsi/csiostor/csio_init.c | |||
@@ -974,10 +974,10 @@ static int csio_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
974 | } | 974 | } |
975 | 975 | ||
976 | sprintf(hw->fwrev_str, "%u.%u.%u.%u\n", | 976 | sprintf(hw->fwrev_str, "%u.%u.%u.%u\n", |
977 | FW_HDR_FW_VER_MAJOR_GET(hw->fwrev), | 977 | FW_HDR_FW_VER_MAJOR_G(hw->fwrev), |
978 | FW_HDR_FW_VER_MINOR_GET(hw->fwrev), | 978 | FW_HDR_FW_VER_MINOR_G(hw->fwrev), |
979 | FW_HDR_FW_VER_MICRO_GET(hw->fwrev), | 979 | FW_HDR_FW_VER_MICRO_G(hw->fwrev), |
980 | FW_HDR_FW_VER_BUILD_GET(hw->fwrev)); | 980 | FW_HDR_FW_VER_BUILD_G(hw->fwrev)); |
981 | 981 | ||
982 | for (i = 0; i < hw->num_pports; i++) { | 982 | for (i = 0; i < hw->num_pports; i++) { |
983 | ln = csio_shost_init(hw, &pdev->dev, true, NULL); | 983 | ln = csio_shost_init(hw, &pdev->dev, true, NULL); |
diff --git a/drivers/scsi/csiostor/csio_mb.c b/drivers/scsi/csiostor/csio_mb.c index 829887886898..08c265c0f353 100644 --- a/drivers/scsi/csiostor/csio_mb.c +++ b/drivers/scsi/csiostor/csio_mb.c | |||
@@ -1126,7 +1126,7 @@ csio_mb_dump_fw_dbg(struct csio_hw *hw, __be64 *cmd) | |||
1126 | { | 1126 | { |
1127 | struct fw_debug_cmd *dbg = (struct fw_debug_cmd *)cmd; | 1127 | struct fw_debug_cmd *dbg = (struct fw_debug_cmd *)cmd; |
1128 | 1128 | ||
1129 | if ((FW_DEBUG_CMD_TYPE_GET(ntohl(dbg->op_type))) == 1) { | 1129 | if ((FW_DEBUG_CMD_TYPE_G(ntohl(dbg->op_type))) == 1) { |
1130 | csio_info(hw, "FW print message:\n"); | 1130 | csio_info(hw, "FW print message:\n"); |
1131 | csio_info(hw, "\tdebug->dprtstridx = %d\n", | 1131 | csio_info(hw, "\tdebug->dprtstridx = %d\n", |
1132 | ntohs(dbg->u.prt.dprtstridx)); | 1132 | ntohs(dbg->u.prt.dprtstridx)); |