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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-13 22:53:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-13 22:53:26 -0400
commitb16528466786a540cb00148acb124e0149d62710 (patch)
treed7d988a424f4c97b27a19aae4154063969b751c3
parente5a32b5b21a18d24e9d735891550c194b4c60bd2 (diff)
parent4afec79f652b11189c07ce49498c4477adda887c (diff)
Merge tag 'hwmon-for-linus-v4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck: - new driver for NPCM7xx PWM and Fan controller - new driver for Mellanox FAN controller - add support for MAX34451 to max34440 driver - add support for new Threadripper variants to k10temp driver - add error handling to adt7475 driver - cleanup nct6775 and nct7904 drivers - document sensor enable ABI attributes * tag 'hwmon-for-linus-v4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (adt7475) Change show functions to return error data correctly hwmon: (adt7475) Change update functions to add error handling hwmon: (adt7475) Change valid parameter to bool type hwmon: (adt7475) Split device update function to measure and limits hwmon: k10temp: Support Threadripper 2920X, 2970WX; simplify offset table hwmon: (k10temp) 27C Offset needed for Threadripper2 hwmon: (iio_hwmon) Use devm functions hwmon: Add NPCM7xx PWM and Fan driver dt-binding: hwmon: Add NPCM7xx PWM and Fan controller documentation hwmon: (pmbus/max34440) Add support for MAX34451. hwmon: Document the sensor enable attribute hwmon: (mlxreg-fan) Add support for Mellanox FAN driver hwmon: Mark expected switch fall-throughs hwmon: (nct6775) Fix comment in the description of pwm_mode hwmon: (nct7904) Fix UNSPECIFIED_INT warning hwmon: (nct7904) Fix CODE_INDENT error hwmon: (nct7904) Fix SPACING errors
-rw-r--r--Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt84
-rw-r--r--Documentation/hwmon/max3444016
-rw-r--r--Documentation/hwmon/mlxreg-fan60
-rw-r--r--Documentation/hwmon/npcm750-pwm-fan22
-rw-r--r--Documentation/hwmon/sysfs-interface48
-rw-r--r--drivers/hwmon/Kconfig22
-rw-r--r--drivers/hwmon/Makefile2
-rw-r--r--drivers/hwmon/adt7475.c340
-rw-r--r--drivers/hwmon/emc1403.c2
-rw-r--r--drivers/hwmon/iio_hwmon.c67
-rw-r--r--drivers/hwmon/k10temp.c8
-rw-r--r--drivers/hwmon/mlxreg-fan.c489
-rw-r--r--drivers/hwmon/nct6775.c6
-rw-r--r--drivers/hwmon/nct7904.c68
-rw-r--r--drivers/hwmon/npcm750-pwm-fan.c1057
-rw-r--r--drivers/hwmon/pmbus/Kconfig2
-rw-r--r--drivers/hwmon/pmbus/max34440.c93
17 files changed, 2190 insertions, 196 deletions
diff --git a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
new file mode 100644
index 000000000000..28f43e929f6d
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
@@ -0,0 +1,84 @@
1Nuvoton NPCM7xx PWM and Fan Tacho controller device
2
3The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
4controller outputs and 16 Fan tachometer controller inputs.
5
6Required properties for pwm-fan node
7- #address-cells : should be 1.
8- #size-cells : should be 0.
9- compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
10- reg : specifies physical base address and size of the registers.
11- reg-names : must contain:
12 * "pwm" for the PWM registers.
13 * "fan" for the Fan registers.
14- clocks : phandle of reference clocks.
15- clock-names : must contain
16 * "pwm" for PWM controller operating clock.
17 * "fan" for Fan controller operating clock.
18- interrupts : contain the Fan interrupts with flags for falling edge.
19- pinctrl-names : a pinctrl state named "default" must be defined.
20- pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
21 controller ports.
22
23fan subnode format:
24===================
25Under fan subnode can be upto 8 child nodes, each child node representing a fan.
26Each fan subnode must have one PWM channel and atleast one Fan tach channel.
27
28For PWM channel can be configured cooling-levels to create cooling device.
29Cooling device could be bound to a thermal zone for the thermal control.
30
31Required properties for each child node:
32- reg : specify the PWM output channel.
33 integer value in the range 0 through 7, that represent
34 the PWM channel number that used.
35
36- fan-tach-ch : specify the Fan tach input channel.
37 integer value in the range 0 through 15, that represent
38 the fan tach channel number that used.
39
40 At least one Fan tach input channel is required
41
42Optional property for each child node:
43- cooling-levels: PWM duty cycle values in a range from 0 to 255
44 which correspond to thermal cooling states.
45
46Examples:
47
48pwm_fan:pwm-fan-controller@103000 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 compatible = "nuvoton,npcm750-pwm-fan";
52 reg = <0x103000 0x2000>,
53 <0x180000 0x8000>;
54 reg-names = "pwm", "fan";
55 clocks = <&clk NPCM7XX_CLK_APB3>,
56 <&clk NPCM7XX_CLK_APB4>;
57 clock-names = "pwm","fan";
58 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
64 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
65 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
68 &fanin0_pins &fanin1_pins &fanin2_pins
69 &fanin3_pins &fanin4_pins>;
70 fan@0 {
71 reg = <0x00>;
72 fan-tach-ch = /bits/ 8 <0x00 0x01>;
73 cooling-levels = <127 255>;
74 };
75 fan@1 {
76 reg = <0x01>;
77 fan-tach-ch = /bits/ 8 <0x02 0x03>;
78 };
79 fan@2 {
80 reg = <0x02>;
81 fan-tach-ch = /bits/ 8 <0x04>;
82 };
83
84};
diff --git a/Documentation/hwmon/max34440 b/Documentation/hwmon/max34440
index 9ba6587b7657..b2de8fa49273 100644
--- a/Documentation/hwmon/max34440
+++ b/Documentation/hwmon/max34440
@@ -16,6 +16,11 @@ Supported chips:
16 Prefixes: 'max34446' 16 Prefixes: 'max34446'
17 Addresses scanned: - 17 Addresses scanned: -
18 Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34446.pdf 18 Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34446.pdf
19 * Maxim MAX34451
20 PMBus 16-Channel V/I Monitor and 12-Channel Sequencer/Marginer
21 Prefixes: 'max34451'
22 Addresses scanned: -
23 Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34451.pdf
19 * Maxim MAX34460 24 * Maxim MAX34460
20 PMBus 12-Channel Voltage Monitor & Sequencer 25 PMBus 12-Channel Voltage Monitor & Sequencer
21 Prefix: 'max34460' 26 Prefix: 'max34460'
@@ -36,9 +41,10 @@ Description
36This driver supports hardware monitoring for Maxim MAX34440 PMBus 6-Channel 41This driver supports hardware monitoring for Maxim MAX34440 PMBus 6-Channel
37Power-Supply Manager, MAX34441 PMBus 5-Channel Power-Supply Manager 42Power-Supply Manager, MAX34441 PMBus 5-Channel Power-Supply Manager
38and Intelligent Fan Controller, and MAX34446 PMBus Power-Supply Data Logger. 43and Intelligent Fan Controller, and MAX34446 PMBus Power-Supply Data Logger.
39It also supports the MAX34460 and MAX34461 PMBus Voltage Monitor & Sequencers. 44It also supports the MAX34451, MAX34460, and MAX34461 PMBus Voltage Monitor &
40The MAX34460 supports 12 voltage channels, and the MAX34461 supports 16 voltage 45Sequencers. The MAX34451 supports monitoring voltage or current of 12 channels
41channels. 46based on GIN pins. The MAX34460 supports 12 voltage channels, and the MAX34461
47supports 16 voltage channels.
42 48
43The driver is a client driver to the core PMBus driver. Please see 49The driver is a client driver to the core PMBus driver. Please see
44Documentation/hwmon/pmbus for details on PMBus client drivers. 50Documentation/hwmon/pmbus for details on PMBus client drivers.
@@ -93,7 +99,7 @@ curr[1-6]_max Maximum current. From IOUT_OC_WARN_LIMIT register.
93curr[1-6]_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT register. 99curr[1-6]_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
94curr[1-6]_max_alarm Current high alarm. From IOUT_OC_WARNING status. 100curr[1-6]_max_alarm Current high alarm. From IOUT_OC_WARNING status.
95curr[1-6]_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status. 101curr[1-6]_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status.
96curr[1-4]_average Historical average current (MAX34446 only). 102curr[1-4]_average Historical average current (MAX34446/34451 only).
97curr[1-6]_highest Historical maximum current. 103curr[1-6]_highest Historical maximum current.
98curr[1-6]_reset_history Write any value to reset history. 104curr[1-6]_reset_history Write any value to reset history.
99 105
@@ -123,5 +129,7 @@ temp[1-8]_reset_history Write any value to reset history.
123 temp7 and temp8 attributes only exist for MAX34440. 129 temp7 and temp8 attributes only exist for MAX34440.
124 MAX34446 only supports temp[1-3]. 130 MAX34446 only supports temp[1-3].
125 131
132MAX34451 supports attribute groups in[1-16] (or curr[1-16] based on input pins)
133and temp[1-5].
126MAX34460 supports attribute groups in[1-12] and temp[1-5]. 134MAX34460 supports attribute groups in[1-12] and temp[1-5].
127MAX34461 supports attribute groups in[1-16] and temp[1-5]. 135MAX34461 supports attribute groups in[1-16] and temp[1-5].
diff --git a/Documentation/hwmon/mlxreg-fan b/Documentation/hwmon/mlxreg-fan
new file mode 100644
index 000000000000..fc531c6978d4
--- /dev/null
+++ b/Documentation/hwmon/mlxreg-fan
@@ -0,0 +1,60 @@
1Kernel driver mlxreg-fan
2========================
3
4Provides FAN control for the next Mellanox systems:
5QMB700, equipped with 40x200GbE InfiniBand ports;
6MSN3700, equipped with 32x200GbE or 16x400GbE Ethernet ports;
7MSN3410, equipped with 6x400GbE plus 48x50GbE Ethernet ports;
8MSN3800, equipped with 64x1000GbE Ethernet ports;
9These are the Top of the Rack systems, equipped with Mellanox switch
10board with Mellanox Quantum or Spectrume-2 devices.
11FAN controller is implemented by the programmable device logic.
12
13The default registers offsets set within the programmable device is as
14following:
15- pwm1 0xe3
16- fan1 (tacho1) 0xe4
17- fan2 (tacho2) 0xe5
18- fan3 (tacho3) 0xe6
19- fan4 (tacho4) 0xe7
20- fan5 (tacho5) 0xe8
21- fan6 (tacho6) 0xe9
22- fan7 (tacho7) 0xea
23- fan8 (tacho8) 0xeb
24- fan9 (tacho9) 0xec
25- fan10 (tacho10) 0xed
26- fan11 (tacho11) 0xee
27- fan12 (tacho12) 0xef
28This setup can be re-programmed with other registers.
29
30Author: Vadim Pasternak <vadimp@mellanox.com>
31
32Description
33-----------
34
35The driver implements a simple interface for driving a fan connected to
36a PWM output and tachometer inputs.
37This driver obtains PWM and tachometers registers location according to
38the system configuration and creates FAN/PWM hwmon objects and a cooling
39device. PWM and tachometers are sensed through the on-board programmable
40device, which exports its register map. This device could be attached to
41any bus type, for which register mapping is supported.
42Single instance is created with one PWM control, up to 12 tachometers and
43one cooling device. It could be as many instances as programmable device
44supports.
45The driver exposes the fan to the user space through the hwmon's and
46thermal's sysfs interfaces.
47
48/sys files in hwmon subsystem
49-----------------------------
50
51fan[1-12]_fault - RO files for tachometers TACH1-TACH12 fault indication
52fan[1-12]_input - RO files for tachometers TACH1-TACH12 input (in RPM)
53pwm1 - RW file for fan[1-12] target duty cycle (0..255)
54
55/sys files in thermal subsystem
56-------------------------------
57
58cur_state - RW file for current cooling state of the cooling device
59 (0..max_state)
60max_state - RO file for maximum cooling state of the cooling device
diff --git a/Documentation/hwmon/npcm750-pwm-fan b/Documentation/hwmon/npcm750-pwm-fan
new file mode 100644
index 000000000000..6156ef7398e6
--- /dev/null
+++ b/Documentation/hwmon/npcm750-pwm-fan
@@ -0,0 +1,22 @@
1Kernel driver npcm750-pwm-fan
2=============================
3
4Supported chips:
5 NUVOTON NPCM750/730/715/705
6
7Authors:
8 <tomer.maimon@nuvoton.com>
9
10Description:
11------------
12This driver implements support for NUVOTON NPCM7XX PWM and Fan Tacho
13controller. The PWM controller supports up to 8 PWM outputs. The Fan tacho
14controller supports up to 16 tachometer inputs.
15
16The driver provides the following sensor accesses in sysfs:
17
18fanX_input ro provide current fan rotation value in RPM as reported
19 by the fan to the device.
20
21pwmX rw get or set PWM fan control value. This is an integer
22 value between 0(off) and 255(full speed).
diff --git a/Documentation/hwmon/sysfs-interface b/Documentation/hwmon/sysfs-interface
index fc337c317c67..2b9e1005d88b 100644
--- a/Documentation/hwmon/sysfs-interface
+++ b/Documentation/hwmon/sysfs-interface
@@ -171,6 +171,13 @@ in[0-*]_label Suggested voltage channel label.
171 user-space. 171 user-space.
172 RO 172 RO
173 173
174in[0-*]_enable
175 Enable or disable the sensors.
176 When disabled the sensor read will return -ENODATA.
177 1: Enable
178 0: Disable
179 RW
180
174cpu[0-*]_vid CPU core reference voltage. 181cpu[0-*]_vid CPU core reference voltage.
175 Unit: millivolt 182 Unit: millivolt
176 RO 183 RO
@@ -236,6 +243,13 @@ fan[1-*]_label Suggested fan channel label.
236 In all other cases, the label is provided by user-space. 243 In all other cases, the label is provided by user-space.
237 RO 244 RO
238 245
246fan[1-*]_enable
247 Enable or disable the sensors.
248 When disabled the sensor read will return -ENODATA.
249 1: Enable
250 0: Disable
251 RW
252
239Also see the Alarms section for status flags associated with fans. 253Also see the Alarms section for status flags associated with fans.
240 254
241 255
@@ -409,6 +423,13 @@ temp_reset_history
409 Reset temp_lowest and temp_highest for all sensors 423 Reset temp_lowest and temp_highest for all sensors
410 WO 424 WO
411 425
426temp[1-*]_enable
427 Enable or disable the sensors.
428 When disabled the sensor read will return -ENODATA.
429 1: Enable
430 0: Disable
431 RW
432
412Some chips measure temperature using external thermistors and an ADC, and 433Some chips measure temperature using external thermistors and an ADC, and
413report the temperature measurement as a voltage. Converting this voltage 434report the temperature measurement as a voltage. Converting this voltage
414back to a temperature (or the other way around for limits) requires 435back to a temperature (or the other way around for limits) requires
@@ -468,6 +489,13 @@ curr_reset_history
468 Reset currX_lowest and currX_highest for all sensors 489 Reset currX_lowest and currX_highest for all sensors
469 WO 490 WO
470 491
492curr[1-*]_enable
493 Enable or disable the sensors.
494 When disabled the sensor read will return -ENODATA.
495 1: Enable
496 0: Disable
497 RW
498
471Also see the Alarms section for status flags associated with currents. 499Also see the Alarms section for status flags associated with currents.
472 500
473********* 501*********
@@ -566,6 +594,13 @@ power[1-*]_crit Critical maximum power.
566 Unit: microWatt 594 Unit: microWatt
567 RW 595 RW
568 596
597power[1-*]_enable Enable or disable the sensors.
598 When disabled the sensor read will return
599 -ENODATA.
600 1: Enable
601 0: Disable
602 RW
603
569Also see the Alarms section for status flags associated with power readings. 604Also see the Alarms section for status flags associated with power readings.
570 605
571********** 606**********
@@ -576,6 +611,12 @@ energy[1-*]_input Cumulative energy use
576 Unit: microJoule 611 Unit: microJoule
577 RO 612 RO
578 613
614energy[1-*]_enable Enable or disable the sensors.
615 When disabled the sensor read will return
616 -ENODATA.
617 1: Enable
618 0: Disable
619 RW
579 620
580************ 621************
581* Humidity * 622* Humidity *
@@ -586,6 +627,13 @@ humidity[1-*]_input Humidity
586 RO 627 RO
587 628
588 629
630humidity[1-*]_enable Enable or disable the sensors
631 When disabled the sensor read will return
632 -ENODATA.
633 1: Enable
634 0: Disable
635 RW
636
589********** 637**********
590* Alarms * 638* Alarms *
591********** 639**********
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f10840ad465c..ccf42663a908 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -937,6 +937,18 @@ config SENSORS_MCP3021
937 This driver can also be built as a module. If so, the module 937 This driver can also be built as a module. If so, the module
938 will be called mcp3021. 938 will be called mcp3021.
939 939
940config SENSORS_MLXREG_FAN
941 tristate "Mellanox Mellanox FAN driver"
942 depends on MELLANOX_PLATFORM
943 imply THERMAL
944 select REGMAP
945 help
946 This option enables support for the FAN control on the Mellanox
947 Ethernet and InfiniBand switches. The driver can be activated by the
948 platform device add call. Say Y to enable these. To compile this
949 driver as a module, choose 'M' here: the module will be called
950 mlxreg-fan.
951
940config SENSORS_TC654 952config SENSORS_TC654
941 tristate "Microchip TC654/TC655 and compatibles" 953 tristate "Microchip TC654/TC655 and compatibles"
942 depends on I2C 954 depends on I2C
@@ -1256,6 +1268,16 @@ config SENSORS_NCT7904
1256 This driver can also be built as a module. If so, the module 1268 This driver can also be built as a module. If so, the module
1257 will be called nct7904. 1269 will be called nct7904.
1258 1270
1271config SENSORS_NPCM7XX
1272 tristate "Nuvoton NPCM750 and compatible PWM and Fan controllers"
1273 imply THERMAL
1274 help
1275 This driver provides support for Nuvoton NPCM750/730/715/705 PWM
1276 and Fan controllers.
1277
1278 This driver can also be built as a module. If so, the module
1279 will be called npcm750-pwm-fan.
1280
1259config SENSORS_NSA320 1281config SENSORS_NSA320
1260 tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors" 1282 tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors"
1261 depends on GPIOLIB && OF 1283 depends on GPIOLIB && OF
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index e7d52a36e6c4..842c92f83ce6 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -129,11 +129,13 @@ obj-$(CONFIG_SENSORS_MAX31790) += max31790.o
129obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o 129obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o
130obj-$(CONFIG_SENSORS_MCP3021) += mcp3021.o 130obj-$(CONFIG_SENSORS_MCP3021) += mcp3021.o
131obj-$(CONFIG_SENSORS_TC654) += tc654.o 131obj-$(CONFIG_SENSORS_TC654) += tc654.o
132obj-$(CONFIG_SENSORS_MLXREG_FAN) += mlxreg-fan.o
132obj-$(CONFIG_SENSORS_MENF21BMC_HWMON) += menf21bmc_hwmon.o 133obj-$(CONFIG_SENSORS_MENF21BMC_HWMON) += menf21bmc_hwmon.o
133obj-$(CONFIG_SENSORS_NCT6683) += nct6683.o 134obj-$(CONFIG_SENSORS_NCT6683) += nct6683.o
134obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o 135obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o
135obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o 136obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
136obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o 137obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
138obj-$(CONFIG_SENSORS_NPCM7XX) += npcm750-pwm-fan.o
137obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o 139obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o
138obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o 140obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
139obj-$(CONFIG_SENSORS_PC87360) += pc87360.o 141obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
index 9ef84998c7f3..90837f7c7d0f 100644
--- a/drivers/hwmon/adt7475.c
+++ b/drivers/hwmon/adt7475.c
@@ -194,8 +194,7 @@ struct adt7475_data {
194 struct mutex lock; 194 struct mutex lock;
195 195
196 unsigned long measure_updated; 196 unsigned long measure_updated;
197 unsigned long limits_updated; 197 bool valid;
198 char valid;
199 198
200 u8 config4; 199 u8 config4;
201 u8 config5; 200 u8 config5;
@@ -326,6 +325,9 @@ static ssize_t show_voltage(struct device *dev, struct device_attribute *attr,
326 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 325 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
327 unsigned short val; 326 unsigned short val;
328 327
328 if (IS_ERR(data))
329 return PTR_ERR(data);
330
329 switch (sattr->nr) { 331 switch (sattr->nr) {
330 case ALARM: 332 case ALARM:
331 return sprintf(buf, "%d\n", 333 return sprintf(buf, "%d\n",
@@ -381,6 +383,9 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
381 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 383 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
382 int out; 384 int out;
383 385
386 if (IS_ERR(data))
387 return PTR_ERR(data);
388
384 switch (sattr->nr) { 389 switch (sattr->nr) {
385 case HYSTERSIS: 390 case HYSTERSIS:
386 mutex_lock(&data->lock); 391 mutex_lock(&data->lock);
@@ -625,6 +630,9 @@ static ssize_t show_point2(struct device *dev, struct device_attribute *attr,
625 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 630 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
626 int out, val; 631 int out, val;
627 632
633 if (IS_ERR(data))
634 return PTR_ERR(data);
635
628 mutex_lock(&data->lock); 636 mutex_lock(&data->lock);
629 out = (data->range[sattr->index] >> 4) & 0x0F; 637 out = (data->range[sattr->index] >> 4) & 0x0F;
630 val = reg2temp(data, data->temp[AUTOMIN][sattr->index]); 638 val = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
@@ -683,6 +691,9 @@ static ssize_t show_tach(struct device *dev, struct device_attribute *attr,
683 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 691 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
684 int out; 692 int out;
685 693
694 if (IS_ERR(data))
695 return PTR_ERR(data);
696
686 if (sattr->nr == ALARM) 697 if (sattr->nr == ALARM)
687 out = (data->alarms >> (sattr->index + 10)) & 1; 698 out = (data->alarms >> (sattr->index + 10)) & 1;
688 else 699 else
@@ -720,6 +731,9 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
720 struct adt7475_data *data = adt7475_update_device(dev); 731 struct adt7475_data *data = adt7475_update_device(dev);
721 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 732 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
722 733
734 if (IS_ERR(data))
735 return PTR_ERR(data);
736
723 return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]); 737 return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]);
724} 738}
725 739
@@ -729,6 +743,9 @@ static ssize_t show_pwmchan(struct device *dev, struct device_attribute *attr,
729 struct adt7475_data *data = adt7475_update_device(dev); 743 struct adt7475_data *data = adt7475_update_device(dev);
730 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 744 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
731 745
746 if (IS_ERR(data))
747 return PTR_ERR(data);
748
732 return sprintf(buf, "%d\n", data->pwmchan[sattr->index]); 749 return sprintf(buf, "%d\n", data->pwmchan[sattr->index]);
733} 750}
734 751
@@ -738,6 +755,9 @@ static ssize_t show_pwmctrl(struct device *dev, struct device_attribute *attr,
738 struct adt7475_data *data = adt7475_update_device(dev); 755 struct adt7475_data *data = adt7475_update_device(dev);
739 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 756 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
740 757
758 if (IS_ERR(data))
759 return PTR_ERR(data);
760
741 return sprintf(buf, "%d\n", data->pwmctl[sattr->index]); 761 return sprintf(buf, "%d\n", data->pwmctl[sattr->index]);
742} 762}
743 763
@@ -945,6 +965,9 @@ static ssize_t show_pwmfreq(struct device *dev, struct device_attribute *attr,
945 int i = clamp_val(data->range[sattr->index] & 0xf, 0, 965 int i = clamp_val(data->range[sattr->index] & 0xf, 0,
946 ARRAY_SIZE(pwmfreq_table) - 1); 966 ARRAY_SIZE(pwmfreq_table) - 1);
947 967
968 if (IS_ERR(data))
969 return PTR_ERR(data);
970
948 return sprintf(buf, "%d\n", pwmfreq_table[i]); 971 return sprintf(buf, "%d\n", pwmfreq_table[i]);
949} 972}
950 973
@@ -1035,6 +1058,10 @@ static ssize_t cpu0_vid_show(struct device *dev,
1035 struct device_attribute *devattr, char *buf) 1058 struct device_attribute *devattr, char *buf)
1036{ 1059{
1037 struct adt7475_data *data = adt7475_update_device(dev); 1060 struct adt7475_data *data = adt7475_update_device(dev);
1061
1062 if (IS_ERR(data))
1063 return PTR_ERR(data);
1064
1038 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); 1065 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1039} 1066}
1040 1067
@@ -1385,6 +1412,121 @@ static void adt7475_remove_files(struct i2c_client *client,
1385 sysfs_remove_group(&client->dev.kobj, &vid_attr_group); 1412 sysfs_remove_group(&client->dev.kobj, &vid_attr_group);
1386} 1413}
1387 1414
1415static int adt7475_update_limits(struct i2c_client *client)
1416{
1417 struct adt7475_data *data = i2c_get_clientdata(client);
1418 int i;
1419 int ret;
1420
1421 ret = adt7475_read(REG_CONFIG4);
1422 if (ret < 0)
1423 return ret;
1424 data->config4 = ret;
1425
1426 ret = adt7475_read(REG_CONFIG5);
1427 if (ret < 0)
1428 return ret;
1429 data->config5 = ret;
1430
1431 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1432 if (!(data->has_voltage & (1 << i)))
1433 continue;
1434 /* Adjust values so they match the input precision */
1435 ret = adt7475_read(VOLTAGE_MIN_REG(i));
1436 if (ret < 0)
1437 return ret;
1438 data->voltage[MIN][i] = ret << 2;
1439
1440 ret = adt7475_read(VOLTAGE_MAX_REG(i));
1441 if (ret < 0)
1442 return ret;
1443 data->voltage[MAX][i] = ret << 2;
1444 }
1445
1446 if (data->has_voltage & (1 << 5)) {
1447 ret = adt7475_read(REG_VTT_MIN);
1448 if (ret < 0)
1449 return ret;
1450 data->voltage[MIN][5] = ret << 2;
1451
1452 ret = adt7475_read(REG_VTT_MAX);
1453 if (ret < 0)
1454 return ret;
1455 data->voltage[MAX][5] = ret << 2;
1456 }
1457
1458 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1459 /* Adjust values so they match the input precision */
1460 ret = adt7475_read(TEMP_MIN_REG(i));
1461 if (ret < 0)
1462 return ret;
1463 data->temp[MIN][i] = ret << 2;
1464
1465 ret = adt7475_read(TEMP_MAX_REG(i));
1466 if (ret < 0)
1467 return ret;
1468 data->temp[MAX][i] = ret << 2;
1469
1470 ret = adt7475_read(TEMP_TMIN_REG(i));
1471 if (ret < 0)
1472 return ret;
1473 data->temp[AUTOMIN][i] = ret << 2;
1474
1475 ret = adt7475_read(TEMP_THERM_REG(i));
1476 if (ret < 0)
1477 return ret;
1478 data->temp[THERM][i] = ret << 2;
1479
1480 ret = adt7475_read(TEMP_OFFSET_REG(i));
1481 if (ret < 0)
1482 return ret;
1483 data->temp[OFFSET][i] = ret;
1484 }
1485 adt7475_read_hystersis(client);
1486
1487 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1488 if (i == 3 && !data->has_fan4)
1489 continue;
1490 ret = adt7475_read_word(client, TACH_MIN_REG(i));
1491 if (ret < 0)
1492 return ret;
1493 data->tach[MIN][i] = ret;
1494 }
1495
1496 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1497 if (i == 1 && !data->has_pwm2)
1498 continue;
1499 ret = adt7475_read(PWM_MAX_REG(i));
1500 if (ret < 0)
1501 return ret;
1502 data->pwm[MAX][i] = ret;
1503
1504 ret = adt7475_read(PWM_MIN_REG(i));
1505 if (ret < 0)
1506 return ret;
1507 data->pwm[MIN][i] = ret;
1508 /* Set the channel and control information */
1509 adt7475_read_pwm(client, i);
1510 }
1511
1512 ret = adt7475_read(TEMP_TRANGE_REG(0));
1513 if (ret < 0)
1514 return ret;
1515 data->range[0] = ret;
1516
1517 ret = adt7475_read(TEMP_TRANGE_REG(1));
1518 if (ret < 0)
1519 return ret;
1520 data->range[1] = ret;
1521
1522 ret = adt7475_read(TEMP_TRANGE_REG(2));
1523 if (ret < 0)
1524 return ret;
1525 data->range[2] = ret;
1526
1527 return 0;
1528}
1529
1388static int adt7475_probe(struct i2c_client *client, 1530static int adt7475_probe(struct i2c_client *client,
1389 const struct i2c_device_id *id) 1531 const struct i2c_device_id *id)
1390{ 1532{
@@ -1562,6 +1704,11 @@ static int adt7475_probe(struct i2c_client *client,
1562 (data->bypass_attn & (1 << 3)) ? " in3" : "", 1704 (data->bypass_attn & (1 << 3)) ? " in3" : "",
1563 (data->bypass_attn & (1 << 4)) ? " in4" : ""); 1705 (data->bypass_attn & (1 << 4)) ? " in4" : "");
1564 1706
1707 /* Limits and settings, should never change update more than once */
1708 ret = adt7475_update_limits(client);
1709 if (ret)
1710 goto eremove;
1711
1565 return 0; 1712 return 0;
1566 1713
1567eremove: 1714eremove:
@@ -1658,121 +1805,122 @@ static void adt7475_read_pwm(struct i2c_client *client, int index)
1658 } 1805 }
1659} 1806}
1660 1807
1661static struct adt7475_data *adt7475_update_device(struct device *dev) 1808static int adt7475_update_measure(struct device *dev)
1662{ 1809{
1663 struct i2c_client *client = to_i2c_client(dev); 1810 struct i2c_client *client = to_i2c_client(dev);
1664 struct adt7475_data *data = i2c_get_clientdata(client); 1811 struct adt7475_data *data = i2c_get_clientdata(client);
1665 u16 ext; 1812 u16 ext;
1666 int i; 1813 int i;
1814 int ret;
1667 1815
1668 mutex_lock(&data->lock); 1816 ret = adt7475_read(REG_STATUS2);
1817 if (ret < 0)
1818 return ret;
1819 data->alarms = ret << 8;
1669 1820
1670 /* Measurement values update every 2 seconds */ 1821 ret = adt7475_read(REG_STATUS1);
1671 if (time_after(jiffies, data->measure_updated + HZ * 2) || 1822 if (ret < 0)
1672 !data->valid) { 1823 return ret;
1673 data->alarms = adt7475_read(REG_STATUS2) << 8; 1824 data->alarms |= ret;
1674 data->alarms |= adt7475_read(REG_STATUS1);
1675
1676 ext = (adt7475_read(REG_EXTEND2) << 8) |
1677 adt7475_read(REG_EXTEND1);
1678 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1679 if (!(data->has_voltage & (1 << i)))
1680 continue;
1681 data->voltage[INPUT][i] =
1682 (adt7475_read(VOLTAGE_REG(i)) << 2) |
1683 ((ext >> (i * 2)) & 3);
1684 }
1685 1825
1686 for (i = 0; i < ADT7475_TEMP_COUNT; i++) 1826 ret = adt7475_read(REG_EXTEND2);
1687 data->temp[INPUT][i] = 1827 if (ret < 0)
1688 (adt7475_read(TEMP_REG(i)) << 2) | 1828 return ret;
1689 ((ext >> ((i + 5) * 2)) & 3);
1690 1829
1691 if (data->has_voltage & (1 << 5)) { 1830 ext = (ret << 8);
1692 data->alarms |= adt7475_read(REG_STATUS4) << 24;
1693 ext = adt7475_read(REG_EXTEND3);
1694 data->voltage[INPUT][5] = adt7475_read(REG_VTT) << 2 |
1695 ((ext >> 4) & 3);
1696 }
1697 1831
1698 for (i = 0; i < ADT7475_TACH_COUNT; i++) { 1832 ret = adt7475_read(REG_EXTEND1);
1699 if (i == 3 && !data->has_fan4) 1833 if (ret < 0)
1700 continue; 1834 return ret;
1701 data->tach[INPUT][i] =
1702 adt7475_read_word(client, TACH_REG(i));
1703 }
1704 1835
1705 /* Updated by hw when in auto mode */ 1836 ext |= ret;
1706 for (i = 0; i < ADT7475_PWM_COUNT; i++) { 1837
1707 if (i == 1 && !data->has_pwm2) 1838 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1708 continue; 1839 if (!(data->has_voltage & (1 << i)))
1709 data->pwm[INPUT][i] = adt7475_read(PWM_REG(i)); 1840 continue;
1710 } 1841 ret = adt7475_read(VOLTAGE_REG(i));
1842 if (ret < 0)
1843 return ret;
1844 data->voltage[INPUT][i] =
1845 (ret << 2) |
1846 ((ext >> (i * 2)) & 3);
1847 }
1711 1848
1712 if (data->has_vid) 1849 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1713 data->vid = adt7475_read(REG_VID) & 0x3f; 1850 ret = adt7475_read(TEMP_REG(i));
1851 if (ret < 0)
1852 return ret;
1853 data->temp[INPUT][i] =
1854 (ret << 2) |
1855 ((ext >> ((i + 5) * 2)) & 3);
1856 }
1714 1857
1715 data->measure_updated = jiffies; 1858 if (data->has_voltage & (1 << 5)) {
1859 ret = adt7475_read(REG_STATUS4);
1860 if (ret < 0)
1861 return ret;
1862 data->alarms |= ret << 24;
1863
1864 ret = adt7475_read(REG_EXTEND3);
1865 if (ret < 0)
1866 return ret;
1867 ext = ret;
1868
1869 ret = adt7475_read(REG_VTT);
1870 if (ret < 0)
1871 return ret;
1872 data->voltage[INPUT][5] = ret << 2 |
1873 ((ext >> 4) & 3);
1716 } 1874 }
1717 1875
1718 /* Limits and settings, should never change update every 60 seconds */ 1876 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1719 if (time_after(jiffies, data->limits_updated + HZ * 60) || 1877 if (i == 3 && !data->has_fan4)
1720 !data->valid) { 1878 continue;
1721 data->config4 = adt7475_read(REG_CONFIG4); 1879 ret = adt7475_read_word(client, TACH_REG(i));
1722 data->config5 = adt7475_read(REG_CONFIG5); 1880 if (ret < 0)
1723 1881 return ret;
1724 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { 1882 data->tach[INPUT][i] = ret;
1725 if (!(data->has_voltage & (1 << i))) 1883 }
1726 continue;
1727 /* Adjust values so they match the input precision */
1728 data->voltage[MIN][i] =
1729 adt7475_read(VOLTAGE_MIN_REG(i)) << 2;
1730 data->voltage[MAX][i] =
1731 adt7475_read(VOLTAGE_MAX_REG(i)) << 2;
1732 }
1733 1884
1734 if (data->has_voltage & (1 << 5)) { 1885 /* Updated by hw when in auto mode */
1735 data->voltage[MIN][5] = adt7475_read(REG_VTT_MIN) << 2; 1886 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1736 data->voltage[MAX][5] = adt7475_read(REG_VTT_MAX) << 2; 1887 if (i == 1 && !data->has_pwm2)
1737 } 1888 continue;
1889 ret = adt7475_read(PWM_REG(i));
1890 if (ret < 0)
1891 return ret;
1892 data->pwm[INPUT][i] = ret;
1893 }
1738 1894
1739 for (i = 0; i < ADT7475_TEMP_COUNT; i++) { 1895 if (data->has_vid) {
1740 /* Adjust values so they match the input precision */ 1896 ret = adt7475_read(REG_VID);
1741 data->temp[MIN][i] = 1897 if (ret < 0)
1742 adt7475_read(TEMP_MIN_REG(i)) << 2; 1898 return ret;
1743 data->temp[MAX][i] = 1899 data->vid = ret & 0x3f;
1744 adt7475_read(TEMP_MAX_REG(i)) << 2; 1900 }
1745 data->temp[AUTOMIN][i] =
1746 adt7475_read(TEMP_TMIN_REG(i)) << 2;
1747 data->temp[THERM][i] =
1748 adt7475_read(TEMP_THERM_REG(i)) << 2;
1749 data->temp[OFFSET][i] =
1750 adt7475_read(TEMP_OFFSET_REG(i));
1751 }
1752 adt7475_read_hystersis(client);
1753 1901
1754 for (i = 0; i < ADT7475_TACH_COUNT; i++) { 1902 return 0;
1755 if (i == 3 && !data->has_fan4) 1903}
1756 continue;
1757 data->tach[MIN][i] =
1758 adt7475_read_word(client, TACH_MIN_REG(i));
1759 }
1760 1904
1761 for (i = 0; i < ADT7475_PWM_COUNT; i++) { 1905static struct adt7475_data *adt7475_update_device(struct device *dev)
1762 if (i == 1 && !data->has_pwm2) 1906{
1763 continue; 1907 struct i2c_client *client = to_i2c_client(dev);
1764 data->pwm[MAX][i] = adt7475_read(PWM_MAX_REG(i)); 1908 struct adt7475_data *data = i2c_get_clientdata(client);
1765 data->pwm[MIN][i] = adt7475_read(PWM_MIN_REG(i)); 1909 int ret;
1766 /* Set the channel and control information */
1767 adt7475_read_pwm(client, i);
1768 }
1769 1910
1770 data->range[0] = adt7475_read(TEMP_TRANGE_REG(0)); 1911 mutex_lock(&data->lock);
1771 data->range[1] = adt7475_read(TEMP_TRANGE_REG(1));
1772 data->range[2] = adt7475_read(TEMP_TRANGE_REG(2));
1773 1912
1774 data->limits_updated = jiffies; 1913 /* Measurement values update every 2 seconds */
1775 data->valid = 1; 1914 if (time_after(jiffies, data->measure_updated + HZ * 2) ||
1915 !data->valid) {
1916 ret = adt7475_update_measure(dev);
1917 if (ret) {
1918 data->valid = false;
1919 mutex_unlock(&data->lock);
1920 return ERR_PTR(ret);
1921 }
1922 data->measure_updated = jiffies;
1923 data->valid = true;
1776 } 1924 }
1777 1925
1778 mutex_unlock(&data->lock); 1926 mutex_unlock(&data->lock);
diff --git a/drivers/hwmon/emc1403.c b/drivers/hwmon/emc1403.c
index 1ea7ca510f84..aaebeb726d6a 100644
--- a/drivers/hwmon/emc1403.c
+++ b/drivers/hwmon/emc1403.c
@@ -443,8 +443,10 @@ static int emc1403_probe(struct i2c_client *client,
443 switch (id->driver_data) { 443 switch (id->driver_data) {
444 case emc1404: 444 case emc1404:
445 data->groups[2] = &emc1404_group; 445 data->groups[2] = &emc1404_group;
446 /* fall through */
446 case emc1403: 447 case emc1403:
447 data->groups[1] = &emc1403_group; 448 data->groups[1] = &emc1403_group;
449 /* fall through */
448 case emc1402: 450 case emc1402:
449 data->groups[0] = &emc1402_group; 451 data->groups[0] = &emc1402_group;
450 } 452 }
diff --git a/drivers/hwmon/iio_hwmon.c b/drivers/hwmon/iio_hwmon.c
index 69031a0f7ed2..2f3f875c06ac 100644
--- a/drivers/hwmon/iio_hwmon.c
+++ b/drivers/hwmon/iio_hwmon.c
@@ -22,7 +22,6 @@
22 * struct iio_hwmon_state - device instance state 22 * struct iio_hwmon_state - device instance state
23 * @channels: filled with array of channels from iio 23 * @channels: filled with array of channels from iio
24 * @num_channels: number of channels in channels (saves counting twice) 24 * @num_channels: number of channels in channels (saves counting twice)
25 * @hwmon_dev: associated hwmon device
26 * @attr_group: the group of attributes 25 * @attr_group: the group of attributes
27 * @groups: null terminated array of attribute groups 26 * @groups: null terminated array of attribute groups
28 * @attrs: null terminated array of attribute pointers. 27 * @attrs: null terminated array of attribute pointers.
@@ -30,7 +29,6 @@
30struct iio_hwmon_state { 29struct iio_hwmon_state {
31 struct iio_channel *channels; 30 struct iio_channel *channels;
32 int num_channels; 31 int num_channels;
33 struct device *hwmon_dev;
34 struct attribute_group attr_group; 32 struct attribute_group attr_group;
35 const struct attribute_group *groups[2]; 33 const struct attribute_group *groups[2];
36 struct attribute **attrs; 34 struct attribute **attrs;
@@ -68,12 +66,13 @@ static int iio_hwmon_probe(struct platform_device *pdev)
68 enum iio_chan_type type; 66 enum iio_chan_type type;
69 struct iio_channel *channels; 67 struct iio_channel *channels;
70 const char *name = "iio_hwmon"; 68 const char *name = "iio_hwmon";
69 struct device *hwmon_dev;
71 char *sname; 70 char *sname;
72 71
73 if (dev->of_node && dev->of_node->name) 72 if (dev->of_node && dev->of_node->name)
74 name = dev->of_node->name; 73 name = dev->of_node->name;
75 74
76 channels = iio_channel_get_all(dev); 75 channels = devm_iio_channel_get_all(dev);
77 if (IS_ERR(channels)) { 76 if (IS_ERR(channels)) {
78 if (PTR_ERR(channels) == -ENODEV) 77 if (PTR_ERR(channels) == -ENODEV)
79 return -EPROBE_DEFER; 78 return -EPROBE_DEFER;
@@ -81,10 +80,8 @@ static int iio_hwmon_probe(struct platform_device *pdev)
81 } 80 }
82 81
83 st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL); 82 st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
84 if (st == NULL) { 83 if (st == NULL)
85 ret = -ENOMEM; 84 return -ENOMEM;
86 goto error_release_channels;
87 }
88 85
89 st->channels = channels; 86 st->channels = channels;
90 87
@@ -95,22 +92,18 @@ static int iio_hwmon_probe(struct platform_device *pdev)
95 st->attrs = devm_kcalloc(dev, 92 st->attrs = devm_kcalloc(dev,
96 st->num_channels + 1, sizeof(*st->attrs), 93 st->num_channels + 1, sizeof(*st->attrs),
97 GFP_KERNEL); 94 GFP_KERNEL);
98 if (st->attrs == NULL) { 95 if (st->attrs == NULL)
99 ret = -ENOMEM; 96 return -ENOMEM;
100 goto error_release_channels;
101 }
102 97
103 for (i = 0; i < st->num_channels; i++) { 98 for (i = 0; i < st->num_channels; i++) {
104 a = devm_kzalloc(dev, sizeof(*a), GFP_KERNEL); 99 a = devm_kzalloc(dev, sizeof(*a), GFP_KERNEL);
105 if (a == NULL) { 100 if (a == NULL)
106 ret = -ENOMEM; 101 return -ENOMEM;
107 goto error_release_channels;
108 }
109 102
110 sysfs_attr_init(&a->dev_attr.attr); 103 sysfs_attr_init(&a->dev_attr.attr);
111 ret = iio_get_channel_type(&st->channels[i], &type); 104 ret = iio_get_channel_type(&st->channels[i], &type);
112 if (ret < 0) 105 if (ret < 0)
113 goto error_release_channels; 106 return ret;
114 107
115 switch (type) { 108 switch (type) {
116 case IIO_VOLTAGE: 109 case IIO_VOLTAGE:
@@ -134,13 +127,11 @@ static int iio_hwmon_probe(struct platform_device *pdev)
134 humidity_i++); 127 humidity_i++);
135 break; 128 break;
136 default: 129 default:
137 ret = -EINVAL; 130 return -EINVAL;
138 goto error_release_channels;
139 }
140 if (a->dev_attr.attr.name == NULL) {
141 ret = -ENOMEM;
142 goto error_release_channels;
143 } 131 }
132 if (a->dev_attr.attr.name == NULL)
133 return -ENOMEM;
134
144 a->dev_attr.show = iio_hwmon_read_val; 135 a->dev_attr.show = iio_hwmon_read_val;
145 a->dev_attr.attr.mode = S_IRUGO; 136 a->dev_attr.attr.mode = S_IRUGO;
146 a->index = i; 137 a->index = i;
@@ -151,34 +142,13 @@ static int iio_hwmon_probe(struct platform_device *pdev)
151 st->groups[0] = &st->attr_group; 142 st->groups[0] = &st->attr_group;
152 143
153 sname = devm_kstrdup(dev, name, GFP_KERNEL); 144 sname = devm_kstrdup(dev, name, GFP_KERNEL);
154 if (!sname) { 145 if (!sname)
155 ret = -ENOMEM; 146 return -ENOMEM;
156 goto error_release_channels;
157 }
158 147
159 strreplace(sname, '-', '_'); 148 strreplace(sname, '-', '_');
160 st->hwmon_dev = hwmon_device_register_with_groups(dev, sname, st, 149 hwmon_dev = devm_hwmon_device_register_with_groups(dev, sname, st,
161 st->groups); 150 st->groups);
162 if (IS_ERR(st->hwmon_dev)) { 151 return PTR_ERR_OR_ZERO(hwmon_dev);
163 ret = PTR_ERR(st->hwmon_dev);
164 goto error_release_channels;
165 }
166 platform_set_drvdata(pdev, st);
167 return 0;
168
169error_release_channels:
170 iio_channel_release_all(channels);
171 return ret;
172}
173
174static int iio_hwmon_remove(struct platform_device *pdev)
175{
176 struct iio_hwmon_state *st = platform_get_drvdata(pdev);
177
178 hwmon_device_unregister(st->hwmon_dev);
179 iio_channel_release_all(st->channels);
180
181 return 0;
182} 152}
183 153
184static const struct of_device_id iio_hwmon_of_match[] = { 154static const struct of_device_id iio_hwmon_of_match[] = {
@@ -193,7 +163,6 @@ static struct platform_driver __refdata iio_hwmon_driver = {
193 .of_match_table = iio_hwmon_of_match, 163 .of_match_table = iio_hwmon_of_match,
194 }, 164 },
195 .probe = iio_hwmon_probe, 165 .probe = iio_hwmon_probe,
196 .remove = iio_hwmon_remove,
197}; 166};
198 167
199module_platform_driver(iio_hwmon_driver); 168module_platform_driver(iio_hwmon_driver);
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 17c6460ae351..bb15d7816a29 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -99,12 +99,8 @@ static const struct tctl_offset tctl_offset_table[] = {
99 { 0x17, "AMD Ryzen 7 1700X", 20000 }, 99 { 0x17, "AMD Ryzen 7 1700X", 20000 },
100 { 0x17, "AMD Ryzen 7 1800X", 20000 }, 100 { 0x17, "AMD Ryzen 7 1800X", 20000 },
101 { 0x17, "AMD Ryzen 7 2700X", 10000 }, 101 { 0x17, "AMD Ryzen 7 2700X", 10000 },
102 { 0x17, "AMD Ryzen Threadripper 1950X", 27000 }, 102 { 0x17, "AMD Ryzen Threadripper 19", 27000 }, /* 19{00,20,50}X */
103 { 0x17, "AMD Ryzen Threadripper 1920X", 27000 }, 103 { 0x17, "AMD Ryzen Threadripper 29", 27000 }, /* 29{20,50,70,90}[W]X */
104 { 0x17, "AMD Ryzen Threadripper 1900X", 27000 },
105 { 0x17, "AMD Ryzen Threadripper 1950", 10000 },
106 { 0x17, "AMD Ryzen Threadripper 1920", 10000 },
107 { 0x17, "AMD Ryzen Threadripper 1910", 10000 },
108}; 104};
109 105
110static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval) 106static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval)
diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c
new file mode 100644
index 000000000000..de46577c7d5a
--- /dev/null
+++ b/drivers/hwmon/mlxreg-fan.c
@@ -0,0 +1,489 @@
1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2//
3// Copyright (c) 2018 Mellanox Technologies. All rights reserved.
4// Copyright (c) 2018 Vadim Pasternak <vadimp@mellanox.com>
5
6#include <linux/bitops.h>
7#include <linux/device.h>
8#include <linux/hwmon.h>
9#include <linux/module.h>
10#include <linux/platform_data/mlxreg.h>
11#include <linux/platform_device.h>
12#include <linux/regmap.h>
13#include <linux/thermal.h>
14
15#define MLXREG_FAN_MAX_TACHO 12
16#define MLXREG_FAN_MAX_STATE 10
17#define MLXREG_FAN_MIN_DUTY 51 /* 20% */
18#define MLXREG_FAN_MAX_DUTY 255 /* 100% */
19/*
20 * Minimum and maximum FAN allowed speed in percent: from 20% to 100%. Values
21 * MLXREG_FAN_MAX_STATE + x, where x is between 2 and 10 are used for
22 * setting FAN speed dynamic minimum. For example, if value is set to 14 (40%)
23 * cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to
24 * introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100.
25 */
26#define MLXREG_FAN_SPEED_MIN (MLXREG_FAN_MAX_STATE + 2)
27#define MLXREG_FAN_SPEED_MAX (MLXREG_FAN_MAX_STATE * 2)
28#define MLXREG_FAN_SPEED_MIN_LEVEL 2 /* 20 percent */
29#define MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF 44
30#define MLXREG_FAN_TACHO_DIVIDER_DEF 1132
31/*
32 * FAN datasheet defines the formula for RPM calculations as RPM = 15/t-high.
33 * The logic in a programmable device measures the time t-high by sampling the
34 * tachometer every t-sample (with the default value 11.32 uS) and increment
35 * a counter (N) as long as the pulse has not change:
36 * RPM = 15 / (t-sample * (K + Regval)), where:
37 * Regval: is the value read from the programmable device register;
38 * - 0xff - represents tachometer fault;
39 * - 0xfe - represents tachometer minimum value , which is 4444 RPM;
40 * - 0x00 - represents tachometer maximum value , which is 300000 RPM;
41 * K: is 44 and it represents the minimum allowed samples per pulse;
42 * N: is equal K + Regval;
43 * In order to calculate RPM from the register value the following formula is
44 * used: RPM = 15 / ((Regval + K) * 11.32) * 10^(-6)), which in the
45 * default case is modified to:
46 * RPM = 15000000 * 100 / ((Regval + 44) * 1132);
47 * - for Regval 0x00, RPM will be 15000000 * 100 / (44 * 1132) = 30115;
48 * - for Regval 0xfe, RPM will be 15000000 * 100 / ((254 + 44) * 1132) = 4446;
49 * In common case the formula is modified to:
50 * RPM = 15000000 * 100 / ((Regval + samples) * divider).
51 */
52#define MLXREG_FAN_GET_RPM(rval, d, s) (DIV_ROUND_CLOSEST(15000000 * 100, \
53 ((rval) + (s)) * (d)))
54#define MLXREG_FAN_GET_FAULT(val, mask) (!!((val) ^ (mask)))
55#define MLXREG_FAN_PWM_DUTY2STATE(duty) (DIV_ROUND_CLOSEST((duty) * \
56 MLXREG_FAN_MAX_STATE, \
57 MLXREG_FAN_MAX_DUTY))
58#define MLXREG_FAN_PWM_STATE2DUTY(stat) (DIV_ROUND_CLOSEST((stat) * \
59 MLXREG_FAN_MAX_DUTY, \
60 MLXREG_FAN_MAX_STATE))
61
62/*
63 * struct mlxreg_fan_tacho - tachometer data (internal use):
64 *
65 * @connected: indicates if tachometer is connected;
66 * @reg: register offset;
67 * @mask: fault mask;
68 */
69struct mlxreg_fan_tacho {
70 bool connected;
71 u32 reg;
72 u32 mask;
73};
74
75/*
76 * struct mlxreg_fan_pwm - PWM data (internal use):
77 *
78 * @connected: indicates if PWM is connected;
79 * @reg: register offset;
80 */
81struct mlxreg_fan_pwm {
82 bool connected;
83 u32 reg;
84};
85
86/*
87 * struct mlxreg_fan - private data (internal use):
88 *
89 * @dev: basic device;
90 * @regmap: register map of parent device;
91 * @tacho: tachometer data;
92 * @pwm: PWM data;
93 * @samples: minimum allowed samples per pulse;
94 * @divider: divider value for tachometer RPM calculation;
95 * @cooling: cooling device levels;
96 * @cdev: cooling device;
97 */
98struct mlxreg_fan {
99 struct device *dev;
100 void *regmap;
101 struct mlxreg_core_platform_data *pdata;
102 struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO];
103 struct mlxreg_fan_pwm pwm;
104 int samples;
105 int divider;
106 u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1];
107 struct thermal_cooling_device *cdev;
108};
109
110static int
111mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
112 int channel, long *val)
113{
114 struct mlxreg_fan *fan = dev_get_drvdata(dev);
115 struct mlxreg_fan_tacho *tacho;
116 u32 regval;
117 int err;
118
119 switch (type) {
120 case hwmon_fan:
121 tacho = &fan->tacho[channel];
122 switch (attr) {
123 case hwmon_fan_input:
124 err = regmap_read(fan->regmap, tacho->reg, &regval);
125 if (err)
126 return err;
127
128 *val = MLXREG_FAN_GET_RPM(regval, fan->divider,
129 fan->samples);
130 break;
131
132 case hwmon_fan_fault:
133 err = regmap_read(fan->regmap, tacho->reg, &regval);
134 if (err)
135 return err;
136
137 *val = MLXREG_FAN_GET_FAULT(regval, tacho->mask);
138 break;
139
140 default:
141 return -EOPNOTSUPP;
142 }
143 break;
144
145 case hwmon_pwm:
146 switch (attr) {
147 case hwmon_pwm_input:
148 err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
149 if (err)
150 return err;
151
152 *val = regval;
153 break;
154
155 default:
156 return -EOPNOTSUPP;
157 }
158 break;
159
160 default:
161 return -EOPNOTSUPP;
162 }
163
164 return 0;
165}
166
167static int
168mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
169 int channel, long val)
170{
171 struct mlxreg_fan *fan = dev_get_drvdata(dev);
172
173 switch (type) {
174 case hwmon_pwm:
175 switch (attr) {
176 case hwmon_pwm_input:
177 if (val < MLXREG_FAN_MIN_DUTY ||
178 val > MLXREG_FAN_MAX_DUTY)
179 return -EINVAL;
180 return regmap_write(fan->regmap, fan->pwm.reg, val);
181 default:
182 return -EOPNOTSUPP;
183 }
184 break;
185
186 default:
187 return -EOPNOTSUPP;
188 }
189
190 return -EOPNOTSUPP;
191}
192
193static umode_t
194mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
195 int channel)
196{
197 switch (type) {
198 case hwmon_fan:
199 if (!(((struct mlxreg_fan *)data)->tacho[channel].connected))
200 return 0;
201
202 switch (attr) {
203 case hwmon_fan_input:
204 case hwmon_fan_fault:
205 return 0444;
206 default:
207 break;
208 }
209 break;
210
211 case hwmon_pwm:
212 if (!(((struct mlxreg_fan *)data)->pwm.connected))
213 return 0;
214
215 switch (attr) {
216 case hwmon_pwm_input:
217 return 0644;
218 default:
219 break;
220 }
221 break;
222
223 default:
224 break;
225 }
226
227 return 0;
228}
229
230static const u32 mlxreg_fan_hwmon_fan_config[] = {
231 HWMON_F_INPUT | HWMON_F_FAULT,
232 HWMON_F_INPUT | HWMON_F_FAULT,
233 HWMON_F_INPUT | HWMON_F_FAULT,
234 HWMON_F_INPUT | HWMON_F_FAULT,
235 HWMON_F_INPUT | HWMON_F_FAULT,
236 HWMON_F_INPUT | HWMON_F_FAULT,
237 HWMON_F_INPUT | HWMON_F_FAULT,
238 HWMON_F_INPUT | HWMON_F_FAULT,
239 HWMON_F_INPUT | HWMON_F_FAULT,
240 HWMON_F_INPUT | HWMON_F_FAULT,
241 HWMON_F_INPUT | HWMON_F_FAULT,
242 HWMON_F_INPUT | HWMON_F_FAULT,
243 0
244};
245
246static const struct hwmon_channel_info mlxreg_fan_hwmon_fan = {
247 .type = hwmon_fan,
248 .config = mlxreg_fan_hwmon_fan_config,
249};
250
251static const u32 mlxreg_fan_hwmon_pwm_config[] = {
252 HWMON_PWM_INPUT,
253 0
254};
255
256static const struct hwmon_channel_info mlxreg_fan_hwmon_pwm = {
257 .type = hwmon_pwm,
258 .config = mlxreg_fan_hwmon_pwm_config,
259};
260
261static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = {
262 &mlxreg_fan_hwmon_fan,
263 &mlxreg_fan_hwmon_pwm,
264 NULL
265};
266
267static const struct hwmon_ops mlxreg_fan_hwmon_hwmon_ops = {
268 .is_visible = mlxreg_fan_is_visible,
269 .read = mlxreg_fan_read,
270 .write = mlxreg_fan_write,
271};
272
273static const struct hwmon_chip_info mlxreg_fan_hwmon_chip_info = {
274 .ops = &mlxreg_fan_hwmon_hwmon_ops,
275 .info = mlxreg_fan_hwmon_info,
276};
277
278static int mlxreg_fan_get_max_state(struct thermal_cooling_device *cdev,
279 unsigned long *state)
280{
281 *state = MLXREG_FAN_MAX_STATE;
282 return 0;
283}
284
285static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev,
286 unsigned long *state)
287
288{
289 struct mlxreg_fan *fan = cdev->devdata;
290 u32 regval;
291 int err;
292
293 err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
294 if (err) {
295 dev_err(fan->dev, "Failed to query PWM duty\n");
296 return err;
297 }
298
299 *state = MLXREG_FAN_PWM_DUTY2STATE(regval);
300
301 return 0;
302}
303
304static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,
305 unsigned long state)
306
307{
308 struct mlxreg_fan *fan = cdev->devdata;
309 unsigned long cur_state;
310 u32 regval;
311 int i;
312 int err;
313
314 /*
315 * Verify if this request is for changing allowed FAN dynamical
316 * minimum. If it is - update cooling levels accordingly and update
317 * state, if current state is below the newly requested minimum state.
318 * For example, if current state is 5, and minimal state is to be
319 * changed from 4 to 6, fan->cooling_levels[0 to 5] will be changed all
320 * from 4 to 6. And state 5 (fan->cooling_levels[4]) should be
321 * overwritten.
322 */
323 if (state >= MLXREG_FAN_SPEED_MIN && state <= MLXREG_FAN_SPEED_MAX) {
324 state -= MLXREG_FAN_MAX_STATE;
325 for (i = 0; i < state; i++)
326 fan->cooling_levels[i] = state;
327 for (i = state; i <= MLXREG_FAN_MAX_STATE; i++)
328 fan->cooling_levels[i] = i;
329
330 err = regmap_read(fan->regmap, fan->pwm.reg, &regval);
331 if (err) {
332 dev_err(fan->dev, "Failed to query PWM duty\n");
333 return err;
334 }
335
336 cur_state = MLXREG_FAN_PWM_DUTY2STATE(regval);
337 if (state < cur_state)
338 return 0;
339
340 state = cur_state;
341 }
342
343 if (state > MLXREG_FAN_MAX_STATE)
344 return -EINVAL;
345
346 /* Normalize the state to the valid speed range. */
347 state = fan->cooling_levels[state];
348 err = regmap_write(fan->regmap, fan->pwm.reg,
349 MLXREG_FAN_PWM_STATE2DUTY(state));
350 if (err) {
351 dev_err(fan->dev, "Failed to write PWM duty\n");
352 return err;
353 }
354 return 0;
355}
356
357static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = {
358 .get_max_state = mlxreg_fan_get_max_state,
359 .get_cur_state = mlxreg_fan_get_cur_state,
360 .set_cur_state = mlxreg_fan_set_cur_state,
361};
362
363static int mlxreg_fan_config(struct mlxreg_fan *fan,
364 struct mlxreg_core_platform_data *pdata)
365{
366 struct mlxreg_core_data *data = pdata->data;
367 bool configured = false;
368 int tacho_num = 0, i;
369
370 fan->samples = MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF;
371 fan->divider = MLXREG_FAN_TACHO_DIVIDER_DEF;
372 for (i = 0; i < pdata->counter; i++, data++) {
373 if (strnstr(data->label, "tacho", sizeof(data->label))) {
374 if (tacho_num == MLXREG_FAN_MAX_TACHO) {
375 dev_err(fan->dev, "too many tacho entries: %s\n",
376 data->label);
377 return -EINVAL;
378 }
379 fan->tacho[tacho_num].reg = data->reg;
380 fan->tacho[tacho_num].mask = data->mask;
381 fan->tacho[tacho_num++].connected = true;
382 } else if (strnstr(data->label, "pwm", sizeof(data->label))) {
383 if (fan->pwm.connected) {
384 dev_err(fan->dev, "duplicate pwm entry: %s\n",
385 data->label);
386 return -EINVAL;
387 }
388 fan->pwm.reg = data->reg;
389 fan->pwm.connected = true;
390 } else if (strnstr(data->label, "conf", sizeof(data->label))) {
391 if (configured) {
392 dev_err(fan->dev, "duplicate conf entry: %s\n",
393 data->label);
394 return -EINVAL;
395 }
396 /* Validate that conf parameters are not zeros. */
397 if (!data->mask || !data->bit) {
398 dev_err(fan->dev, "invalid conf entry params: %s\n",
399 data->label);
400 return -EINVAL;
401 }
402 fan->samples = data->mask;
403 fan->divider = data->bit;
404 configured = true;
405 } else {
406 dev_err(fan->dev, "invalid label: %s\n", data->label);
407 return -EINVAL;
408 }
409 }
410
411 /* Init cooling levels per PWM state. */
412 for (i = 0; i < MLXREG_FAN_SPEED_MIN_LEVEL; i++)
413 fan->cooling_levels[i] = MLXREG_FAN_SPEED_MIN_LEVEL;
414 for (i = MLXREG_FAN_SPEED_MIN_LEVEL; i <= MLXREG_FAN_MAX_STATE; i++)
415 fan->cooling_levels[i] = i;
416
417 return 0;
418}
419
420static int mlxreg_fan_probe(struct platform_device *pdev)
421{
422 struct mlxreg_core_platform_data *pdata;
423 struct mlxreg_fan *fan;
424 struct device *hwm;
425 int err;
426
427 pdata = dev_get_platdata(&pdev->dev);
428 if (!pdata) {
429 dev_err(&pdev->dev, "Failed to get platform data.\n");
430 return -EINVAL;
431 }
432
433 fan = devm_kzalloc(&pdev->dev, sizeof(*fan), GFP_KERNEL);
434 if (!fan)
435 return -ENOMEM;
436
437 fan->dev = &pdev->dev;
438 fan->regmap = pdata->regmap;
439 platform_set_drvdata(pdev, fan);
440
441 err = mlxreg_fan_config(fan, pdata);
442 if (err)
443 return err;
444
445 hwm = devm_hwmon_device_register_with_info(&pdev->dev, "mlxreg_fan",
446 fan,
447 &mlxreg_fan_hwmon_chip_info,
448 NULL);
449 if (IS_ERR(hwm)) {
450 dev_err(&pdev->dev, "Failed to register hwmon device\n");
451 return PTR_ERR(hwm);
452 }
453
454 if (IS_REACHABLE(CONFIG_THERMAL)) {
455 fan->cdev = thermal_cooling_device_register("mlxreg_fan", fan,
456 &mlxreg_fan_cooling_ops);
457 if (IS_ERR(fan->cdev)) {
458 dev_err(&pdev->dev, "Failed to register cooling device\n");
459 return PTR_ERR(fan->cdev);
460 }
461 }
462
463 return 0;
464}
465
466static int mlxreg_fan_remove(struct platform_device *pdev)
467{
468 struct mlxreg_fan *fan = platform_get_drvdata(pdev);
469
470 if (IS_REACHABLE(CONFIG_THERMAL))
471 thermal_cooling_device_unregister(fan->cdev);
472
473 return 0;
474}
475
476static struct platform_driver mlxreg_fan_driver = {
477 .driver = {
478 .name = "mlxreg-fan",
479 },
480 .probe = mlxreg_fan_probe,
481 .remove = mlxreg_fan_remove,
482};
483
484module_platform_driver(mlxreg_fan_driver);
485
486MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
487MODULE_DESCRIPTION("Mellanox FAN driver");
488MODULE_LICENSE("GPL");
489MODULE_ALIAS("platform:mlxreg-fan");
diff --git a/drivers/hwmon/nct6775.c b/drivers/hwmon/nct6775.c
index f9d1349c3286..c6bd61e4695a 100644
--- a/drivers/hwmon/nct6775.c
+++ b/drivers/hwmon/nct6775.c
@@ -1050,8 +1050,8 @@ struct nct6775_data {
1050 u64 beeps; 1050 u64 beeps;
1051 1051
1052 u8 pwm_num; /* number of pwm */ 1052 u8 pwm_num; /* number of pwm */
1053 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage, 1053 u8 pwm_mode[NUM_FAN]; /* 0->DC variable voltage,
1054 * 0->PWM variable duty cycle 1054 * 1->PWM variable duty cycle
1055 */ 1055 */
1056 enum pwm_enable pwm_enable[NUM_FAN]; 1056 enum pwm_enable pwm_enable[NUM_FAN];
1057 /* 0->off 1057 /* 0->off
@@ -2541,7 +2541,7 @@ static void pwm_update_registers(struct nct6775_data *data, int nr)
2541 case thermal_cruise: 2541 case thermal_cruise:
2542 nct6775_write_value(data, data->REG_TARGET[nr], 2542 nct6775_write_value(data, data->REG_TARGET[nr],
2543 data->target_temp[nr]); 2543 data->target_temp[nr]);
2544 /* intentional */ 2544 /* fall through */
2545 default: 2545 default:
2546 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]); 2546 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2547 reg = (reg & ~data->tolerance_mask) | 2547 reg = (reg & ~data->tolerance_mask) |
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 95a68ab175c7..7815ddf149f6 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -77,7 +77,7 @@ struct nct7904_data {
77}; 77};
78 78
79/* Access functions */ 79/* Access functions */
80static int nct7904_bank_lock(struct nct7904_data *data, unsigned bank) 80static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank)
81{ 81{
82 int ret; 82 int ret;
83 83
@@ -99,7 +99,7 @@ static inline void nct7904_bank_release(struct nct7904_data *data)
99 99
100/* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */ 100/* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
101static int nct7904_read_reg(struct nct7904_data *data, 101static int nct7904_read_reg(struct nct7904_data *data,
102 unsigned bank, unsigned reg) 102 unsigned int bank, unsigned int reg)
103{ 103{
104 struct i2c_client *client = data->client; 104 struct i2c_client *client = data->client;
105 int ret; 105 int ret;
@@ -117,7 +117,7 @@ static int nct7904_read_reg(struct nct7904_data *data,
117 * -ERRNO on error. 117 * -ERRNO on error.
118 */ 118 */
119static int nct7904_read_reg16(struct nct7904_data *data, 119static int nct7904_read_reg16(struct nct7904_data *data,
120 unsigned bank, unsigned reg) 120 unsigned int bank, unsigned int reg)
121{ 121{
122 struct i2c_client *client = data->client; 122 struct i2c_client *client = data->client;
123 int ret, hi; 123 int ret, hi;
@@ -139,7 +139,7 @@ static int nct7904_read_reg16(struct nct7904_data *data,
139 139
140/* Write 1-byte register. Returns 0 or -ERRNO on error. */ 140/* Write 1-byte register. Returns 0 or -ERRNO on error. */
141static int nct7904_write_reg(struct nct7904_data *data, 141static int nct7904_write_reg(struct nct7904_data *data,
142 unsigned bank, unsigned reg, u8 val) 142 unsigned int bank, unsigned int reg, u8 val)
143{ 143{
144 struct i2c_client *client = data->client; 144 struct i2c_client *client = data->client;
145 int ret; 145 int ret;
@@ -159,7 +159,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
159 unsigned int cnt, rpm; 159 unsigned int cnt, rpm;
160 int ret; 160 int ret;
161 161
162 switch(attr) { 162 switch (attr) {
163 case hwmon_fan_input: 163 case hwmon_fan_input:
164 ret = nct7904_read_reg16(data, BANK_0, 164 ret = nct7904_read_reg16(data, BANK_0,
165 FANIN1_HV_REG + channel * 2); 165 FANIN1_HV_REG + channel * 2);
@@ -200,7 +200,7 @@ static int nct7904_read_in(struct device *dev, u32 attr, int channel,
200 200
201 index = nct7904_chan_to_index[channel]; 201 index = nct7904_chan_to_index[channel];
202 202
203 switch(attr) { 203 switch (attr) {
204 case hwmon_in_input: 204 case hwmon_in_input:
205 ret = nct7904_read_reg16(data, BANK_0, 205 ret = nct7904_read_reg16(data, BANK_0,
206 VSEN1_HV_REG + index * 2); 206 VSEN1_HV_REG + index * 2);
@@ -236,7 +236,7 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
236 struct nct7904_data *data = dev_get_drvdata(dev); 236 struct nct7904_data *data = dev_get_drvdata(dev);
237 int ret, temp; 237 int ret, temp;
238 238
239 switch(attr) { 239 switch (attr) {
240 case hwmon_temp_input: 240 case hwmon_temp_input:
241 if (channel == 0) 241 if (channel == 0)
242 ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG); 242 ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
@@ -276,7 +276,7 @@ static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
276 struct nct7904_data *data = dev_get_drvdata(dev); 276 struct nct7904_data *data = dev_get_drvdata(dev);
277 int ret; 277 int ret;
278 278
279 switch(attr) { 279 switch (attr) {
280 case hwmon_pwm_input: 280 case hwmon_pwm_input:
281 ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel); 281 ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel);
282 if (ret < 0) 282 if (ret < 0)
@@ -301,7 +301,7 @@ static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
301 struct nct7904_data *data = dev_get_drvdata(dev); 301 struct nct7904_data *data = dev_get_drvdata(dev);
302 int ret; 302 int ret;
303 303
304 switch(attr) { 304 switch (attr) {
305 case hwmon_pwm_input: 305 case hwmon_pwm_input:
306 if (val < 0 || val > 255) 306 if (val < 0 || val > 255)
307 return -EINVAL; 307 return -EINVAL;
@@ -322,7 +322,7 @@ static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
322 322
323static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel) 323static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel)
324{ 324{
325 switch(attr) { 325 switch (attr) {
326 case hwmon_pwm_input: 326 case hwmon_pwm_input:
327 case hwmon_pwm_enable: 327 case hwmon_pwm_enable:
328 return S_IRUGO | S_IWUSR; 328 return S_IRUGO | S_IWUSR;
@@ -431,15 +431,15 @@ static const struct hwmon_channel_info nct7904_in = {
431}; 431};
432 432
433static const u32 nct7904_fan_config[] = { 433static const u32 nct7904_fan_config[] = {
434 HWMON_F_INPUT, 434 HWMON_F_INPUT,
435 HWMON_F_INPUT, 435 HWMON_F_INPUT,
436 HWMON_F_INPUT, 436 HWMON_F_INPUT,
437 HWMON_F_INPUT, 437 HWMON_F_INPUT,
438 HWMON_F_INPUT, 438 HWMON_F_INPUT,
439 HWMON_F_INPUT, 439 HWMON_F_INPUT,
440 HWMON_F_INPUT, 440 HWMON_F_INPUT,
441 HWMON_F_INPUT, 441 HWMON_F_INPUT,
442 0 442 0
443}; 443};
444 444
445static const struct hwmon_channel_info nct7904_fan = { 445static const struct hwmon_channel_info nct7904_fan = {
@@ -448,11 +448,11 @@ static const struct hwmon_channel_info nct7904_fan = {
448}; 448};
449 449
450static const u32 nct7904_pwm_config[] = { 450static const u32 nct7904_pwm_config[] = {
451 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 451 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
452 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 452 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
453 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 453 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
454 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 454 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
455 0 455 0
456}; 456};
457 457
458static const struct hwmon_channel_info nct7904_pwm = { 458static const struct hwmon_channel_info nct7904_pwm = {
@@ -461,16 +461,16 @@ static const struct hwmon_channel_info nct7904_pwm = {
461}; 461};
462 462
463static const u32 nct7904_temp_config[] = { 463static const u32 nct7904_temp_config[] = {
464 HWMON_T_INPUT, 464 HWMON_T_INPUT,
465 HWMON_T_INPUT, 465 HWMON_T_INPUT,
466 HWMON_T_INPUT, 466 HWMON_T_INPUT,
467 HWMON_T_INPUT, 467 HWMON_T_INPUT,
468 HWMON_T_INPUT, 468 HWMON_T_INPUT,
469 HWMON_T_INPUT, 469 HWMON_T_INPUT,
470 HWMON_T_INPUT, 470 HWMON_T_INPUT,
471 HWMON_T_INPUT, 471 HWMON_T_INPUT,
472 HWMON_T_INPUT, 472 HWMON_T_INPUT,
473 0 473 0
474}; 474};
475 475
476static const struct hwmon_channel_info nct7904_temp = { 476static const struct hwmon_channel_info nct7904_temp = {
diff --git a/drivers/hwmon/npcm750-pwm-fan.c b/drivers/hwmon/npcm750-pwm-fan.c
new file mode 100644
index 000000000000..8474d601aa63
--- /dev/null
+++ b/drivers/hwmon/npcm750-pwm-fan.c
@@ -0,0 +1,1057 @@
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2014-2018 Nuvoton Technology corporation.
3
4#include <linux/clk.h>
5#include <linux/device.h>
6#include <linux/hwmon.h>
7#include <linux/hwmon-sysfs.h>
8#include <linux/interrupt.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/of_address.h>
12#include <linux/of_irq.h>
13#include <linux/platform_device.h>
14#include <linux/spinlock.h>
15#include <linux/sysfs.h>
16#include <linux/thermal.h>
17
18/* NPCM7XX PWM registers */
19#define NPCM7XX_PWM_REG_BASE(base, n) ((base) + ((n) * 0x1000L))
20
21#define NPCM7XX_PWM_REG_PR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x00)
22#define NPCM7XX_PWM_REG_CSR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x04)
23#define NPCM7XX_PWM_REG_CR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x08)
24#define NPCM7XX_PWM_REG_CNRx(base, n, ch) \
25 (NPCM7XX_PWM_REG_BASE(base, n) + 0x0C + (12 * (ch)))
26#define NPCM7XX_PWM_REG_CMRx(base, n, ch) \
27 (NPCM7XX_PWM_REG_BASE(base, n) + 0x10 + (12 * (ch)))
28#define NPCM7XX_PWM_REG_PDRx(base, n, ch) \
29 (NPCM7XX_PWM_REG_BASE(base, n) + 0x14 + (12 * (ch)))
30#define NPCM7XX_PWM_REG_PIER(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x3C)
31#define NPCM7XX_PWM_REG_PIIR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x40)
32
33#define NPCM7XX_PWM_CTRL_CH0_MODE_BIT BIT(3)
34#define NPCM7XX_PWM_CTRL_CH1_MODE_BIT BIT(11)
35#define NPCM7XX_PWM_CTRL_CH2_MODE_BIT BIT(15)
36#define NPCM7XX_PWM_CTRL_CH3_MODE_BIT BIT(19)
37
38#define NPCM7XX_PWM_CTRL_CH0_INV_BIT BIT(2)
39#define NPCM7XX_PWM_CTRL_CH1_INV_BIT BIT(10)
40#define NPCM7XX_PWM_CTRL_CH2_INV_BIT BIT(14)
41#define NPCM7XX_PWM_CTRL_CH3_INV_BIT BIT(18)
42
43#define NPCM7XX_PWM_CTRL_CH0_EN_BIT BIT(0)
44#define NPCM7XX_PWM_CTRL_CH1_EN_BIT BIT(8)
45#define NPCM7XX_PWM_CTRL_CH2_EN_BIT BIT(12)
46#define NPCM7XX_PWM_CTRL_CH3_EN_BIT BIT(16)
47
48/* Define the maximum PWM channel number */
49#define NPCM7XX_PWM_MAX_CHN_NUM 8
50#define NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE 4
51#define NPCM7XX_PWM_MAX_MODULES 2
52
53/* Define the Counter Register, value = 100 for match 100% */
54#define NPCM7XX_PWM_COUNTER_DEFAULT_NUM 255
55#define NPCM7XX_PWM_CMR_DEFAULT_NUM 127
56#define NPCM7XX_PWM_CMR_MAX 255
57
58/* default all PWM channels PRESCALE2 = 1 */
59#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH0 0x4
60#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH1 0x40
61#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH2 0x400
62#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH3 0x4000
63
64#define PWM_OUTPUT_FREQ_25KHZ 25000
65#define PWN_CNT_DEFAULT 256
66#define MIN_PRESCALE1 2
67#define NPCM7XX_PWM_PRESCALE_SHIFT_CH01 8
68
69#define NPCM7XX_PWM_PRESCALE2_DEFAULT (NPCM7XX_PWM_PRESCALE2_DEFAULT_CH0 | \
70 NPCM7XX_PWM_PRESCALE2_DEFAULT_CH1 | \
71 NPCM7XX_PWM_PRESCALE2_DEFAULT_CH2 | \
72 NPCM7XX_PWM_PRESCALE2_DEFAULT_CH3)
73
74#define NPCM7XX_PWM_CTRL_MODE_DEFAULT (NPCM7XX_PWM_CTRL_CH0_MODE_BIT | \
75 NPCM7XX_PWM_CTRL_CH1_MODE_BIT | \
76 NPCM7XX_PWM_CTRL_CH2_MODE_BIT | \
77 NPCM7XX_PWM_CTRL_CH3_MODE_BIT)
78
79/* NPCM7XX FAN Tacho registers */
80#define NPCM7XX_FAN_REG_BASE(base, n) ((base) + ((n) * 0x1000L))
81
82#define NPCM7XX_FAN_REG_TCNT1(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x00)
83#define NPCM7XX_FAN_REG_TCRA(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x02)
84#define NPCM7XX_FAN_REG_TCRB(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x04)
85#define NPCM7XX_FAN_REG_TCNT2(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x06)
86#define NPCM7XX_FAN_REG_TPRSC(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x08)
87#define NPCM7XX_FAN_REG_TCKC(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0A)
88#define NPCM7XX_FAN_REG_TMCTRL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0C)
89#define NPCM7XX_FAN_REG_TICTRL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0E)
90#define NPCM7XX_FAN_REG_TICLR(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x10)
91#define NPCM7XX_FAN_REG_TIEN(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x12)
92#define NPCM7XX_FAN_REG_TCPA(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x14)
93#define NPCM7XX_FAN_REG_TCPB(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x16)
94#define NPCM7XX_FAN_REG_TCPCFG(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x18)
95#define NPCM7XX_FAN_REG_TINASEL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x1A)
96#define NPCM7XX_FAN_REG_TINBSEL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x1C)
97
98#define NPCM7XX_FAN_TCKC_CLKX_NONE 0
99#define NPCM7XX_FAN_TCKC_CLK1_APB BIT(0)
100#define NPCM7XX_FAN_TCKC_CLK2_APB BIT(3)
101
102#define NPCM7XX_FAN_TMCTRL_TBEN BIT(6)
103#define NPCM7XX_FAN_TMCTRL_TAEN BIT(5)
104#define NPCM7XX_FAN_TMCTRL_TBEDG BIT(4)
105#define NPCM7XX_FAN_TMCTRL_TAEDG BIT(3)
106#define NPCM7XX_FAN_TMCTRL_MODE_5 BIT(2)
107
108#define NPCM7XX_FAN_TICLR_CLEAR_ALL GENMASK(5, 0)
109#define NPCM7XX_FAN_TICLR_TFCLR BIT(5)
110#define NPCM7XX_FAN_TICLR_TECLR BIT(4)
111#define NPCM7XX_FAN_TICLR_TDCLR BIT(3)
112#define NPCM7XX_FAN_TICLR_TCCLR BIT(2)
113#define NPCM7XX_FAN_TICLR_TBCLR BIT(1)
114#define NPCM7XX_FAN_TICLR_TACLR BIT(0)
115
116#define NPCM7XX_FAN_TIEN_ENABLE_ALL GENMASK(5, 0)
117#define NPCM7XX_FAN_TIEN_TFIEN BIT(5)
118#define NPCM7XX_FAN_TIEN_TEIEN BIT(4)
119#define NPCM7XX_FAN_TIEN_TDIEN BIT(3)
120#define NPCM7XX_FAN_TIEN_TCIEN BIT(2)
121#define NPCM7XX_FAN_TIEN_TBIEN BIT(1)
122#define NPCM7XX_FAN_TIEN_TAIEN BIT(0)
123
124#define NPCM7XX_FAN_TICTRL_TFPND BIT(5)
125#define NPCM7XX_FAN_TICTRL_TEPND BIT(4)
126#define NPCM7XX_FAN_TICTRL_TDPND BIT(3)
127#define NPCM7XX_FAN_TICTRL_TCPND BIT(2)
128#define NPCM7XX_FAN_TICTRL_TBPND BIT(1)
129#define NPCM7XX_FAN_TICTRL_TAPND BIT(0)
130
131#define NPCM7XX_FAN_TCPCFG_HIBEN BIT(7)
132#define NPCM7XX_FAN_TCPCFG_EQBEN BIT(6)
133#define NPCM7XX_FAN_TCPCFG_LOBEN BIT(5)
134#define NPCM7XX_FAN_TCPCFG_CPBSEL BIT(4)
135#define NPCM7XX_FAN_TCPCFG_HIAEN BIT(3)
136#define NPCM7XX_FAN_TCPCFG_EQAEN BIT(2)
137#define NPCM7XX_FAN_TCPCFG_LOAEN BIT(1)
138#define NPCM7XX_FAN_TCPCFG_CPASEL BIT(0)
139
140/* FAN General Definition */
141/* Define the maximum FAN channel number */
142#define NPCM7XX_FAN_MAX_MODULE 8
143#define NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE 2
144#define NPCM7XX_FAN_MAX_CHN_NUM 16
145
146/*
147 * Get Fan Tach Timeout (base on clock 214843.75Hz, 1 cnt = 4.654us)
148 * Timeout 94ms ~= 0x5000
149 * (The minimum FAN speed could to support ~640RPM/pulse 1,
150 * 320RPM/pulse 2, ...-- 10.6Hz)
151 */
152#define NPCM7XX_FAN_TIMEOUT 0x5000
153#define NPCM7XX_FAN_TCNT 0xFFFF
154#define NPCM7XX_FAN_TCPA (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT)
155#define NPCM7XX_FAN_TCPB (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT)
156
157#define NPCM7XX_FAN_POLL_TIMER_200MS 200
158#define NPCM7XX_FAN_DEFAULT_PULSE_PER_REVOLUTION 2
159#define NPCM7XX_FAN_TINASEL_FANIN_DEFAULT 0
160#define NPCM7XX_FAN_CLK_PRESCALE 255
161
162#define NPCM7XX_FAN_CMPA 0
163#define NPCM7XX_FAN_CMPB 1
164
165/* Obtain the fan number */
166#define NPCM7XX_FAN_INPUT(fan, cmp) (((fan) << 1) + (cmp))
167
168/* fan sample status */
169#define FAN_DISABLE 0xFF
170#define FAN_INIT 0x00
171#define FAN_PREPARE_TO_GET_FIRST_CAPTURE 0x01
172#define FAN_ENOUGH_SAMPLE 0x02
173
174struct npcm7xx_fan_dev {
175 u8 fan_st_flg;
176 u8 fan_pls_per_rev;
177 u16 fan_cnt;
178 u32 fan_cnt_tmp;
179};
180
181struct npcm7xx_cooling_device {
182 char name[THERMAL_NAME_LENGTH];
183 struct npcm7xx_pwm_fan_data *data;
184 struct thermal_cooling_device *tcdev;
185 int pwm_port;
186 u8 *cooling_levels;
187 u8 max_state;
188 u8 cur_state;
189};
190
191struct npcm7xx_pwm_fan_data {
192 void __iomem *pwm_base;
193 void __iomem *fan_base;
194 unsigned long pwm_clk_freq;
195 unsigned long fan_clk_freq;
196 struct clk *pwm_clk;
197 struct clk *fan_clk;
198 struct mutex pwm_lock[NPCM7XX_PWM_MAX_MODULES];
199 spinlock_t fan_lock[NPCM7XX_FAN_MAX_MODULE];
200 int fan_irq[NPCM7XX_FAN_MAX_MODULE];
201 bool pwm_present[NPCM7XX_PWM_MAX_CHN_NUM];
202 bool fan_present[NPCM7XX_FAN_MAX_CHN_NUM];
203 u32 input_clk_freq;
204 struct timer_list fan_timer;
205 struct npcm7xx_fan_dev fan_dev[NPCM7XX_FAN_MAX_CHN_NUM];
206 struct npcm7xx_cooling_device *cdev[NPCM7XX_PWM_MAX_CHN_NUM];
207 u8 fan_select;
208};
209
210static int npcm7xx_pwm_config_set(struct npcm7xx_pwm_fan_data *data,
211 int channel, u16 val)
212{
213 u32 pwm_ch = (channel % NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE);
214 u32 module = (channel / NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE);
215 u32 tmp_buf, ctrl_en_bit, env_bit;
216
217 /*
218 * Config PWM Comparator register for setting duty cycle
219 */
220 mutex_lock(&data->pwm_lock[module]);
221
222 /* write new CMR value */
223 iowrite32(val, NPCM7XX_PWM_REG_CMRx(data->pwm_base, module, pwm_ch));
224 tmp_buf = ioread32(NPCM7XX_PWM_REG_CR(data->pwm_base, module));
225
226 switch (pwm_ch) {
227 case 0:
228 ctrl_en_bit = NPCM7XX_PWM_CTRL_CH0_EN_BIT;
229 env_bit = NPCM7XX_PWM_CTRL_CH0_INV_BIT;
230 break;
231 case 1:
232 ctrl_en_bit = NPCM7XX_PWM_CTRL_CH1_EN_BIT;
233 env_bit = NPCM7XX_PWM_CTRL_CH1_INV_BIT;
234 break;
235 case 2:
236 ctrl_en_bit = NPCM7XX_PWM_CTRL_CH2_EN_BIT;
237 env_bit = NPCM7XX_PWM_CTRL_CH2_INV_BIT;
238 break;
239 case 3:
240 ctrl_en_bit = NPCM7XX_PWM_CTRL_CH3_EN_BIT;
241 env_bit = NPCM7XX_PWM_CTRL_CH3_INV_BIT;
242 break;
243 default:
244 mutex_unlock(&data->pwm_lock[module]);
245 return -ENODEV;
246 }
247
248 if (val == 0) {
249 /* Disable PWM */
250 tmp_buf &= ~ctrl_en_bit;
251 tmp_buf |= env_bit;
252 } else {
253 /* Enable PWM */
254 tmp_buf |= ctrl_en_bit;
255 tmp_buf &= ~env_bit;
256 }
257
258 iowrite32(tmp_buf, NPCM7XX_PWM_REG_CR(data->pwm_base, module));
259 mutex_unlock(&data->pwm_lock[module]);
260
261 return 0;
262}
263
264static inline void npcm7xx_fan_start_capture(struct npcm7xx_pwm_fan_data *data,
265 u8 fan, u8 cmp)
266{
267 u8 fan_id;
268 u8 reg_mode;
269 u8 reg_int;
270 unsigned long flags;
271
272 fan_id = NPCM7XX_FAN_INPUT(fan, cmp);
273
274 /* to check whether any fan tach is enable */
275 if (data->fan_dev[fan_id].fan_st_flg != FAN_DISABLE) {
276 /* reset status */
277 spin_lock_irqsave(&data->fan_lock[fan], flags);
278
279 data->fan_dev[fan_id].fan_st_flg = FAN_INIT;
280 reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
281
282 /*
283 * the interrupt enable bits do not need to be cleared before
284 * it sets, the interrupt enable bits are cleared only on reset.
285 * the clock unit control register is behaving in the same
286 * manner that the interrupt enable register behave.
287 */
288 if (cmp == NPCM7XX_FAN_CMPA) {
289 /* enable interrupt */
290 iowrite8(reg_int | (NPCM7XX_FAN_TIEN_TAIEN |
291 NPCM7XX_FAN_TIEN_TEIEN),
292 NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
293
294 reg_mode = NPCM7XX_FAN_TCKC_CLK1_APB
295 | ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base,
296 fan));
297
298 /* start to Capture */
299 iowrite8(reg_mode, NPCM7XX_FAN_REG_TCKC(data->fan_base,
300 fan));
301 } else {
302 /* enable interrupt */
303 iowrite8(reg_int | (NPCM7XX_FAN_TIEN_TBIEN |
304 NPCM7XX_FAN_TIEN_TFIEN),
305 NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
306
307 reg_mode =
308 NPCM7XX_FAN_TCKC_CLK2_APB
309 | ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base,
310 fan));
311
312 /* start to Capture */
313 iowrite8(reg_mode,
314 NPCM7XX_FAN_REG_TCKC(data->fan_base, fan));
315 }
316
317 spin_unlock_irqrestore(&data->fan_lock[fan], flags);
318 }
319}
320
321/*
322 * Enable a background timer to poll fan tach value, (200ms * 4)
323 * to polling all fan
324 */
325static void npcm7xx_fan_polling(struct timer_list *t)
326{
327 struct npcm7xx_pwm_fan_data *data;
328 int i;
329
330 data = from_timer(data, t, fan_timer);
331
332 /*
333 * Polling two module per one round,
334 * FAN01 & FAN89 / FAN23 & FAN1011 / FAN45 & FAN1213 / FAN67 & FAN1415
335 */
336 for (i = data->fan_select; i < NPCM7XX_FAN_MAX_MODULE;
337 i = i + 4) {
338 /* clear the flag and reset the counter (TCNT) */
339 iowrite8(NPCM7XX_FAN_TICLR_CLEAR_ALL,
340 NPCM7XX_FAN_REG_TICLR(data->fan_base, i));
341
342 if (data->fan_present[i * 2]) {
343 iowrite16(NPCM7XX_FAN_TCNT,
344 NPCM7XX_FAN_REG_TCNT1(data->fan_base, i));
345 npcm7xx_fan_start_capture(data, i, NPCM7XX_FAN_CMPA);
346 }
347 if (data->fan_present[(i * 2) + 1]) {
348 iowrite16(NPCM7XX_FAN_TCNT,
349 NPCM7XX_FAN_REG_TCNT2(data->fan_base, i));
350 npcm7xx_fan_start_capture(data, i, NPCM7XX_FAN_CMPB);
351 }
352 }
353
354 data->fan_select++;
355 data->fan_select &= 0x3;
356
357 /* reset the timer interval */
358 data->fan_timer.expires = jiffies +
359 msecs_to_jiffies(NPCM7XX_FAN_POLL_TIMER_200MS);
360 add_timer(&data->fan_timer);
361}
362
363static inline void npcm7xx_fan_compute(struct npcm7xx_pwm_fan_data *data,
364 u8 fan, u8 cmp, u8 fan_id, u8 flag_int,
365 u8 flag_mode, u8 flag_clear)
366{
367 u8 reg_int;
368 u8 reg_mode;
369 u16 fan_cap;
370
371 if (cmp == NPCM7XX_FAN_CMPA)
372 fan_cap = ioread16(NPCM7XX_FAN_REG_TCRA(data->fan_base, fan));
373 else
374 fan_cap = ioread16(NPCM7XX_FAN_REG_TCRB(data->fan_base, fan));
375
376 /* clear capature flag, H/W will auto reset the NPCM7XX_FAN_TCNTx */
377 iowrite8(flag_clear, NPCM7XX_FAN_REG_TICLR(data->fan_base, fan));
378
379 if (data->fan_dev[fan_id].fan_st_flg == FAN_INIT) {
380 /* First capture, drop it */
381 data->fan_dev[fan_id].fan_st_flg =
382 FAN_PREPARE_TO_GET_FIRST_CAPTURE;
383
384 /* reset counter */
385 data->fan_dev[fan_id].fan_cnt_tmp = 0;
386 } else if (data->fan_dev[fan_id].fan_st_flg < FAN_ENOUGH_SAMPLE) {
387 /*
388 * collect the enough sample,
389 * (ex: 2 pulse fan need to get 2 sample)
390 */
391 data->fan_dev[fan_id].fan_cnt_tmp +=
392 (NPCM7XX_FAN_TCNT - fan_cap);
393
394 data->fan_dev[fan_id].fan_st_flg++;
395 } else {
396 /* get enough sample or fan disable */
397 if (data->fan_dev[fan_id].fan_st_flg == FAN_ENOUGH_SAMPLE) {
398 data->fan_dev[fan_id].fan_cnt_tmp +=
399 (NPCM7XX_FAN_TCNT - fan_cap);
400
401 /* compute finial average cnt per pulse */
402 data->fan_dev[fan_id].fan_cnt =
403 data->fan_dev[fan_id].fan_cnt_tmp /
404 FAN_ENOUGH_SAMPLE;
405
406 data->fan_dev[fan_id].fan_st_flg = FAN_INIT;
407 }
408
409 reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
410
411 /* disable interrupt */
412 iowrite8((reg_int & ~flag_int),
413 NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
414 reg_mode = ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, fan));
415
416 /* stop capturing */
417 iowrite8((reg_mode & ~flag_mode),
418 NPCM7XX_FAN_REG_TCKC(data->fan_base, fan));
419 }
420}
421
422static inline void npcm7xx_check_cmp(struct npcm7xx_pwm_fan_data *data,
423 u8 fan, u8 cmp, u8 flag)
424{
425 u8 reg_int;
426 u8 reg_mode;
427 u8 flag_timeout;
428 u8 flag_cap;
429 u8 flag_clear;
430 u8 flag_int;
431 u8 flag_mode;
432 u8 fan_id;
433
434 fan_id = NPCM7XX_FAN_INPUT(fan, cmp);
435
436 if (cmp == NPCM7XX_FAN_CMPA) {
437 flag_cap = NPCM7XX_FAN_TICTRL_TAPND;
438 flag_timeout = NPCM7XX_FAN_TICTRL_TEPND;
439 flag_int = NPCM7XX_FAN_TIEN_TAIEN | NPCM7XX_FAN_TIEN_TEIEN;
440 flag_mode = NPCM7XX_FAN_TCKC_CLK1_APB;
441 flag_clear = NPCM7XX_FAN_TICLR_TACLR | NPCM7XX_FAN_TICLR_TECLR;
442 } else {
443 flag_cap = NPCM7XX_FAN_TICTRL_TBPND;
444 flag_timeout = NPCM7XX_FAN_TICTRL_TFPND;
445 flag_int = NPCM7XX_FAN_TIEN_TBIEN | NPCM7XX_FAN_TIEN_TFIEN;
446 flag_mode = NPCM7XX_FAN_TCKC_CLK2_APB;
447 flag_clear = NPCM7XX_FAN_TICLR_TBCLR | NPCM7XX_FAN_TICLR_TFCLR;
448 }
449
450 if (flag & flag_timeout) {
451 reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
452
453 /* disable interrupt */
454 iowrite8((reg_int & ~flag_int),
455 NPCM7XX_FAN_REG_TIEN(data->fan_base, fan));
456
457 /* clear interrupt flag */
458 iowrite8(flag_clear,
459 NPCM7XX_FAN_REG_TICLR(data->fan_base, fan));
460
461 reg_mode = ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, fan));
462
463 /* stop capturing */
464 iowrite8((reg_mode & ~flag_mode),
465 NPCM7XX_FAN_REG_TCKC(data->fan_base, fan));
466
467 /*
468 * If timeout occurs (NPCM7XX_FAN_TIMEOUT), the fan doesn't
469 * connect or speed is lower than 10.6Hz (320RPM/pulse2).
470 * In these situation, the RPM output should be zero.
471 */
472 data->fan_dev[fan_id].fan_cnt = 0;
473 } else {
474 /* input capture is occurred */
475 if (flag & flag_cap)
476 npcm7xx_fan_compute(data, fan, cmp, fan_id, flag_int,
477 flag_mode, flag_clear);
478 }
479}
480
481static irqreturn_t npcm7xx_fan_isr(int irq, void *dev_id)
482{
483 struct npcm7xx_pwm_fan_data *data = dev_id;
484 unsigned long flags;
485 int module;
486 u8 flag;
487
488 module = irq - data->fan_irq[0];
489 spin_lock_irqsave(&data->fan_lock[module], flags);
490
491 flag = ioread8(NPCM7XX_FAN_REG_TICTRL(data->fan_base, module));
492 if (flag > 0) {
493 npcm7xx_check_cmp(data, module, NPCM7XX_FAN_CMPA, flag);
494 npcm7xx_check_cmp(data, module, NPCM7XX_FAN_CMPB, flag);
495 spin_unlock_irqrestore(&data->fan_lock[module], flags);
496 return IRQ_HANDLED;
497 }
498
499 spin_unlock_irqrestore(&data->fan_lock[module], flags);
500
501 return IRQ_NONE;
502}
503
504static int npcm7xx_read_pwm(struct device *dev, u32 attr, int channel,
505 long *val)
506{
507 struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev);
508 u32 pmw_ch = (channel % NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE);
509 u32 module = (channel / NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE);
510
511 switch (attr) {
512 case hwmon_pwm_input:
513 *val = ioread32
514 (NPCM7XX_PWM_REG_CMRx(data->pwm_base, module, pmw_ch));
515 return 0;
516 default:
517 return -EOPNOTSUPP;
518 }
519}
520
521static int npcm7xx_write_pwm(struct device *dev, u32 attr, int channel,
522 long val)
523{
524 struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev);
525 int err;
526
527 switch (attr) {
528 case hwmon_pwm_input:
529 if (val < 0 || val > NPCM7XX_PWM_CMR_MAX)
530 return -EINVAL;
531 err = npcm7xx_pwm_config_set(data, channel, (u16)val);
532 break;
533 default:
534 err = -EOPNOTSUPP;
535 break;
536 }
537
538 return err;
539}
540
541static umode_t npcm7xx_pwm_is_visible(const void *_data, u32 attr, int channel)
542{
543 const struct npcm7xx_pwm_fan_data *data = _data;
544
545 if (!data->pwm_present[channel])
546 return 0;
547
548 switch (attr) {
549 case hwmon_pwm_input:
550 return 0644;
551 default:
552 return 0;
553 }
554}
555
556static int npcm7xx_read_fan(struct device *dev, u32 attr, int channel,
557 long *val)
558{
559 struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev);
560
561 switch (attr) {
562 case hwmon_fan_input:
563 *val = 0;
564 if (data->fan_dev[channel].fan_cnt <= 0)
565 return data->fan_dev[channel].fan_cnt;
566
567 /* Convert the raw reading to RPM */
568 if (data->fan_dev[channel].fan_cnt > 0 &&
569 data->fan_dev[channel].fan_pls_per_rev > 0)
570 *val = ((data->input_clk_freq * 60) /
571 (data->fan_dev[channel].fan_cnt *
572 data->fan_dev[channel].fan_pls_per_rev));
573 return 0;
574 default:
575 return -EOPNOTSUPP;
576 }
577}
578
579static umode_t npcm7xx_fan_is_visible(const void *_data, u32 attr, int channel)
580{
581 const struct npcm7xx_pwm_fan_data *data = _data;
582
583 if (!data->fan_present[channel])
584 return 0;
585
586 switch (attr) {
587 case hwmon_fan_input:
588 return 0444;
589 default:
590 return 0;
591 }
592}
593
594static int npcm7xx_read(struct device *dev, enum hwmon_sensor_types type,
595 u32 attr, int channel, long *val)
596{
597 switch (type) {
598 case hwmon_pwm:
599 return npcm7xx_read_pwm(dev, attr, channel, val);
600 case hwmon_fan:
601 return npcm7xx_read_fan(dev, attr, channel, val);
602 default:
603 return -EOPNOTSUPP;
604 }
605}
606
607static int npcm7xx_write(struct device *dev, enum hwmon_sensor_types type,
608 u32 attr, int channel, long val)
609{
610 switch (type) {
611 case hwmon_pwm:
612 return npcm7xx_write_pwm(dev, attr, channel, val);
613 default:
614 return -EOPNOTSUPP;
615 }
616}
617
618static umode_t npcm7xx_is_visible(const void *data,
619 enum hwmon_sensor_types type,
620 u32 attr, int channel)
621{
622 switch (type) {
623 case hwmon_pwm:
624 return npcm7xx_pwm_is_visible(data, attr, channel);
625 case hwmon_fan:
626 return npcm7xx_fan_is_visible(data, attr, channel);
627 default:
628 return 0;
629 }
630}
631
632static const u32 npcm7xx_pwm_config[] = {
633 HWMON_PWM_INPUT,
634 HWMON_PWM_INPUT,
635 HWMON_PWM_INPUT,
636 HWMON_PWM_INPUT,
637 HWMON_PWM_INPUT,
638 HWMON_PWM_INPUT,
639 HWMON_PWM_INPUT,
640 HWMON_PWM_INPUT,
641 0
642};
643
644static const struct hwmon_channel_info npcm7xx_pwm = {
645 .type = hwmon_pwm,
646 .config = npcm7xx_pwm_config,
647};
648
649static const u32 npcm7xx_fan_config[] = {
650 HWMON_F_INPUT,
651 HWMON_F_INPUT,
652 HWMON_F_INPUT,
653 HWMON_F_INPUT,
654 HWMON_F_INPUT,
655 HWMON_F_INPUT,
656 HWMON_F_INPUT,
657 HWMON_F_INPUT,
658 HWMON_F_INPUT,
659 HWMON_F_INPUT,
660 HWMON_F_INPUT,
661 HWMON_F_INPUT,
662 HWMON_F_INPUT,
663 HWMON_F_INPUT,
664 HWMON_F_INPUT,
665 HWMON_F_INPUT,
666 0
667};
668
669static const struct hwmon_channel_info npcm7xx_fan = {
670 .type = hwmon_fan,
671 .config = npcm7xx_fan_config,
672};
673
674static const struct hwmon_channel_info *npcm7xx_info[] = {
675 &npcm7xx_pwm,
676 &npcm7xx_fan,
677 NULL
678};
679
680static const struct hwmon_ops npcm7xx_hwmon_ops = {
681 .is_visible = npcm7xx_is_visible,
682 .read = npcm7xx_read,
683 .write = npcm7xx_write,
684};
685
686static const struct hwmon_chip_info npcm7xx_chip_info = {
687 .ops = &npcm7xx_hwmon_ops,
688 .info = npcm7xx_info,
689};
690
691static u32 npcm7xx_pwm_init(struct npcm7xx_pwm_fan_data *data)
692{
693 int m, ch;
694 u32 prescale_val, output_freq;
695
696 data->pwm_clk_freq = clk_get_rate(data->pwm_clk);
697
698 /* Adjust NPCM7xx PWMs output frequency to ~25Khz */
699 output_freq = data->pwm_clk_freq / PWN_CNT_DEFAULT;
700 prescale_val = DIV_ROUND_CLOSEST(output_freq, PWM_OUTPUT_FREQ_25KHZ);
701
702 /* If prescale_val = 0, then the prescale output clock is stopped */
703 if (prescale_val < MIN_PRESCALE1)
704 prescale_val = MIN_PRESCALE1;
705 /*
706 * prescale_val need to decrement in one because in the PWM Prescale
707 * register the Prescale value increment by one
708 */
709 prescale_val--;
710
711 /* Setting PWM Prescale Register value register to both modules */
712 prescale_val |= (prescale_val << NPCM7XX_PWM_PRESCALE_SHIFT_CH01);
713
714 for (m = 0; m < NPCM7XX_PWM_MAX_MODULES ; m++) {
715 iowrite32(prescale_val, NPCM7XX_PWM_REG_PR(data->pwm_base, m));
716 iowrite32(NPCM7XX_PWM_PRESCALE2_DEFAULT,
717 NPCM7XX_PWM_REG_CSR(data->pwm_base, m));
718 iowrite32(NPCM7XX_PWM_CTRL_MODE_DEFAULT,
719 NPCM7XX_PWM_REG_CR(data->pwm_base, m));
720
721 for (ch = 0; ch < NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE; ch++) {
722 iowrite32(NPCM7XX_PWM_COUNTER_DEFAULT_NUM,
723 NPCM7XX_PWM_REG_CNRx(data->pwm_base, m, ch));
724 }
725 }
726
727 return output_freq / ((prescale_val & 0xf) + 1);
728}
729
730static void npcm7xx_fan_init(struct npcm7xx_pwm_fan_data *data)
731{
732 int md;
733 int ch;
734 int i;
735 u32 apb_clk_freq;
736
737 for (md = 0; md < NPCM7XX_FAN_MAX_MODULE; md++) {
738 /* stop FAN0~7 clock */
739 iowrite8(NPCM7XX_FAN_TCKC_CLKX_NONE,
740 NPCM7XX_FAN_REG_TCKC(data->fan_base, md));
741
742 /* disable all interrupt */
743 iowrite8(0x00, NPCM7XX_FAN_REG_TIEN(data->fan_base, md));
744
745 /* clear all interrupt */
746 iowrite8(NPCM7XX_FAN_TICLR_CLEAR_ALL,
747 NPCM7XX_FAN_REG_TICLR(data->fan_base, md));
748
749 /* set FAN0~7 clock prescaler */
750 iowrite8(NPCM7XX_FAN_CLK_PRESCALE,
751 NPCM7XX_FAN_REG_TPRSC(data->fan_base, md));
752
753 /* set FAN0~7 mode (high-to-low transition) */
754 iowrite8((NPCM7XX_FAN_TMCTRL_MODE_5 | NPCM7XX_FAN_TMCTRL_TBEN |
755 NPCM7XX_FAN_TMCTRL_TAEN),
756 NPCM7XX_FAN_REG_TMCTRL(data->fan_base, md));
757
758 /* set FAN0~7 Initial Count/Cap */
759 iowrite16(NPCM7XX_FAN_TCNT,
760 NPCM7XX_FAN_REG_TCNT1(data->fan_base, md));
761 iowrite16(NPCM7XX_FAN_TCNT,
762 NPCM7XX_FAN_REG_TCNT2(data->fan_base, md));
763
764 /* set FAN0~7 compare (equal to count) */
765 iowrite8((NPCM7XX_FAN_TCPCFG_EQAEN | NPCM7XX_FAN_TCPCFG_EQBEN),
766 NPCM7XX_FAN_REG_TCPCFG(data->fan_base, md));
767
768 /* set FAN0~7 compare value */
769 iowrite16(NPCM7XX_FAN_TCPA,
770 NPCM7XX_FAN_REG_TCPA(data->fan_base, md));
771 iowrite16(NPCM7XX_FAN_TCPB,
772 NPCM7XX_FAN_REG_TCPB(data->fan_base, md));
773
774 /* set FAN0~7 fan input FANIN 0~15 */
775 iowrite8(NPCM7XX_FAN_TINASEL_FANIN_DEFAULT,
776 NPCM7XX_FAN_REG_TINASEL(data->fan_base, md));
777 iowrite8(NPCM7XX_FAN_TINASEL_FANIN_DEFAULT,
778 NPCM7XX_FAN_REG_TINBSEL(data->fan_base, md));
779
780 for (i = 0; i < NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE; i++) {
781 ch = md * NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE + i;
782 data->fan_dev[ch].fan_st_flg = FAN_DISABLE;
783 data->fan_dev[ch].fan_pls_per_rev =
784 NPCM7XX_FAN_DEFAULT_PULSE_PER_REVOLUTION;
785 data->fan_dev[ch].fan_cnt = 0;
786 }
787 }
788
789 apb_clk_freq = clk_get_rate(data->fan_clk);
790
791 /* Fan tach input clock = APB clock / prescalar, default is 255. */
792 data->input_clk_freq = apb_clk_freq / (NPCM7XX_FAN_CLK_PRESCALE + 1);
793}
794
795static int
796npcm7xx_pwm_cz_get_max_state(struct thermal_cooling_device *tcdev,
797 unsigned long *state)
798{
799 struct npcm7xx_cooling_device *cdev = tcdev->devdata;
800
801 *state = cdev->max_state;
802
803 return 0;
804}
805
806static int
807npcm7xx_pwm_cz_get_cur_state(struct thermal_cooling_device *tcdev,
808 unsigned long *state)
809{
810 struct npcm7xx_cooling_device *cdev = tcdev->devdata;
811
812 *state = cdev->cur_state;
813
814 return 0;
815}
816
817static int
818npcm7xx_pwm_cz_set_cur_state(struct thermal_cooling_device *tcdev,
819 unsigned long state)
820{
821 struct npcm7xx_cooling_device *cdev = tcdev->devdata;
822 int ret;
823
824 if (state > cdev->max_state)
825 return -EINVAL;
826
827 cdev->cur_state = state;
828 ret = npcm7xx_pwm_config_set(cdev->data, cdev->pwm_port,
829 cdev->cooling_levels[cdev->cur_state]);
830
831 return ret;
832}
833
834static const struct thermal_cooling_device_ops npcm7xx_pwm_cool_ops = {
835 .get_max_state = npcm7xx_pwm_cz_get_max_state,
836 .get_cur_state = npcm7xx_pwm_cz_get_cur_state,
837 .set_cur_state = npcm7xx_pwm_cz_set_cur_state,
838};
839
840static int npcm7xx_create_pwm_cooling(struct device *dev,
841 struct device_node *child,
842 struct npcm7xx_pwm_fan_data *data,
843 u32 pwm_port, u8 num_levels)
844{
845 int ret;
846 struct npcm7xx_cooling_device *cdev;
847
848 cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL);
849 if (!cdev)
850 return -ENOMEM;
851
852 cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
853 if (!cdev->cooling_levels)
854 return -ENOMEM;
855
856 cdev->max_state = num_levels - 1;
857 ret = of_property_read_u8_array(child, "cooling-levels",
858 cdev->cooling_levels,
859 num_levels);
860 if (ret) {
861 dev_err(dev, "Property 'cooling-levels' cannot be read.\n");
862 return ret;
863 }
864 snprintf(cdev->name, THERMAL_NAME_LENGTH, "%s%d", child->name,
865 pwm_port);
866
867 cdev->tcdev = thermal_of_cooling_device_register(child,
868 cdev->name,
869 cdev,
870 &npcm7xx_pwm_cool_ops);
871 if (IS_ERR(cdev->tcdev))
872 return PTR_ERR(cdev->tcdev);
873
874 cdev->data = data;
875 cdev->pwm_port = pwm_port;
876
877 data->cdev[pwm_port] = cdev;
878
879 return 0;
880}
881
882static int npcm7xx_en_pwm_fan(struct device *dev,
883 struct device_node *child,
884 struct npcm7xx_pwm_fan_data *data)
885{
886 u8 *fan_ch;
887 u32 pwm_port;
888 int ret, fan_cnt;
889 u8 index, ch;
890
891 ret = of_property_read_u32(child, "reg", &pwm_port);
892 if (ret)
893 return ret;
894
895 data->pwm_present[pwm_port] = true;
896 ret = npcm7xx_pwm_config_set(data, pwm_port,
897 NPCM7XX_PWM_CMR_DEFAULT_NUM);
898
899 ret = of_property_count_u8_elems(child, "cooling-levels");
900 if (ret > 0) {
901 ret = npcm7xx_create_pwm_cooling(dev, child, data, pwm_port,
902 ret);
903 if (ret)
904 return ret;
905 }
906
907 fan_cnt = of_property_count_u8_elems(child, "fan-tach-ch");
908 if (fan_cnt < 1)
909 return -EINVAL;
910
911 fan_ch = devm_kzalloc(dev, sizeof(*fan_ch) * fan_cnt, GFP_KERNEL);
912 if (!fan_ch)
913 return -ENOMEM;
914
915 ret = of_property_read_u8_array(child, "fan-tach-ch", fan_ch, fan_cnt);
916 if (ret)
917 return ret;
918
919 for (ch = 0; ch < fan_cnt; ch++) {
920 index = fan_ch[ch];
921 data->fan_present[index] = true;
922 data->fan_dev[index].fan_st_flg = FAN_INIT;
923 }
924
925 return 0;
926}
927
928static int npcm7xx_pwm_fan_probe(struct platform_device *pdev)
929{
930 struct device *dev = &pdev->dev;
931 struct device_node *np, *child;
932 struct npcm7xx_pwm_fan_data *data;
933 struct resource *res;
934 struct device *hwmon;
935 char name[20];
936 int ret, cnt;
937 u32 output_freq;
938 u32 i;
939
940 np = dev->of_node;
941
942 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
943 if (!data)
944 return -ENOMEM;
945
946 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
947 if (!res) {
948 dev_err(dev, "pwm resource not found\n");
949 return -ENODEV;
950 }
951
952 data->pwm_base = devm_ioremap_resource(dev, res);
953 dev_dbg(dev, "pwm base resource is %pR\n", res);
954 if (IS_ERR(data->pwm_base))
955 return PTR_ERR(data->pwm_base);
956
957 data->pwm_clk = devm_clk_get(dev, "pwm");
958 if (IS_ERR(data->pwm_clk)) {
959 dev_err(dev, "couldn't get pwm clock\n");
960 return PTR_ERR(data->pwm_clk);
961 }
962
963 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fan");
964 if (!res) {
965 dev_err(dev, "fan resource not found\n");
966 return -ENODEV;
967 }
968
969 data->fan_base = devm_ioremap_resource(dev, res);
970 dev_dbg(dev, "fan base resource is %pR\n", res);
971 if (IS_ERR(data->fan_base))
972 return PTR_ERR(data->fan_base);
973
974 data->fan_clk = devm_clk_get(dev, "fan");
975 if (IS_ERR(data->fan_clk)) {
976 dev_err(dev, "couldn't get fan clock\n");
977 return PTR_ERR(data->fan_clk);
978 }
979
980 output_freq = npcm7xx_pwm_init(data);
981 npcm7xx_fan_init(data);
982
983 for (cnt = 0; cnt < NPCM7XX_PWM_MAX_MODULES ; cnt++)
984 mutex_init(&data->pwm_lock[cnt]);
985
986 for (i = 0; i < NPCM7XX_FAN_MAX_MODULE; i++) {
987 spin_lock_init(&data->fan_lock[i]);
988
989 data->fan_irq[i] = platform_get_irq(pdev, i);
990 if (data->fan_irq[i] < 0) {
991 dev_err(dev, "get IRQ fan%d failed\n", i);
992 return data->fan_irq[i];
993 }
994
995 sprintf(name, "NPCM7XX-FAN-MD%d", i);
996 ret = devm_request_irq(dev, data->fan_irq[i], npcm7xx_fan_isr,
997 0, name, (void *)data);
998 if (ret) {
999 dev_err(dev, "register IRQ fan%d failed\n", i);
1000 return ret;
1001 }
1002 }
1003
1004 for_each_child_of_node(np, child) {
1005 ret = npcm7xx_en_pwm_fan(dev, child, data);
1006 if (ret) {
1007 dev_err(dev, "enable pwm and fan failed\n");
1008 of_node_put(child);
1009 return ret;
1010 }
1011 }
1012
1013 hwmon = devm_hwmon_device_register_with_info(dev, "npcm7xx_pwm_fan",
1014 data, &npcm7xx_chip_info,
1015 NULL);
1016 if (IS_ERR(hwmon)) {
1017 dev_err(dev, "unable to register hwmon device\n");
1018 return PTR_ERR(hwmon);
1019 }
1020
1021 for (i = 0; i < NPCM7XX_FAN_MAX_CHN_NUM; i++) {
1022 if (data->fan_present[i]) {
1023 /* fan timer initialization */
1024 data->fan_timer.expires = jiffies +
1025 msecs_to_jiffies(NPCM7XX_FAN_POLL_TIMER_200MS);
1026 timer_setup(&data->fan_timer,
1027 npcm7xx_fan_polling, 0);
1028 add_timer(&data->fan_timer);
1029 break;
1030 }
1031 }
1032
1033 pr_info("NPCM7XX PWM-FAN Driver probed, output Freq %dHz[PWM], input Freq %dHz[FAN]\n",
1034 output_freq, data->input_clk_freq);
1035
1036 return 0;
1037}
1038
1039static const struct of_device_id of_pwm_fan_match_table[] = {
1040 { .compatible = "nuvoton,npcm750-pwm-fan", },
1041 {},
1042};
1043MODULE_DEVICE_TABLE(of, of_pwm_fan_match_table);
1044
1045static struct platform_driver npcm7xx_pwm_fan_driver = {
1046 .probe = npcm7xx_pwm_fan_probe,
1047 .driver = {
1048 .name = "npcm7xx_pwm_fan",
1049 .of_match_table = of_pwm_fan_match_table,
1050 },
1051};
1052
1053module_platform_driver(npcm7xx_pwm_fan_driver);
1054
1055MODULE_DESCRIPTION("Nuvoton NPCM7XX PWM and Fan Tacho driver");
1056MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>");
1057MODULE_LICENSE("GPL v2");
diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig
index e71aec69e76e..a82018aaf473 100644
--- a/drivers/hwmon/pmbus/Kconfig
+++ b/drivers/hwmon/pmbus/Kconfig
@@ -130,7 +130,7 @@ config SENSORS_MAX34440
130 default n 130 default n
131 help 131 help
132 If you say yes here you get hardware monitoring support for Maxim 132 If you say yes here you get hardware monitoring support for Maxim
133 MAX34440, MAX34441, MAX34446, MAX34460, and MAX34461. 133 MAX34440, MAX34441, MAX34446, MAX34451, MAX34460, and MAX34461.
134 134
135 This driver can also be built as a module. If so, the module will 135 This driver can also be built as a module. If so, the module will
136 be called max34440. 136 be called max34440.
diff --git a/drivers/hwmon/pmbus/max34440.c b/drivers/hwmon/pmbus/max34440.c
index 74a1f6f68fb3..47576c460010 100644
--- a/drivers/hwmon/pmbus/max34440.c
+++ b/drivers/hwmon/pmbus/max34440.c
@@ -27,7 +27,7 @@
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include "pmbus.h" 28#include "pmbus.h"
29 29
30enum chips { max34440, max34441, max34446, max34460, max34461 }; 30enum chips { max34440, max34441, max34446, max34451, max34460, max34461 };
31 31
32#define MAX34440_MFR_VOUT_PEAK 0xd4 32#define MAX34440_MFR_VOUT_PEAK 0xd4
33#define MAX34440_MFR_IOUT_PEAK 0xd5 33#define MAX34440_MFR_IOUT_PEAK 0xd5
@@ -44,6 +44,9 @@ enum chips { max34440, max34441, max34446, max34460, max34461 };
44#define MAX34440_STATUS_OT_FAULT BIT(5) 44#define MAX34440_STATUS_OT_FAULT BIT(5)
45#define MAX34440_STATUS_OT_WARN BIT(6) 45#define MAX34440_STATUS_OT_WARN BIT(6)
46 46
47#define MAX34451_MFR_CHANNEL_CONFIG 0xe4
48#define MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK 0x3f
49
47struct max34440_data { 50struct max34440_data {
48 int id; 51 int id;
49 struct pmbus_driver_info info; 52 struct pmbus_driver_info info;
@@ -67,7 +70,7 @@ static int max34440_read_word_data(struct i2c_client *client, int page, int reg)
67 MAX34440_MFR_VOUT_PEAK); 70 MAX34440_MFR_VOUT_PEAK);
68 break; 71 break;
69 case PMBUS_VIRT_READ_IOUT_AVG: 72 case PMBUS_VIRT_READ_IOUT_AVG:
70 if (data->id != max34446) 73 if (data->id != max34446 && data->id != max34451)
71 return -ENXIO; 74 return -ENXIO;
72 ret = pmbus_read_word_data(client, page, 75 ret = pmbus_read_word_data(client, page,
73 MAX34446_MFR_IOUT_AVG); 76 MAX34446_MFR_IOUT_AVG);
@@ -143,7 +146,7 @@ static int max34440_write_word_data(struct i2c_client *client, int page,
143 case PMBUS_VIRT_RESET_IOUT_HISTORY: 146 case PMBUS_VIRT_RESET_IOUT_HISTORY:
144 ret = pmbus_write_word_data(client, page, 147 ret = pmbus_write_word_data(client, page,
145 MAX34440_MFR_IOUT_PEAK, 0); 148 MAX34440_MFR_IOUT_PEAK, 0);
146 if (!ret && data->id == max34446) 149 if (!ret && (data->id == max34446 || data->id == max34451))
147 ret = pmbus_write_word_data(client, page, 150 ret = pmbus_write_word_data(client, page,
148 MAX34446_MFR_IOUT_AVG, 0); 151 MAX34446_MFR_IOUT_AVG, 0);
149 152
@@ -202,6 +205,58 @@ static int max34440_read_byte_data(struct i2c_client *client, int page, int reg)
202 return ret; 205 return ret;
203} 206}
204 207
208static int max34451_set_supported_funcs(struct i2c_client *client,
209 struct max34440_data *data)
210{
211 /*
212 * Each of the channel 0-15 can be configured to monitor the following
213 * functions based on MFR_CHANNEL_CONFIG[5:0]
214 * 0x10: Sequencing + voltage monitoring (only valid for PAGES 0–11)
215 * 0x20: Voltage monitoring (no sequencing)
216 * 0x21: Voltage read only
217 * 0x22: Current monitoring
218 * 0x23: Current read only
219 * 0x30: General-purpose input active low
220 * 0x34: General-purpose input active high
221 * 0x00: Disabled
222 */
223
224 int page, rv;
225
226 for (page = 0; page < 16; page++) {
227 rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
228 if (rv < 0)
229 return rv;
230
231 rv = i2c_smbus_read_word_data(client,
232 MAX34451_MFR_CHANNEL_CONFIG);
233 if (rv < 0)
234 return rv;
235
236 switch (rv & MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK) {
237 case 0x10:
238 case 0x20:
239 data->info.func[page] = PMBUS_HAVE_VOUT |
240 PMBUS_HAVE_STATUS_VOUT;
241 break;
242 case 0x21:
243 data->info.func[page] = PMBUS_HAVE_VOUT;
244 break;
245 case 0x22:
246 data->info.func[page] = PMBUS_HAVE_IOUT |
247 PMBUS_HAVE_STATUS_IOUT;
248 break;
249 case 0x23:
250 data->info.func[page] = PMBUS_HAVE_IOUT;
251 break;
252 default:
253 break;
254 }
255 }
256
257 return 0;
258}
259
205static struct pmbus_driver_info max34440_info[] = { 260static struct pmbus_driver_info max34440_info[] = {
206 [max34440] = { 261 [max34440] = {
207 .pages = 14, 262 .pages = 14,
@@ -325,6 +380,30 @@ static struct pmbus_driver_info max34440_info[] = {
325 .read_word_data = max34440_read_word_data, 380 .read_word_data = max34440_read_word_data,
326 .write_word_data = max34440_write_word_data, 381 .write_word_data = max34440_write_word_data,
327 }, 382 },
383 [max34451] = {
384 .pages = 21,
385 .format[PSC_VOLTAGE_OUT] = direct,
386 .format[PSC_TEMPERATURE] = direct,
387 .format[PSC_CURRENT_OUT] = direct,
388 .m[PSC_VOLTAGE_OUT] = 1,
389 .b[PSC_VOLTAGE_OUT] = 0,
390 .R[PSC_VOLTAGE_OUT] = 3,
391 .m[PSC_CURRENT_OUT] = 1,
392 .b[PSC_CURRENT_OUT] = 0,
393 .R[PSC_CURRENT_OUT] = 2,
394 .m[PSC_TEMPERATURE] = 1,
395 .b[PSC_TEMPERATURE] = 0,
396 .R[PSC_TEMPERATURE] = 2,
397 /* func 0-15 is set dynamically before probing */
398 .func[16] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
399 .func[17] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
400 .func[18] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
401 .func[19] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
402 .func[20] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP,
403 .read_byte_data = max34440_read_byte_data,
404 .read_word_data = max34440_read_word_data,
405 .write_word_data = max34440_write_word_data,
406 },
328 [max34460] = { 407 [max34460] = {
329 .pages = 18, 408 .pages = 18,
330 .format[PSC_VOLTAGE_OUT] = direct, 409 .format[PSC_VOLTAGE_OUT] = direct,
@@ -398,6 +477,7 @@ static int max34440_probe(struct i2c_client *client,
398 const struct i2c_device_id *id) 477 const struct i2c_device_id *id)
399{ 478{
400 struct max34440_data *data; 479 struct max34440_data *data;
480 int rv;
401 481
402 data = devm_kzalloc(&client->dev, sizeof(struct max34440_data), 482 data = devm_kzalloc(&client->dev, sizeof(struct max34440_data),
403 GFP_KERNEL); 483 GFP_KERNEL);
@@ -406,6 +486,12 @@ static int max34440_probe(struct i2c_client *client,
406 data->id = id->driver_data; 486 data->id = id->driver_data;
407 data->info = max34440_info[id->driver_data]; 487 data->info = max34440_info[id->driver_data];
408 488
489 if (data->id == max34451) {
490 rv = max34451_set_supported_funcs(client, data);
491 if (rv)
492 return rv;
493 }
494
409 return pmbus_do_probe(client, id, &data->info); 495 return pmbus_do_probe(client, id, &data->info);
410} 496}
411 497
@@ -413,6 +499,7 @@ static const struct i2c_device_id max34440_id[] = {
413 {"max34440", max34440}, 499 {"max34440", max34440},
414 {"max34441", max34441}, 500 {"max34441", max34441},
415 {"max34446", max34446}, 501 {"max34446", max34446},
502 {"max34451", max34451},
416 {"max34460", max34460}, 503 {"max34460", max34460},
417 {"max34461", max34461}, 504 {"max34461", max34461},
418 {} 505 {}