diff options
author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2014-11-17 04:25:13 -0500 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2014-11-18 19:22:13 -0500 |
commit | b02ce79fbd5cb822a557e401cfc80d9ce813331e (patch) | |
tree | d2a83eda163bbee4cb5edae5a266d554f9ca5e89 | |
parent | dc3cf93d89c525dcaebf4460109196fd9752c706 (diff) |
ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 3afd071b3001..64f610f1e899 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi | |||
@@ -1107,17 +1107,20 @@ | |||
1107 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | 1107 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; |
1108 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, | 1108 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, |
1109 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, | 1109 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, |
1110 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>; | 1110 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
1111 | <&hp_clk>, <&hp_clk>; | ||
1111 | #clock-cells = <1>; | 1112 | #clock-cells = <1>; |
1112 | renesas,clock-indices = < | 1113 | renesas,clock-indices = < |
1113 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 | 1114 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 |
1114 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 | 1115 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 |
1115 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 | 1116 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 |
1117 | R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 | ||
1116 | >; | 1118 | >; |
1117 | clock-output-names = | 1119 | clock-output-names = |
1118 | "iic2", "tpu0", "mmcif1", "sdhi3", | 1120 | "iic2", "tpu0", "mmcif1", "sdhi3", |
1119 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", | 1121 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", |
1120 | "iic0", "pciec", "iic1", "ssusb", "cmt1"; | 1122 | "iic0", "pciec", "iic1", "ssusb", "cmt1", |
1123 | "usbdmac0", "usbdmac1"; | ||
1121 | }; | 1124 | }; |
1122 | mstp5_clks: mstp5_clks@e6150144 { | 1125 | mstp5_clks: mstp5_clks@e6150144 { |
1123 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | 1126 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; |