diff options
author | Stephen Boyd <sboyd@kernel.org> | 2019-07-31 15:35:13 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2019-08-16 13:20:07 -0400 |
commit | af55dadfbce35b4f4c6247244ce3e44b2e242b84 (patch) | |
tree | 66b0fc762cb7093e4f6caf8baeabcf009c45dcc8 | |
parent | af884a5dfdef06644bdbd7d54ca865616f24b256 (diff) |
clk: sirf: Don't reference clk_init_data after registration
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Guo Zeng <Guo.Zeng@csr.com>
Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20190731193517.237136-6-sboyd@kernel.org
-rw-r--r-- | drivers/clk/sirf/clk-common.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c index ad7951b6b285..dcf4e25a0216 100644 --- a/drivers/clk/sirf/clk-common.c +++ b/drivers/clk/sirf/clk-common.c | |||
@@ -297,9 +297,10 @@ static u8 dmn_clk_get_parent(struct clk_hw *hw) | |||
297 | { | 297 | { |
298 | struct clk_dmn *clk = to_dmnclk(hw); | 298 | struct clk_dmn *clk = to_dmnclk(hw); |
299 | u32 cfg = clkc_readl(clk->regofs); | 299 | u32 cfg = clkc_readl(clk->regofs); |
300 | const char *name = clk_hw_get_name(hw); | ||
300 | 301 | ||
301 | /* parent of io domain can only be pll3 */ | 302 | /* parent of io domain can only be pll3 */ |
302 | if (strcmp(hw->init->name, "io") == 0) | 303 | if (strcmp(name, "io") == 0) |
303 | return 4; | 304 | return 4; |
304 | 305 | ||
305 | WARN_ON((cfg & (BIT(3) - 1)) > 4); | 306 | WARN_ON((cfg & (BIT(3) - 1)) > 4); |
@@ -311,9 +312,10 @@ static int dmn_clk_set_parent(struct clk_hw *hw, u8 parent) | |||
311 | { | 312 | { |
312 | struct clk_dmn *clk = to_dmnclk(hw); | 313 | struct clk_dmn *clk = to_dmnclk(hw); |
313 | u32 cfg = clkc_readl(clk->regofs); | 314 | u32 cfg = clkc_readl(clk->regofs); |
315 | const char *name = clk_hw_get_name(hw); | ||
314 | 316 | ||
315 | /* parent of io domain can only be pll3 */ | 317 | /* parent of io domain can only be pll3 */ |
316 | if (strcmp(hw->init->name, "io") == 0) | 318 | if (strcmp(name, "io") == 0) |
317 | return -EINVAL; | 319 | return -EINVAL; |
318 | 320 | ||
319 | cfg &= ~(BIT(3) - 1); | 321 | cfg &= ~(BIT(3) - 1); |
@@ -353,7 +355,8 @@ static long dmn_clk_round_rate(struct clk_hw *hw, unsigned long rate, | |||
353 | { | 355 | { |
354 | unsigned long fin; | 356 | unsigned long fin; |
355 | unsigned ratio, wait, hold; | 357 | unsigned ratio, wait, hold; |
356 | unsigned bits = (strcmp(hw->init->name, "mem") == 0) ? 3 : 4; | 358 | const char *name = clk_hw_get_name(hw); |
359 | unsigned bits = (strcmp(name, "mem") == 0) ? 3 : 4; | ||
357 | 360 | ||
358 | fin = *parent_rate; | 361 | fin = *parent_rate; |
359 | ratio = fin / rate; | 362 | ratio = fin / rate; |
@@ -375,7 +378,8 @@ static int dmn_clk_set_rate(struct clk_hw *hw, unsigned long rate, | |||
375 | struct clk_dmn *clk = to_dmnclk(hw); | 378 | struct clk_dmn *clk = to_dmnclk(hw); |
376 | unsigned long fin; | 379 | unsigned long fin; |
377 | unsigned ratio, wait, hold, reg; | 380 | unsigned ratio, wait, hold, reg; |
378 | unsigned bits = (strcmp(hw->init->name, "mem") == 0) ? 3 : 4; | 381 | const char *name = clk_hw_get_name(hw); |
382 | unsigned bits = (strcmp(name, "mem") == 0) ? 3 : 4; | ||
379 | 383 | ||
380 | fin = parent_rate; | 384 | fin = parent_rate; |
381 | ratio = fin / rate; | 385 | ratio = fin / rate; |