pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value

The PWM_PIN_LEVEL bit is leave unset by the kernel PWM driver.

Prior to commit 08ee77b5a5de27ad63c92262ebcb4efe0da93b58,
the PWM_PIN_LEVEL bit was always clear when the PWM was disable
and a 0 logic level was apply to the output.

According to the LPC32x0 User Manual [1],
the default value for bit 30 (PWM_PIN_LEVEL) is 0.

This change initialize the pin level to 0 (default value) and
update the register value accordingly.

[1] http://www.nxp.com/documents/user_manual/UM10326.pdf

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 4d470c1a406a..a9b3cff96aac 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -25,6 +25,7 @@ struct lpc32xx_pwm_chip {
 };
 
 #define PWM_ENABLE      BIT(31)
+#define PWM_PIN_LEVEL   BIT(30)
 
 #define to_lpc32xx_pwm_chip(_chip) \
         container_of(_chip, struct lpc32xx_pwm_chip, chip)
@@ -103,6 +104,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
         struct lpc32xx_pwm_chip *lpc32xx;
         struct resource *res;
         int ret;
+        u32 val;
 
         lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
         if (!lpc32xx)
@@ -128,6 +130,11 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
                 return ret;
         }
 
+        /* When PWM is disable, configure the output to the default value */
+        val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+        val &= ~PWM_PIN_LEVEL;
+        writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+
         platform_set_drvdata(pdev, lpc32xx);
 
         return 0;