drm/i915/dvo: switch to kernel unsigned int types

We have fairly mixed uintN_t vs. uN usage throughout the driver, but try
to stick to kernel types at least where it's more prevalent.

v2: fix checkpatch warning on indentation

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180612095621.21101-1-jani.nikula@intel.com

7 files changed, 70 insertions, 70 deletions

diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 80b3e16cf48c..caac9942e1e3 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -159,7 +159,7 @@
 #define CH7017_BANG_LIMIT_CONTROL       0x7f
 
 struct ch7017_priv {
-        uint8_t dummy;
+        u8 dummy;
 };
 
 static void ch7017_dump_regs(struct intel_dvo_device *dvo);
@@ -186,7 +186,7 @@ static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val)
 
 static bool ch7017_write(struct intel_dvo_device *dvo, u8 addr, u8 val)
 {
-        uint8_t buf[2] = { addr, val };
+        u8 buf[2] = { addr, val };
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
                 .flags = 0,
@@ -258,11 +258,11 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
                             const struct drm_display_mode *mode,
                             const struct drm_display_mode *adjusted_mode)
 {
-        uint8_t lvds_pll_feedback_div, lvds_pll_vco_control;
-        uint8_t outputs_enable, lvds_control_2, lvds_power_down;
-        uint8_t horizontal_active_pixel_input;
-        uint8_t horizontal_active_pixel_output, vertical_active_line_output;
-        uint8_t active_input_line_output;
+        u8 lvds_pll_feedback_div, lvds_pll_vco_control;
+        u8 outputs_enable, lvds_control_2, lvds_power_down;
+        u8 horizontal_active_pixel_input;
+        u8 horizontal_active_pixel_output, vertical_active_line_output;
+        u8 active_input_line_output;
 
         DRM_DEBUG_KMS("Registers before mode setting\n");
         ch7017_dump_regs(dvo);
@@ -333,7 +333,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
 /* set the CH7017 power state */
 static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)
 {
-        uint8_t val;
+        u8 val;
 
         ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);
 
@@ -361,7 +361,7 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)
 
 static bool ch7017_get_hw_state(struct intel_dvo_device *dvo)
 {
-        uint8_t val;
+        u8 val;
 
         ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);
 
@@ -373,7 +373,7 @@ static bool ch7017_get_hw_state(struct intel_dvo_device *dvo)
 
 static void ch7017_dump_regs(struct intel_dvo_device *dvo)
 {
-        uint8_t val;
+        u8 val;
 
 #define DUMP(reg)                                       \
 do {                                                    \
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index 7aeeffd2428b..397ac5233726 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -85,7 +85,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 static struct ch7xxx_id_struct {
-        uint8_t vid;
+        u8 vid;
         char *name;
 } ch7xxx_ids[] = {
         { CH7011_VID, "CH7011" },
@@ -96,7 +96,7 @@ static struct ch7xxx_id_struct {
 };
 
 static struct ch7xxx_did_struct {
-        uint8_t did;
+        u8 did;
         char *name;
 } ch7xxx_dids[] = {
         { CH7xxx_DID, "CH7XXX" },
@@ -107,7 +107,7 @@ struct ch7xxx_priv {
         bool quiet;
 };
 
-static char *ch7xxx_get_id(uint8_t vid)
+static char *ch7xxx_get_id(u8 vid)
 {
         int i;
 
@@ -119,7 +119,7 @@ static char *ch7xxx_get_id(uint8_t vid)
         return NULL;
 }
 
-static char *ch7xxx_get_did(uint8_t did)
+static char *ch7xxx_get_did(u8 did)
 {
         int i;
 
@@ -132,7 +132,7 @@ static char *ch7xxx_get_did(uint8_t did)
 }
 
 /** Reads an 8 bit register */
-static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
+static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 {
         struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -170,11 +170,11 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 }
 
 /** Writes an 8 bit register */
-static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
+static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
 {
         struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        uint8_t out_buf[2];
+        u8 out_buf[2];
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
                 .flags = 0,
@@ -201,7 +201,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
 {
         /* this will detect the CH7xxx chip on the specified i2c bus */
         struct ch7xxx_priv *ch7xxx;
-        uint8_t vendor, device;
+        u8 vendor, device;
         char *name, *devid;
 
         ch7xxx = kzalloc(sizeof(struct ch7xxx_priv), GFP_KERNEL);
@@ -244,7 +244,7 @@ out:
 
 static enum drm_connector_status ch7xxx_detect(struct intel_dvo_device *dvo)
 {
-        uint8_t cdet, orig_pm, pm;
+        u8 cdet, orig_pm, pm;
 
         ch7xxx_readb(dvo, CH7xxx_PM, &orig_pm);
 
@@ -276,7 +276,7 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
                             const struct drm_display_mode *mode,
                             const struct drm_display_mode *adjusted_mode)
 {
-        uint8_t tvco, tpcp, tpd, tlpf, idf;
+        u8 tvco, tpcp, tpd, tlpf, idf;
 
         if (mode->clock <= 65000) {
                 tvco = 0x23;
@@ -336,7 +336,7 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
         int i;
 
         for (i = 0; i < CH7xxx_NUM_REGS; i++) {
-                uint8_t val;
+                u8 val;
                 if ((i % 8) == 0)
                         DRM_DEBUG_KMS("\n %02X: ", i);
                 ch7xxx_readb(dvo, i, &val);
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index c73aff163908..24278cc49090 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -161,7 +161,7 @@
  * instead. The following list contains all registers that
  * require saving.
  */
-static const uint16_t backup_addresses[] = {
+static const u16 backup_addresses[] = {
         0x11, 0x12,
         0x18, 0x19, 0x1a, 0x1f,
         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
@@ -174,11 +174,11 @@ static const uint16_t backup_addresses[] = {
 struct ivch_priv {
         bool quiet;
 
-        uint16_t width, height;
+        u16 width, height;
 
         /* Register backup */
 
-        uint16_t reg_backup[ARRAY_SIZE(backup_addresses)];
+        u16 reg_backup[ARRAY_SIZE(backup_addresses)];
 };
 
 
@@ -188,7 +188,7 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo);
  *
  * Each of the 256 registers are 16 bits long.
  */
-static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
+static bool ivch_read(struct intel_dvo_device *dvo, int addr, u16 *data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -231,7 +231,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 }
 
 /* Writes a 16-bit register on the ivch */
-static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
+static bool ivch_write(struct intel_dvo_device *dvo, int addr, u16 data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -263,7 +263,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
                       struct i2c_adapter *adapter)
 {
         struct ivch_priv *priv;
-        uint16_t temp;
+        u16 temp;
         int i;
 
         priv = kzalloc(sizeof(struct ivch_priv), GFP_KERNEL);
@@ -342,7 +342,7 @@ static void ivch_reset(struct intel_dvo_device *dvo)
 static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
 {
         int i;
-        uint16_t vr01, vr30, backlight;
+        u16 vr01, vr30, backlight;
 
         ivch_reset(dvo);
 
@@ -379,7 +379,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
 
 static bool ivch_get_hw_state(struct intel_dvo_device *dvo)
 {
-        uint16_t vr01;
+        u16 vr01;
 
         ivch_reset(dvo);
 
@@ -398,9 +398,9 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
                           const struct drm_display_mode *adjusted_mode)
 {
         struct ivch_priv *priv = dvo->dev_priv;
-        uint16_t vr40 = 0;
-        uint16_t vr01 = 0;
-        uint16_t vr10;
+        u16 vr40 = 0;
+        u16 vr01 = 0;
+        u16 vr10;
 
         ivch_reset(dvo);
 
@@ -416,7 +416,7 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
 
         if (mode->hdisplay != adjusted_mode->crtc_hdisplay ||
             mode->vdisplay != adjusted_mode->crtc_vdisplay) {
-                uint16_t x_ratio, y_ratio;
+                u16 x_ratio, y_ratio;
 
                 vr01 |= VR01_PANEL_FIT_ENABLE;
                 vr40 |= VR40_CLOCK_GATING_ENABLE;
@@ -438,7 +438,7 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
 
 static void ivch_dump_regs(struct intel_dvo_device *dvo)
 {
-        uint16_t val;
+        u16 val;
 
         ivch_read(dvo, VR00, &val);
         DRM_DEBUG_KMS("VR00: 0x%04x\n", val);
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c
index 2379c33cfe51..c584e01dc8dc 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -191,8 +191,8 @@ enum {
 };
 
 struct ns2501_reg {
-         uint8_t offset;
-         uint8_t value;
+        u8 offset;
+        u8 value;
 };
 
 /*
@@ -202,23 +202,23 @@ struct ns2501_reg {
  * read all this with a grain of salt.
  */
 struct ns2501_configuration {
-        uint8_t sync;           /* configuration of the C0 register */
-        uint8_t conf;           /* configuration register 8 */
-        uint8_t syncb;          /* configuration register 41 */
-        uint8_t dither;         /* configuration of the dithering */
-        uint8_t pll_a;          /* PLL configuration, register A, 1B */
-        uint16_t pll_b;         /* PLL configuration, register B, 1C/1D */
-        uint16_t hstart;        /* horizontal start, registers C1/C2 */
-        uint16_t hstop;         /* horizontal total, registers C3/C4 */
-        uint16_t vstart;        /* vertical start, registers C5/C6 */
-        uint16_t vstop;         /* vertical total, registers C7/C8 */
-        uint16_t vsync;         /* manual vertical sync start, 80/81 */
-        uint16_t vtotal;        /* number of lines generated, 82/83 */
-        uint16_t hpos;          /* horizontal position + 256, 98/99  */
-        uint16_t vpos;          /* vertical position, 8e/8f */
-        uint16_t voffs;         /* vertical output offset, 9c/9d */
-        uint16_t hscale;        /* horizontal scaling factor, b8/b9 */
-        uint16_t vscale;        /* vertical scaling factor, 10/11 */
+        u8 sync;                /* configuration of the C0 register */
+        u8 conf;                /* configuration register 8 */
+        u8 syncb;               /* configuration register 41 */
+        u8 dither;              /* configuration of the dithering */
+        u8 pll_a;               /* PLL configuration, register A, 1B */
+        u16 pll_b;              /* PLL configuration, register B, 1C/1D */
+        u16 hstart;             /* horizontal start, registers C1/C2 */
+        u16 hstop;              /* horizontal total, registers C3/C4 */
+        u16 vstart;             /* vertical start, registers C5/C6 */
+        u16 vstop;              /* vertical total, registers C7/C8 */
+        u16 vsync;              /* manual vertical sync start, 80/81 */
+        u16 vtotal;             /* number of lines generated, 82/83 */
+        u16 hpos;               /* horizontal position + 256, 98/99  */
+        u16 vpos;               /* vertical position, 8e/8f */
+        u16 voffs;              /* vertical output offset, 9c/9d */
+        u16 hscale;             /* horizontal scaling factor, b8/b9 */
+        u16 vscale;             /* vertical scaling factor, 10/11 */
 };
 
 /*
@@ -389,7 +389,7 @@ struct ns2501_priv {
 ** If it returns false, it might be wise to enable the
 ** DVO with the above function.
 */
-static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch)
+static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 {
         struct ns2501_priv *ns = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -434,11 +434,11 @@ static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch)
 ** If it returns false, it might be wise to enable the
 ** DVO with the above function.
 */
-static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
+static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
 {
         struct ns2501_priv *ns = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        uint8_t out_buf[2];
+        u8 out_buf[2];
 
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index 1c1a0674dbab..4ae5d8fd9ff0 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -65,7 +65,7 @@ struct sil164_priv {
 
 #define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
 
-static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
+static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 {
         struct sil164_priv *sil = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -102,11 +102,11 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
         return false;
 }
 
-static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
+static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
 {
         struct sil164_priv *sil = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        uint8_t out_buf[2];
+        u8 out_buf[2];
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
                 .flags = 0,
@@ -173,7 +173,7 @@ out:
 
 static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
 {
-        uint8_t reg9;
+        u8 reg9;
 
         sil164_readb(dvo, SIL164_REG9, &reg9);
 
@@ -243,7 +243,7 @@ static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
 
 static void sil164_dump_regs(struct intel_dvo_device *dvo)
 {
-        uint8_t val;
+        u8 val;
 
         sil164_readb(dvo, SIL164_FREQ_LO, &val);
         DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index 31e181da93db..d603bc2f2506 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -90,7 +90,7 @@ struct tfp410_priv {
         bool quiet;
 };
 
-static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
+static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 {
         struct tfp410_priv *tfp = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
@@ -127,11 +127,11 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
         return false;
 }
 
-static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
+static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
 {
         struct tfp410_priv *tfp = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        uint8_t out_buf[2];
+        u8 out_buf[2];
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
                 .flags = 0,
@@ -155,7 +155,7 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 
 static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
 {
-        uint8_t ch1, ch2;
+        u8 ch1, ch2;
 
         if (tfp410_readb(dvo, addr+0, &ch1) &&
             tfp410_readb(dvo, addr+1, &ch2))
@@ -203,7 +203,7 @@ out:
 static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
 {
         enum drm_connector_status ret = connector_status_disconnected;
-        uint8_t ctl2;
+        u8 ctl2;
 
         if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) {
                 if (ctl2 & TFP410_CTL_2_RSEN)
@@ -236,7 +236,7 @@ static void tfp410_mode_set(struct intel_dvo_device *dvo,
 /* set the tfp410 power state */
 static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
 {
-        uint8_t ctl1;
+        u8 ctl1;
 
         if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
                 return;
@@ -251,7 +251,7 @@ static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
 
 static bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
 {
-        uint8_t ctl1;
+        u8 ctl1;
 
         if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
                 return false;
@@ -264,7 +264,7 @@ static bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
 
 static void tfp410_dump_regs(struct intel_dvo_device *dvo)
 {
-        uint8_t val, val2;
+        u8 val, val2;
 
         tfp410_readb(dvo, TFP410_REV, &val);
         DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 27f16db8953a..4e142ff49708 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -438,7 +438,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv)
                 int gpio;
                 bool dvoinit;
                 enum pipe pipe;
-                uint32_t dpll[I915_MAX_PIPES];
+                u32 dpll[I915_MAX_PIPES];
                 enum port port;
 
                 /*