diff options
author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2017-11-17 05:41:26 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2017-11-28 03:36:36 -0500 |
commit | acaa51a35828d1188e1917d08a3c8c0447d3109b (patch) | |
tree | 9934c964aaca64d4fde530032c1573f27674d11c | |
parent | 5ba27becdf2c0a62a22d2225b1e205c2eee0ef37 (diff) |
arm64: dts: renesas: r8a77995: Add CAN support
Adds CAN controller nodes for r8a77995.
Based on a patch for r8a7796 by Chris Paterson.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77995.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 0f78592d993c..b2c8db15db53 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi | |||
@@ -346,6 +346,38 @@ | |||
346 | resets = <&cpg 906>; | 346 | resets = <&cpg 906>; |
347 | }; | 347 | }; |
348 | 348 | ||
349 | can0: can@e6c30000 { | ||
350 | compatible = "renesas,can-r8a77995", | ||
351 | "renesas,rcar-gen3-can"; | ||
352 | reg = <0 0xe6c30000 0 0x1000>; | ||
353 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | ||
354 | clocks = <&cpg CPG_MOD 916>, | ||
355 | <&cpg CPG_CORE R8A77995_CLK_CANFD>, | ||
356 | <&can_clk>; | ||
357 | clock-names = "clkp1", "clkp2", "can_clk"; | ||
358 | assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; | ||
359 | assigned-clock-rates = <40000000>; | ||
360 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; | ||
361 | resets = <&cpg 916>; | ||
362 | status = "disabled"; | ||
363 | }; | ||
364 | |||
365 | can1: can@e6c38000 { | ||
366 | compatible = "renesas,can-r8a77995", | ||
367 | "renesas,rcar-gen3-can"; | ||
368 | reg = <0 0xe6c38000 0 0x1000>; | ||
369 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | ||
370 | clocks = <&cpg CPG_MOD 915>, | ||
371 | <&cpg CPG_CORE R8A77995_CLK_CANFD>, | ||
372 | <&can_clk>; | ||
373 | clock-names = "clkp1", "clkp2", "can_clk"; | ||
374 | assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; | ||
375 | assigned-clock-rates = <40000000>; | ||
376 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; | ||
377 | resets = <&cpg 915>; | ||
378 | status = "disabled"; | ||
379 | }; | ||
380 | |||
349 | avb: ethernet@e6800000 { | 381 | avb: ethernet@e6800000 { |
350 | compatible = "renesas,etheravb-r8a77995", | 382 | compatible = "renesas,etheravb-r8a77995", |
351 | "renesas,etheravb-rcar-gen3"; | 383 | "renesas,etheravb-rcar-gen3"; |