diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-09-04 12:13:30 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-09-04 12:14:42 -0400 |
commit | ab66ca27c801605c6bb19baed2933544dd7d39e6 (patch) | |
tree | ffe8a8bbba3b2a059501c660572180e58e92954e | |
parent | 8e50254a6ab2abb6ae08699adffe3d89e4c75912 (diff) |
Revert "uart: pl011: Introduce register look up table"
This reverts commit 2c096a9eedc6841d3610545f4e6c3d72bd0962be as with
this patch the serial console is broken on lots of platforms.
Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/tty/serial/amba-pl011.c | 55 |
1 files changed, 5 insertions, 50 deletions
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index e1f3bd5afad6..29a291d3bf24 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c | |||
@@ -76,7 +76,6 @@ struct vendor_data { | |||
76 | unsigned int ifls; | 76 | unsigned int ifls; |
77 | unsigned int lcrh_tx; | 77 | unsigned int lcrh_tx; |
78 | unsigned int lcrh_rx; | 78 | unsigned int lcrh_rx; |
79 | u16 *reg_lut; | ||
80 | bool oversampling; | 79 | bool oversampling; |
81 | bool dma_threshold; | 80 | bool dma_threshold; |
82 | bool cts_event_workaround; | 81 | bool cts_event_workaround; |
@@ -108,25 +107,6 @@ enum reg_idx { | |||
108 | REG_DMACR = IDX(UART011_DMACR), | 107 | REG_DMACR = IDX(UART011_DMACR), |
109 | }; | 108 | }; |
110 | 109 | ||
111 | static u16 arm_reg[] = { | ||
112 | [REG_DR] = UART01x_DR, | ||
113 | [REG_RSR] = UART01x_RSR, | ||
114 | [REG_ST_DMAWM] = ~0, | ||
115 | [REG_FR] = UART01x_FR, | ||
116 | [REG_ST_LCRH_RX] = ~0, | ||
117 | [REG_ILPR] = UART01x_ILPR, | ||
118 | [REG_IBRD] = UART011_IBRD, | ||
119 | [REG_FBRD] = UART011_FBRD, | ||
120 | [REG_LCRH] = UART011_LCRH, | ||
121 | [REG_CR] = UART011_CR, | ||
122 | [REG_IFLS] = UART011_IFLS, | ||
123 | [REG_IMSC] = UART011_IMSC, | ||
124 | [REG_RIS] = UART011_RIS, | ||
125 | [REG_MIS] = UART011_MIS, | ||
126 | [REG_ICR] = UART011_ICR, | ||
127 | [REG_DMACR] = UART011_DMACR, | ||
128 | }; | ||
129 | |||
130 | static unsigned int get_fifosize_arm(struct amba_device *dev) | 110 | static unsigned int get_fifosize_arm(struct amba_device *dev) |
131 | { | 111 | { |
132 | return amba_rev(dev) < 3 ? 16 : 32; | 112 | return amba_rev(dev) < 3 ? 16 : 32; |
@@ -136,7 +116,6 @@ static struct vendor_data vendor_arm = { | |||
136 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, | 116 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, |
137 | .lcrh_tx = REG_LCRH, | 117 | .lcrh_tx = REG_LCRH, |
138 | .lcrh_rx = REG_LCRH, | 118 | .lcrh_rx = REG_LCRH, |
139 | .reg_lut = arm_reg, | ||
140 | .oversampling = false, | 119 | .oversampling = false, |
141 | .dma_threshold = false, | 120 | .dma_threshold = false, |
142 | .cts_event_workaround = false, | 121 | .cts_event_workaround = false, |
@@ -146,7 +125,6 @@ static struct vendor_data vendor_arm = { | |||
146 | }; | 125 | }; |
147 | 126 | ||
148 | static struct vendor_data vendor_sbsa = { | 127 | static struct vendor_data vendor_sbsa = { |
149 | .reg_lut = arm_reg, | ||
150 | .oversampling = false, | 128 | .oversampling = false, |
151 | .dma_threshold = false, | 129 | .dma_threshold = false, |
152 | .cts_event_workaround = false, | 130 | .cts_event_workaround = false, |
@@ -154,25 +132,6 @@ static struct vendor_data vendor_sbsa = { | |||
154 | .fixed_options = true, | 132 | .fixed_options = true, |
155 | }; | 133 | }; |
156 | 134 | ||
157 | static u16 st_reg[] = { | ||
158 | [REG_DR] = UART01x_DR, | ||
159 | [REG_RSR] = UART01x_RSR, | ||
160 | [REG_ST_DMAWM] = ST_UART011_DMAWM, | ||
161 | [REG_FR] = UART01x_FR, | ||
162 | [REG_ST_LCRH_RX] = ST_UART011_LCRH_RX, | ||
163 | [REG_ILPR] = UART01x_ILPR, | ||
164 | [REG_IBRD] = UART011_IBRD, | ||
165 | [REG_FBRD] = UART011_FBRD, | ||
166 | [REG_LCRH] = UART011_LCRH, | ||
167 | [REG_CR] = UART011_CR, | ||
168 | [REG_IFLS] = UART011_IFLS, | ||
169 | [REG_IMSC] = UART011_IMSC, | ||
170 | [REG_RIS] = UART011_RIS, | ||
171 | [REG_MIS] = UART011_MIS, | ||
172 | [REG_ICR] = UART011_ICR, | ||
173 | [REG_DMACR] = UART011_DMACR, | ||
174 | }; | ||
175 | |||
176 | static unsigned int get_fifosize_st(struct amba_device *dev) | 135 | static unsigned int get_fifosize_st(struct amba_device *dev) |
177 | { | 136 | { |
178 | return 64; | 137 | return 64; |
@@ -182,7 +141,6 @@ static struct vendor_data vendor_st = { | |||
182 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, | 141 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, |
183 | .lcrh_tx = REG_LCRH, | 142 | .lcrh_tx = REG_LCRH, |
184 | .lcrh_rx = REG_ST_LCRH_RX, | 143 | .lcrh_rx = REG_ST_LCRH_RX, |
185 | .reg_lut = st_reg, | ||
186 | .oversampling = true, | 144 | .oversampling = true, |
187 | .dma_threshold = true, | 145 | .dma_threshold = true, |
188 | .cts_event_workaround = true, | 146 | .cts_event_workaround = true, |
@@ -228,7 +186,6 @@ struct uart_amba_port { | |||
228 | struct uart_port port; | 186 | struct uart_port port; |
229 | struct clk *clk; | 187 | struct clk *clk; |
230 | const struct vendor_data *vendor; | 188 | const struct vendor_data *vendor; |
231 | u16 *reg_lut; | ||
232 | unsigned int dmacr; /* dma control reg */ | 189 | unsigned int dmacr; /* dma control reg */ |
233 | unsigned int im; /* interrupt mask */ | 190 | unsigned int im; /* interrupt mask */ |
234 | unsigned int old_status; | 191 | unsigned int old_status; |
@@ -252,19 +209,19 @@ struct uart_amba_port { | |||
252 | static unsigned int pl011_readw(struct uart_amba_port *uap, int index) | 209 | static unsigned int pl011_readw(struct uart_amba_port *uap, int index) |
253 | { | 210 | { |
254 | WARN_ON(index > REG_NR); | 211 | WARN_ON(index > REG_NR); |
255 | return readw_relaxed(uap->port.membase + uap->reg_lut[index]); | 212 | return readw_relaxed(uap->port.membase + (index << 2)); |
256 | } | 213 | } |
257 | 214 | ||
258 | static void pl011_writew(struct uart_amba_port *uap, int val, int index) | 215 | static void pl011_writew(struct uart_amba_port *uap, int val, int index) |
259 | { | 216 | { |
260 | WARN_ON(index > REG_NR); | 217 | WARN_ON(index > REG_NR); |
261 | writew_relaxed(val, uap->port.membase + uap->reg_lut[index]); | 218 | writew_relaxed(val, uap->port.membase + (index << 2)); |
262 | } | 219 | } |
263 | 220 | ||
264 | static void pl011_writeb(struct uart_amba_port *uap, u8 val, int index) | 221 | static void pl011_writeb(struct uart_amba_port *uap, u8 val, int index) |
265 | { | 222 | { |
266 | WARN_ON(index > REG_NR); | 223 | WARN_ON(index > REG_NR); |
267 | writeb_relaxed(val, uap->port.membase + uap->reg_lut[index]); | 224 | writeb_relaxed(val, uap->port.membase + (index << 2)); |
268 | } | 225 | } |
269 | 226 | ||
270 | /* | 227 | /* |
@@ -367,7 +324,7 @@ static void pl011_dma_probe(struct uart_amba_port *uap) | |||
367 | struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); | 324 | struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); |
368 | struct device *dev = uap->port.dev; | 325 | struct device *dev = uap->port.dev; |
369 | struct dma_slave_config tx_conf = { | 326 | struct dma_slave_config tx_conf = { |
370 | .dst_addr = uap->port.mapbase + uap->reg_lut[REG_DR], | 327 | .dst_addr = uap->port.mapbase + REG_DR, |
371 | .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, | 328 | .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, |
372 | .direction = DMA_MEM_TO_DEV, | 329 | .direction = DMA_MEM_TO_DEV, |
373 | .dst_maxburst = uap->fifosize >> 1, | 330 | .dst_maxburst = uap->fifosize >> 1, |
@@ -422,7 +379,7 @@ static void pl011_dma_probe(struct uart_amba_port *uap) | |||
422 | 379 | ||
423 | if (chan) { | 380 | if (chan) { |
424 | struct dma_slave_config rx_conf = { | 381 | struct dma_slave_config rx_conf = { |
425 | .src_addr = uap->port.mapbase + uap->reg_lut[REG_DR], | 382 | .src_addr = uap->port.mapbase + REG_DR, |
426 | .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, | 383 | .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, |
427 | .direction = DMA_DEV_TO_MEM, | 384 | .direction = DMA_DEV_TO_MEM, |
428 | .src_maxburst = uap->fifosize >> 2, | 385 | .src_maxburst = uap->fifosize >> 2, |
@@ -2456,7 +2413,6 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id) | |||
2456 | return PTR_ERR(uap->clk); | 2413 | return PTR_ERR(uap->clk); |
2457 | 2414 | ||
2458 | uap->vendor = vendor; | 2415 | uap->vendor = vendor; |
2459 | uap->reg_lut = vendor->reg_lut; | ||
2460 | uap->lcrh_rx = vendor->lcrh_rx; | 2416 | uap->lcrh_rx = vendor->lcrh_rx; |
2461 | uap->lcrh_tx = vendor->lcrh_tx; | 2417 | uap->lcrh_tx = vendor->lcrh_tx; |
2462 | uap->fifosize = vendor->get_fifosize(dev); | 2418 | uap->fifosize = vendor->get_fifosize(dev); |
@@ -2538,7 +2494,6 @@ static int sbsa_uart_probe(struct platform_device *pdev) | |||
2538 | return -ENOMEM; | 2494 | return -ENOMEM; |
2539 | 2495 | ||
2540 | uap->vendor = &vendor_sbsa; | 2496 | uap->vendor = &vendor_sbsa; |
2541 | uap->reg_lut = vendor_sbsa.reg_lut; | ||
2542 | uap->fifosize = 32; | 2497 | uap->fifosize = 32; |
2543 | uap->port.irq = platform_get_irq(pdev, 0); | 2498 | uap->port.irq = platform_get_irq(pdev, 0); |
2544 | uap->port.ops = &sbsa_uart_pops; | 2499 | uap->port.ops = &sbsa_uart_pops; |