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authorBjorn Helgaas <bhelgaas@google.com>2017-11-14 13:11:32 -0500
committerBjorn Helgaas <bhelgaas@google.com>2017-11-14 13:11:32 -0500
commitaaea12f7fe4c309c8cfa9040cbb3cb02feae0b4d (patch)
tree8027a0f4e456d99314dcd6064c846ddc1a3007b9
parent85a8cf8ebdedc6300c52a1c8f416dc670ab4df6f (diff)
parentfc54bae288182056e9d2431fb1018bf5229ea52d (diff)
Merge branch 'pci/host-iproc' into next
* pci/host-iproc: PCI: iproc: Allow allocation of multiple MSIs
-rw-r--r--drivers/pci/host/pcie-iproc-msi.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/drivers/pci/host/pcie-iproc-msi.c b/drivers/pci/host/pcie-iproc-msi.c
index 2d0f535a2f69..990fc906d73d 100644
--- a/drivers/pci/host/pcie-iproc-msi.c
+++ b/drivers/pci/host/pcie-iproc-msi.c
@@ -179,7 +179,7 @@ static struct irq_chip iproc_msi_irq_chip = {
179 179
180static struct msi_domain_info iproc_msi_domain_info = { 180static struct msi_domain_info iproc_msi_domain_info = {
181 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 181 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
182 MSI_FLAG_PCI_MSIX, 182 MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
183 .chip = &iproc_msi_irq_chip, 183 .chip = &iproc_msi_irq_chip,
184}; 184};
185 185
@@ -237,7 +237,7 @@ static void iproc_msi_irq_compose_msi_msg(struct irq_data *data,
237 addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq); 237 addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq);
238 msg->address_lo = lower_32_bits(addr); 238 msg->address_lo = lower_32_bits(addr);
239 msg->address_hi = upper_32_bits(addr); 239 msg->address_hi = upper_32_bits(addr);
240 msg->data = data->hwirq; 240 msg->data = data->hwirq << 5;
241} 241}
242 242
243static struct irq_chip iproc_msi_bottom_irq_chip = { 243static struct irq_chip iproc_msi_bottom_irq_chip = {
@@ -251,7 +251,7 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain,
251 void *args) 251 void *args)
252{ 252{
253 struct iproc_msi *msi = domain->host_data; 253 struct iproc_msi *msi = domain->host_data;
254 int hwirq; 254 int hwirq, i;
255 255
256 mutex_lock(&msi->bitmap_lock); 256 mutex_lock(&msi->bitmap_lock);
257 257
@@ -267,10 +267,14 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain,
267 267
268 mutex_unlock(&msi->bitmap_lock); 268 mutex_unlock(&msi->bitmap_lock);
269 269
270 irq_domain_set_info(domain, virq, hwirq, &iproc_msi_bottom_irq_chip, 270 for (i = 0; i < nr_irqs; i++) {
271 domain->host_data, handle_simple_irq, NULL, NULL); 271 irq_domain_set_info(domain, virq + i, hwirq + i,
272 &iproc_msi_bottom_irq_chip,
273 domain->host_data, handle_simple_irq,
274 NULL, NULL);
275 }
272 276
273 return 0; 277 return hwirq;
274} 278}
275 279
276static void iproc_msi_irq_domain_free(struct irq_domain *domain, 280static void iproc_msi_irq_domain_free(struct irq_domain *domain,
@@ -302,7 +306,8 @@ static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head)
302 306
303 offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32); 307 offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32);
304 msg = (u32 *)(msi->eq_cpu + offs); 308 msg = (u32 *)(msi->eq_cpu + offs);
305 hwirq = *msg & IPROC_MSI_EQ_MASK; 309 hwirq = readl(msg);
310 hwirq = (hwirq >> 5) + (hwirq & 0x1f);
306 311
307 /* 312 /*
308 * Since we have multiple hwirq mapped to a single MSI vector, 313 * Since we have multiple hwirq mapped to a single MSI vector,