Merge tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.10 merge window:

- Add hwmod interconnect target wrapper module data for crypto
  accelerators for am3xxx, am43xx and dra7

- Add support for dra71x family of SoCs

- PM fixes for omap4/5 needed for omap5 cpuidle

* tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: DRA7: hwmod: Do not register RTC on DRA71
  ARM: OMAP2+: board-generic: add support for DRA71x family
  ARM: AMx3xx: hwmod: Add data for RNG
  ARM: AM43xx: hwmod: Add data for DES
  ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only
  ARM: DRA7: hwmod: Add data for RNG IP
  ARM: DRA7: hwmod: Add data for SHA IP
  ARM: DRA7: hwmod: Add data for AES IP
  ARM: DRA7: hwmod: Add data for DES IP
  ARM: OMAP5: Add basic cpuidle MPU CSWR support
  ARM: OMAP4+: Fix bad fallthrough for cpuidle
  ARM: OMAP5: Fix mpuss_early_init
  ARM: OMAP5: Fix build for PM code

Signed-off-by: Olof Johansson <olof@lixom.net>

17 files changed, 405 insertions, 60 deletions

diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index f53e2ee65e35..454b1bec7542 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -86,6 +86,9 @@ SoCs:
 - DRA722
   compatible = "ti,dra722", "ti,dra72", "ti,dra7"
 
+- DRA718
+  compatible = "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
 - AM5728
   compatible = "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
 
@@ -181,6 +184,9 @@ Boards:
 - DRA722 EVM: Software Development Board for DRA722
   compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"
 
+- DRA718 EVM: Software Development Board for DRA718
+  compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"
+
 - DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth
   compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3"
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 5b37ec29996e..e37ceb81a379 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -80,7 +80,7 @@ endif
 # Power Management
 omap-4-5-pm-common                      = omap-mpuss-lowpower.o
 obj-$(CONFIG_ARCH_OMAP4)                += $(omap-4-5-pm-common)
-obj-$(CONFIG_ARCH_OMAP5)                += $(omap-4-5-pm-common)
+obj-$(CONFIG_SOC_OMAP5)                 += $(omap-4-5-pm-common)
 obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
 
 ifeq ($(CONFIG_PM),y)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index bab814d2f37d..981b23a39f29 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -341,6 +341,7 @@ static const char *const dra72x_boards_compat[] __initconst = {
         "ti,am5718",
         "ti,am5716",
         "ti,dra722",
+        "ti,dra718",
         NULL,
 };
 
diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
index ef9ed36e8a61..6c679659cda5 100644
--- a/arch/arm/mach-omap2/clockdomains7xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
@@ -409,7 +409,7 @@ static struct clockdomain l4sec_7xx_clkdm = {
         .dep_bit          = DRA7XX_L4SEC_STATDEP_SHIFT,
         .wkdep_srcs       = l4sec_wkup_sleep_deps,
         .sleepdep_srcs    = l4sec_wkup_sleep_deps,
-        .flags            = CLKDM_CAN_HWSUP_SWSUP,
+        .flags            = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain l3main1_7xx_clkdm = {
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index deed42e1dd9c..6dcca2957e23 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -262,8 +262,6 @@ extern void __iomem *omap4_get_sar_ram_base(void);
 extern void omap4_mpuss_early_init(void);
 extern void omap_do_wfi(void);
 
-extern void omap4_secondary_startup(void);
-extern void omap4460_secondary_startup(void);
 
 #ifdef CONFIG_SMP
 /* Needed for secondary core boot */
@@ -275,16 +273,11 @@ extern void omap4_cpu_die(unsigned int cpu);
 extern int omap4_cpu_kill(unsigned int cpu);
 
 extern const struct smp_operations omap4_smp_ops;
-
-extern void omap5_secondary_startup(void);
-extern void omap5_secondary_hyp_startup(void);
 #endif
 
 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
 extern int omap4_mpuss_init(void);
 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
-extern int omap4_finish_suspend(unsigned long cpu_state);
-extern void omap4_cpu_resume(void);
 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
 #else
 static inline int omap4_enter_lowpower(unsigned int cpu,
@@ -305,14 +298,41 @@ static inline int omap4_mpuss_init(void)
         return 0;
 }
 
+#endif
+
+#ifdef CONFIG_ARCH_OMAP4
+void omap4_secondary_startup(void);
+void omap4460_secondary_startup(void);
+int omap4_finish_suspend(unsigned long cpu_state);
+void omap4_cpu_resume(void);
+#else
+static inline void omap4_secondary_startup(void)
+{
+}
+
+static inline void omap4460_secondary_startup(void)
+{
+}
 static inline int omap4_finish_suspend(unsigned long cpu_state)
 {
         return 0;
 }
-
 static inline void omap4_cpu_resume(void)
-{}
+{
+}
+#endif
 
+#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
+void omap5_secondary_startup(void);
+void omap5_secondary_hyp_startup(void);
+#else
+static inline void omap5_secondary_startup(void)
+{
+}
+
+static inline void omap5_secondary_hyp_startup(void)
+{
+}
 #endif
 
 void pdata_quirks_init(const struct of_device_id *);
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index fa138d4032b6..a8b291f00109 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -21,6 +21,7 @@
 #include "common.h"
 #include "pm.h"
 #include "prm.h"
+#include "soc.h"
 #include "clockdomain.h"
 
 #define MAX_CPUS        2
@@ -30,6 +31,7 @@ struct idle_statedata {
         u32 cpu_state;
         u32 mpu_logic_state;
         u32 mpu_state;
+        u32 mpu_state_vote;
 };
 
 static struct idle_statedata omap4_idle_data[] = {
@@ -50,12 +52,26 @@ static struct idle_statedata omap4_idle_data[] = {
         },
 };
 
+static struct idle_statedata omap5_idle_data[] = {
+        {
+                .cpu_state = PWRDM_POWER_ON,
+                .mpu_state = PWRDM_POWER_ON,
+                .mpu_logic_state = PWRDM_POWER_ON,
+        },
+        {
+                .cpu_state = PWRDM_POWER_RET,
+                .mpu_state = PWRDM_POWER_RET,
+                .mpu_logic_state = PWRDM_POWER_RET,
+        },
+};
+
 static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
 static struct clockdomain *cpu_clkdm[MAX_CPUS];
 
 static atomic_t abort_barrier;
 static bool cpu_done[MAX_CPUS];
 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
+static DEFINE_RAW_SPINLOCK(mpu_lock);
 
 /* Private functions */
 
@@ -77,6 +93,32 @@ static int omap_enter_idle_simple(struct cpuidle_device *dev,
         return index;
 }
 
+static int omap_enter_idle_smp(struct cpuidle_device *dev,
+                               struct cpuidle_driver *drv,
+                               int index)
+{
+        struct idle_statedata *cx = state_ptr + index;
+        unsigned long flag;
+
+        raw_spin_lock_irqsave(&mpu_lock, flag);
+        cx->mpu_state_vote++;
+        if (cx->mpu_state_vote == num_online_cpus()) {
+                pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
+                omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
+        }
+        raw_spin_unlock_irqrestore(&mpu_lock, flag);
+
+        omap4_enter_lowpower(dev->cpu, cx->cpu_state);
+
+        raw_spin_lock_irqsave(&mpu_lock, flag);
+        if (cx->mpu_state_vote == num_online_cpus())
+                omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON);
+        cx->mpu_state_vote--;
+        raw_spin_unlock_irqrestore(&mpu_lock, flag);
+
+        return index;
+}
+
 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
                         struct cpuidle_driver *drv,
                         int index)
@@ -220,6 +262,32 @@ static struct cpuidle_driver omap4_idle_driver = {
         .safe_state_index = 0,
 };
 
+static struct cpuidle_driver omap5_idle_driver = {
+        .name                           = "omap5_idle",
+        .owner                          = THIS_MODULE,
+        .states = {
+                {
+                        /* C1 - CPU0 ON + CPU1 ON + MPU ON */
+                        .exit_latency = 2 + 2,
+                        .target_residency = 5,
+                        .enter = omap_enter_idle_simple,
+                        .name = "C1",
+                        .desc = "CPUx WFI, MPUSS ON"
+                },
+                {
+                        /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
+                        .exit_latency = 48 + 60,
+                        .target_residency = 100,
+                        .flags = CPUIDLE_FLAG_TIMER_STOP,
+                        .enter = omap_enter_idle_smp,
+                        .name = "C2",
+                        .desc = "CPUx CSWR, MPUSS CSWR",
+                },
+        },
+        .state_count = ARRAY_SIZE(omap5_idle_data),
+        .safe_state_index = 0,
+};
+
 /* Public functions */
 
 /**
@@ -230,6 +298,16 @@ static struct cpuidle_driver omap4_idle_driver = {
  */
 int __init omap4_idle_init(void)
 {
+        struct cpuidle_driver *idle_driver;
+
+        if (soc_is_omap54xx()) {
+                state_ptr = &omap5_idle_data[0];
+                idle_driver = &omap5_idle_driver;
+        } else {
+                state_ptr = &omap4_idle_data[0];
+                idle_driver = &omap4_idle_driver;
+        }
+
         mpu_pd = pwrdm_lookup("mpu_pwrdm");
         cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
         cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
@@ -244,5 +322,5 @@ int __init omap4_idle_init(void)
         /* Configure the broadcast timer on each cpu */
         on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
 
-        return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
+        return cpuidle_register(idle_driver, cpu_online_mask);
 }
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 0e9acdd95d70..f0da5259762a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -717,10 +717,11 @@ void __init omap5_init_early(void)
                               OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
         omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
         omap2_control_base_init();
-        omap4_pm_init_early();
         omap2_prcm_base_init();
         omap5xxx_check_revision();
         omap4_sar_ram_init();
+        omap4_mpuss_early_init();
+        omap4_pm_init_early();
         omap54xx_voltagedomains_init();
         omap54xx_powerdomains_init();
         omap54xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ad982465efd0..7d62ad48c7c9 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -48,6 +48,7 @@
 #include <asm/smp_scu.h>
 #include <asm/pgalloc.h>
 #include <asm/suspend.h>
+#include <asm/virt.h>
 #include <asm/hardware/cache-l2x0.h>
 
 #include "soc.h"
@@ -244,10 +245,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
                 save_state = 1;
                 break;
         case PWRDM_POWER_RET:
-                if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) {
+                if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
                         save_state = 0;
-                        break;
-                }
+                break;
         default:
                 /*
                  * CPUx CSWR is invalid hardware state. Also CPUx OSWR
@@ -371,8 +371,12 @@ int __init omap4_mpuss_init(void)
         pm_info = &per_cpu(omap4_pm_info, 0x0);
         if (sar_base) {
                 pm_info->scu_sar_addr = sar_base + SCU_OFFSET0;
-                pm_info->wkup_sar_addr = sar_base +
-                                        CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
+                if (cpu_is_omap44xx())
+                        pm_info->wkup_sar_addr = sar_base +
+                                CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
+                else
+                        pm_info->wkup_sar_addr = sar_base +
+                                OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
                 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0;
         }
         pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm");
@@ -391,8 +395,12 @@ int __init omap4_mpuss_init(void)
         pm_info = &per_cpu(omap4_pm_info, 0x1);
         if (sar_base) {
                 pm_info->scu_sar_addr = sar_base + SCU_OFFSET1;
-                pm_info->wkup_sar_addr = sar_base +
-                                        CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
+                if (cpu_is_omap44xx())
+                        pm_info->wkup_sar_addr = sar_base +
+                                CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
+                else
+                        pm_info->wkup_sar_addr = sar_base +
+                                OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
                 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;
         }
 
@@ -453,15 +461,24 @@ void __init omap4_mpuss_early_init(void)
 {
         unsigned long startup_pa;
 
-        if (!cpu_is_omap44xx())
+        if (!(cpu_is_omap44xx() || soc_is_omap54xx()))
                 return;
 
         sar_base = omap4_get_sar_ram_base();
 
         if (cpu_is_omap443x())
                 startup_pa = virt_to_phys(omap4_secondary_startup);
-        else
+        else if (cpu_is_omap446x())
                 startup_pa = virt_to_phys(omap4460_secondary_startup);
+        else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
+                startup_pa = virt_to_phys(omap5_secondary_hyp_startup);
+        else
+                startup_pa = virt_to_phys(omap5_secondary_startup);
 
-        writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
+        if (cpu_is_omap44xx())
+                writel_relaxed(startup_pa, sar_base +
+                               CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
+        else
+                writel_relaxed(startup_pa, sar_base +
+                               OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
 }
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index 792b1069f724..5b2966a0f733 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -31,6 +31,8 @@
 /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
 #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET           0xa04
 #define CPU1_WAKEUP_NS_PA_ADDR_OFFSET           0xa08
+#define OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET     0xe00
+#define OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET     0xe04
 
 #define SAR_BACKUP_STATUS_OFFSET                (SAR_BANK3_OFFSET + 0x500)
 #define SAR_SECURE_RAM_SIZE_OFFSET              (SAR_BANK3_OFFSET + 0x504)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
index d3e61d1a02d7..434bd1a77229 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
@@ -68,6 +68,7 @@ extern struct omap_hwmod_ocp_if am33xx_l4_ls__uart6;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__ocmc;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__sha0;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__aes0;
+extern struct omap_hwmod_ocp_if am33xx_l4_per__rng;
 
 extern struct omap_hwmod am33xx_l3_main_hwmod;
 extern struct omap_hwmod am33xx_l3_s_hwmod;
@@ -80,6 +81,7 @@ extern struct omap_hwmod am33xx_gfx_hwmod;
 extern struct omap_hwmod am33xx_prcm_hwmod;
 extern struct omap_hwmod am33xx_aes0_hwmod;
 extern struct omap_hwmod am33xx_sha0_hwmod;
+extern struct omap_hwmod am33xx_rng_hwmod;
 extern struct omap_hwmod am33xx_ocmcram_hwmod;
 extern struct omap_hwmod am33xx_smartreflex0_hwmod;
 extern struct omap_hwmod am33xx_smartreflex1_hwmod;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
index 10dff2f0086a..8236e5c49ec3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
@@ -547,3 +547,11 @@ struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
         .addr           = am33xx_aes0_addrs,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
+
+/* l4 per -> rng */
+struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
+        .master         = &am33xx_l4_ls_hwmod,
+        .slave          = &am33xx_rng_hwmod,
+        .clk            = "rng_fck",
+        .user           = OCP_USER_MPU,
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index e2d84aa7f595..de06a1d5ffab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -268,6 +268,33 @@ struct omap_hwmod am33xx_sha0_hwmod = {
         },
 };
 
+/* rng */
+static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = {
+        .rev_offs       = 0x1fe0,
+        .sysc_offs      = 0x1fe4,
+        .sysc_flags     = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
+        .idlemodes      = SIDLE_FORCE | SIDLE_NO,
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am33xx_rng_hwmod_class = {
+        .name           = "rng",
+        .sysc           = &am33xx_rng_sysc,
+};
+
+struct omap_hwmod am33xx_rng_hwmod = {
+        .name           = "rng",
+        .class          = &am33xx_rng_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE,
+        .main_clk       = "rng_fck",
+        .prcm           = {
+                .omap4  = {
+                        .modulemode     = MODULEMODE_SWCTRL,
+                },
+        },
+};
+
 /* ocmcram */
 static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
         .name = "ocmcram",
@@ -1315,6 +1342,7 @@ static void omap_hwmod_am33xx_clkctrl(void)
         CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
         CLKCTRL(am33xx_sha0_hwmod , AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET);
         CLKCTRL(am33xx_aes0_hwmod , AM33XX_CM_PER_AES0_CLKCTRL_OFFSET);
+        CLKCTRL(am33xx_rng_hwmod, AM33XX_CM_PER_RNG_CLKCTRL_OFFSET);
 }
 
 static void omap_hwmod_am33xx_rst(void)
@@ -1388,6 +1416,7 @@ static void omap_hwmod_am43xx_clkctrl(void)
         CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
         CLKCTRL(am33xx_sha0_hwmod , AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET);
         CLKCTRL(am33xx_aes0_hwmod , AM43XX_CM_PER_AES0_CLKCTRL_OFFSET);
+        CLKCTRL(am33xx_rng_hwmod, AM43XX_CM_PER_RNG_CLKCTRL_OFFSET);
 }
 
 static void omap_hwmod_am43xx_rst(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index e1c2025d6d3e..6dc51a774a26 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -503,41 +503,6 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
         .flags          = OCPIF_SWSUP_IDLE,
 };
 
-/* rng */
-static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = {
-        .rev_offs       = 0x1fe0,
-        .sysc_offs      = 0x1fe4,
-        .sysc_flags     = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
-        .idlemodes      = SIDLE_FORCE | SIDLE_NO,
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class am33xx_rng_hwmod_class = {
-        .name           = "rng",
-        .sysc           = &am33xx_rng_sysc,
-};
-
-static struct omap_hwmod am33xx_rng_hwmod = {
-        .name           = "rng",
-        .class          = &am33xx_rng_hwmod_class,
-        .clkdm_name     = "l4ls_clkdm",
-        .flags          = HWMOD_SWSUP_SIDLE,
-        .main_clk       = "rng_fck",
-        .prcm           = {
-                .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_RNG_CLKCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
-};
-
-static struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
-        .master         = &am33xx_l4_ls_hwmod,
-        .slave          = &am33xx_rng_hwmod,
-        .clk            = "rng_fck",
-        .user           = OCP_USER_MPU,
-};
-
 static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l3_main__emif,
         &am33xx_mpu__l3_main,
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 61f2f301d739..afbce1f6f641 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -442,6 +442,31 @@ static struct omap_hwmod am43xx_adc_tsc_hwmod = {
         },
 };
 
+static struct omap_hwmod_class_sysconfig am43xx_des_sysc = {
+        .rev_offs       = 0x30,
+        .sysc_offs      = 0x34,
+        .syss_offs      = 0x38,
+        .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class am43xx_des_hwmod_class = {
+        .name           = "des",
+        .sysc           = &am43xx_des_sysc,
+};
+
+static struct omap_hwmod am43xx_des_hwmod = {
+        .name           = "des",
+        .class          = &am43xx_des_hwmod_class,
+        .clkdm_name     = "l3_clkdm",
+        .main_clk       = "l3_gclk",
+        .prcm           = {
+                .omap4  = {
+                        .clkctrl_offs   = AM43XX_CM_PER_DES_CLKCTRL_OFFSET,
+                        .modulemode     = MODULEMODE_SWCTRL,
+                },
+        },
+};
+
 /* dss */
 
 static struct omap_hwmod am43xx_dss_core_hwmod = {
@@ -870,6 +895,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__vpfe1 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_ocp_if am43xx_l3_main__des = {
+        .master         = &am33xx_l3_main_hwmod,
+        .slave          = &am43xx_des_hwmod,
+        .clk            = "l3_gclk",
+        .user           = OCP_USER_MPU,
+};
+
 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l4_wkup__synctimer,
         &am43xx_l4_ls__timer8,
@@ -917,6 +949,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l4_per__i2c2,
         &am33xx_l4_per__i2c3,
         &am33xx_l4_per__mailbox,
+        &am33xx_l4_per__rng,
         &am33xx_l4_ls__mcasp0,
         &am33xx_l4_ls__mcasp1,
         &am33xx_l4_ls__mmc0,
@@ -950,6 +983,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_cpgmac0__mdio,
         &am33xx_l3_main__sha0,
         &am33xx_l3_main__aes0,
+        &am43xx_l3_main__des,
         &am43xx_l4_ls__ocp2scp0,
         &am43xx_l4_ls__ocp2scp1,
         &am43xx_l3_s__usbotgss0,
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 1ab7096af8e2..d0585293a381 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -690,6 +690,78 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {
         .parent_hwmod   = &dra7xx_dss_hwmod,
 };
 
+/* AES (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_aes_sysc = {
+        .rev_offs       = 0x0080,
+        .sysc_offs      = 0x0084,
+        .syss_offs      = 0x0088,
+        .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_aes_hwmod_class = {
+        .name   = "aes",
+        .sysc   = &dra7xx_aes_sysc,
+        .rev    = 2,
+};
+
+/* AES1 */
+static struct omap_hwmod dra7xx_aes1_hwmod = {
+        .name           = "aes1",
+        .class          = &dra7xx_aes_hwmod_class,
+        .clkdm_name     = "l4sec_clkdm",
+        .main_clk       = "l3_iclk_div",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = DRA7XX_CM_L4SEC_AES1_CLKCTRL_OFFSET,
+                        .context_offs = DRA7XX_RM_L4SEC_AES1_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
+/* AES2 */
+static struct omap_hwmod dra7xx_aes2_hwmod = {
+        .name           = "aes2",
+        .class          = &dra7xx_aes_hwmod_class,
+        .clkdm_name     = "l4sec_clkdm",
+        .main_clk       = "l3_iclk_div",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = DRA7XX_CM_L4SEC_AES2_CLKCTRL_OFFSET,
+                        .context_offs = DRA7XX_RM_L4SEC_AES2_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
+/* sha0 HIB2 (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = {
+        .rev_offs       = 0x100,
+        .sysc_offs      = 0x110,
+        .syss_offs      = 0x114,
+        .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_sha0_hwmod_class = {
+        .name           = "sham",
+        .sysc           = &dra7xx_sha0_sysc,
+        .rev            = 2,
+};
+
+struct omap_hwmod dra7xx_sha0_hwmod = {
+        .name           = "sham",
+        .class          = &dra7xx_sha0_hwmod_class,
+        .clkdm_name     = "l4sec_clkdm",
+        .main_clk       = "l3_iclk_div",
+        .prcm           = {
+                .omap4 = {
+                        .clkctrl_offs = DRA7XX_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET,
+                        .context_offs = DRA7XX_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
 /*
  * 'elm' class
  *
@@ -2541,6 +2613,62 @@ static struct omap_hwmod dra7xx_uart10_hwmod = {
         },
 };
 
+/* DES (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_des_sysc = {
+        .rev_offs       = 0x0030,
+        .sysc_offs      = 0x0034,
+        .syss_offs      = 0x0038,
+        .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_des_hwmod_class = {
+        .name   = "des",
+        .sysc   = &dra7xx_des_sysc,
+};
+
+/* DES */
+static struct omap_hwmod dra7xx_des_hwmod = {
+        .name           = "des",
+        .class          = &dra7xx_des_hwmod_class,
+        .clkdm_name     = "l4sec_clkdm",
+        .main_clk       = "l3_iclk_div",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = DRA7XX_CM_L4SEC_DES3DES_CLKCTRL_OFFSET,
+                        .context_offs = DRA7XX_RM_L4SEC_DES3DES_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
+/* rng */
+static struct omap_hwmod_class_sysconfig dra7xx_rng_sysc = {
+        .rev_offs       = 0x1fe0,
+        .sysc_offs      = 0x1fe4,
+        .sysc_flags     = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
+        .idlemodes      = SIDLE_FORCE | SIDLE_NO,
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class dra7xx_rng_hwmod_class = {
+        .name           = "rng",
+        .sysc           = &dra7xx_rng_sysc,
+};
+
+static struct omap_hwmod dra7xx_rng_hwmod = {
+        .name           = "rng",
+        .class          = &dra7xx_rng_hwmod_class,
+        .flags          = HWMOD_SWSUP_SIDLE,
+        .clkdm_name     = "l4sec_clkdm",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = DRA7XX_CM_L4SEC_RNG_CLKCTRL_OFFSET,
+                        .context_offs = DRA7XX_RM_L4SEC_RNG_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
 /*
  * 'usb_otg_ss' class
  *
@@ -2929,6 +3057,30 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_1 -> aes1 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes1 = {
+        .master         = &dra7xx_l3_main_1_hwmod,
+        .slave          = &dra7xx_aes1_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l3_main_1 -> aes2 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = {
+        .master         = &dra7xx_l3_main_1_hwmod,
+        .slave          = &dra7xx_aes2_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l3_main_1 -> sha0 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__sha0 = {
+        .master         = &dra7xx_l3_main_1_hwmod,
+        .slave          = &dra7xx_sha0_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> mcasp1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp1 = {
         .master         = &dra7xx_l4_per2_hwmod,
@@ -3642,6 +3794,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per1 -> des */
+static struct omap_hwmod_ocp_if dra7xx_l4_per1__des = {
+        .master         = &dra7xx_l4_per1_hwmod,
+        .slave          = &dra7xx_des_hwmod,
+        .clk            = "l3_iclk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> uart8 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = {
         .master         = &dra7xx_l4_per2_hwmod,
@@ -3666,6 +3826,13 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__uart10 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per1 -> rng */
+static struct omap_hwmod_ocp_if dra7xx_l4_per1__rng = {
+        .master         = &dra7xx_l4_per1_hwmod,
+        .slave          = &dra7xx_rng_hwmod,
+        .user           = OCP_USER_MPU,
+};
+
 /* l4_per3 -> usb_otg_ss1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = {
         .master         = &dra7xx_l4_per3_hwmod,
@@ -3800,6 +3967,9 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
         &dra7xx_l3_main_1__dss,
         &dra7xx_l3_main_1__dispc,
         &dra7xx_l3_main_1__hdmi,
+        &dra7xx_l3_main_1__aes1,
+        &dra7xx_l3_main_1__aes2,
+        &dra7xx_l3_main_1__sha0,
         &dra7xx_l4_per1__elm,
         &dra7xx_l4_wkup__gpio1,
         &dra7xx_l4_per1__gpio2,
@@ -3845,7 +4015,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
         &dra7xx_l3_main_1__pciess2,
         &dra7xx_l4_cfg__pciess2,
         &dra7xx_l3_main_1__qspi,
-        &dra7xx_l4_per3__rtcss,
         &dra7xx_l4_cfg__sata,
         &dra7xx_l4_cfg__smartreflex_core,
         &dra7xx_l4_cfg__smartreflex_mpu,
@@ -3875,6 +4044,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
         &dra7xx_l4_per2__uart8,
         &dra7xx_l4_per2__uart9,
         &dra7xx_l4_wkup__uart10,
+        &dra7xx_l4_per1__des,
         &dra7xx_l4_per3__usb_otg_ss1,
         &dra7xx_l4_per3__usb_otg_ss2,
         &dra7xx_l4_per3__usb_otg_ss3,
@@ -3892,6 +4062,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 /* GP-only hwmod links */
 static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
         &dra7xx_l4_wkup__timer12,
+        &dra7xx_l4_per1__rng,
         NULL,
 };
 
@@ -3905,6 +4076,11 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
         NULL,
 };
 
+static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = {
+        &dra7xx_l4_per3__rtcss,
+        NULL,
+};
+
 int __init dra7xx_hwmod_init(void)
 {
         int ret;
@@ -3920,5 +4096,9 @@ int __init dra7xx_hwmod_init(void)
         if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
                 ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
 
+        /* now for the IPs *NOT* in dra71 */
+        if (!ret && !of_machine_is_compatible("ti,dra718"))
+                ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
+
         return ret;
 }
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 178e22c146b7..b3870220612e 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -287,7 +287,7 @@ int __init omap4_pm_init(void)
         /* Overwrite the default cpu_do_idle() */
         arm_pm_idle = omap_default_idle;
 
-        if (cpu_is_omap44xx())
+        if (cpu_is_omap44xx() || soc_is_omap54xx())
                 omap4_idle_init();
 
 err2:
diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index babb5db5a3a4..e2ad14e77064 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -92,6 +92,7 @@
 #define AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET           0x04b8
 #define AM43XX_CM_PER_MMC0_CLKCTRL_OFFSET               0x04c0
 #define AM43XX_CM_PER_MMC1_CLKCTRL_OFFSET               0x04c8
+#define AM43XX_CM_PER_RNG_CLKCTRL_OFFSET                0x04e0
 #define AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET               0x0500
 #define AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET               0x0508
 #define AM43XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET           0x0528
@@ -133,6 +134,7 @@
 #define AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET            0x0050
 #define AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET               0x0058
 #define AM43XX_CM_PER_AES0_CLKCTRL_OFFSET               0x0028
+#define AM43XX_CM_PER_DES_CLKCTRL_OFFSET                0x0030
 #define AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET             0x0560
 #define AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET             0x0568
 #define AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET            0x0570