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authorOlof Johansson <olof@lixom.net>2019-04-07 18:15:31 -0400
committerOlof Johansson <olof@lixom.net>2019-04-07 18:15:31 -0400
commita97082852f69e1411afae12df5e7a939bd258549 (patch)
tree1c0aaa7f9181f04cc691e26b5730ddc2dce37787
parent3e372088abaa24509b752326f9e0687952f86578 (diff)
parent1a96665143c355b1019ed13b927266185d2a1e4f (diff)
Merge tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Fixes for dtc warnings, fixes for ethernet transfers on rk3328, sd-card related fixes on both rk3328 ans rk3288-tinker and a regulator fix on rock64 and making ddc actually work on the Rock PI 4 due to missing the ddc bus. * tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Remove #address/#size-cells from rk3288-veyron gpio-keys ARM: dts: rockchip: Remove #address/#size-cells from rk3288 mipi_dsi ARM: dts: rockchip: Fix gpu opp node names for rk3288 arm64: dts: rockchip: fix rk3328 sdmmc0 write errors arm64: dts: rockchip: fix rk3328 rgmii high tx error rate ARM: dts: rockchip: Fix SD card detection on rk3288-tinker arm64: dts: rockchip: Fix vcc_host1_5v GPIO polarity on rk3328-rock64 ARM: dts: rockchip: fix rk3288 cpu opp node reference arm64: dts: rockchip: add DDC bus on Rock Pi 4 arm64: dts: rockchip: fix rk3328-roc-cc gmac2io tx/rx_delay Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/rk3288-tinker.dtsi3
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi2
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi20
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts4
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-rock64.dts3
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi58
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts1
7 files changed, 44 insertions, 47 deletions
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index aa107ee41b8b..ef653c3209bc 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -254,6 +254,7 @@
254 }; 254 };
255 255
256 vccio_sd: LDO_REG5 { 256 vccio_sd: LDO_REG5 {
257 regulator-boot-on;
257 regulator-min-microvolt = <1800000>; 258 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <3300000>; 259 regulator-max-microvolt = <3300000>;
259 regulator-name = "vccio_sd"; 260 regulator-name = "vccio_sd";
@@ -430,7 +431,7 @@
430 bus-width = <4>; 431 bus-width = <4>;
431 cap-mmc-highspeed; 432 cap-mmc-highspeed;
432 cap-sd-highspeed; 433 cap-sd-highspeed;
433 card-detect-delay = <200>; 434 broken-cd;
434 disable-wp; /* wp not hooked up */ 435 disable-wp; /* wp not hooked up */
435 pinctrl-names = "default"; 436 pinctrl-names = "default";
436 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 437 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 0bc2409f6903..192dbc089ade 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -25,8 +25,6 @@
25 25
26 gpio_keys: gpio-keys { 26 gpio_keys: gpio-keys {
27 compatible = "gpio-keys"; 27 compatible = "gpio-keys";
28 #address-cells = <1>;
29 #size-cells = <0>;
30 28
31 pinctrl-names = "default"; 29 pinctrl-names = "default";
32 pinctrl-0 = <&pwr_key_l>; 30 pinctrl-0 = <&pwr_key_l>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ca7d52daa8fb..a024d1e7e74c 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -70,7 +70,7 @@
70 compatible = "arm,cortex-a12"; 70 compatible = "arm,cortex-a12";
71 reg = <0x501>; 71 reg = <0x501>;
72 resets = <&cru SRST_CORE1>; 72 resets = <&cru SRST_CORE1>;
73 operating-points = <&cpu_opp_table>; 73 operating-points-v2 = <&cpu_opp_table>;
74 #cooling-cells = <2>; /* min followed by max */ 74 #cooling-cells = <2>; /* min followed by max */
75 clock-latency = <40000>; 75 clock-latency = <40000>;
76 clocks = <&cru ARMCLK>; 76 clocks = <&cru ARMCLK>;
@@ -80,7 +80,7 @@
80 compatible = "arm,cortex-a12"; 80 compatible = "arm,cortex-a12";
81 reg = <0x502>; 81 reg = <0x502>;
82 resets = <&cru SRST_CORE2>; 82 resets = <&cru SRST_CORE2>;
83 operating-points = <&cpu_opp_table>; 83 operating-points-v2 = <&cpu_opp_table>;
84 #cooling-cells = <2>; /* min followed by max */ 84 #cooling-cells = <2>; /* min followed by max */
85 clock-latency = <40000>; 85 clock-latency = <40000>;
86 clocks = <&cru ARMCLK>; 86 clocks = <&cru ARMCLK>;
@@ -90,7 +90,7 @@
90 compatible = "arm,cortex-a12"; 90 compatible = "arm,cortex-a12";
91 reg = <0x503>; 91 reg = <0x503>;
92 resets = <&cru SRST_CORE3>; 92 resets = <&cru SRST_CORE3>;
93 operating-points = <&cpu_opp_table>; 93 operating-points-v2 = <&cpu_opp_table>;
94 #cooling-cells = <2>; /* min followed by max */ 94 #cooling-cells = <2>; /* min followed by max */
95 clock-latency = <40000>; 95 clock-latency = <40000>;
96 clocks = <&cru ARMCLK>; 96 clocks = <&cru ARMCLK>;
@@ -1119,8 +1119,6 @@
1119 clock-names = "ref", "pclk"; 1119 clock-names = "ref", "pclk";
1120 power-domains = <&power RK3288_PD_VIO>; 1120 power-domains = <&power RK3288_PD_VIO>;
1121 rockchip,grf = <&grf>; 1121 rockchip,grf = <&grf>;
1122 #address-cells = <1>;
1123 #size-cells = <0>;
1124 status = "disabled"; 1122 status = "disabled";
1125 1123
1126 ports { 1124 ports {
@@ -1282,27 +1280,27 @@
1282 gpu_opp_table: gpu-opp-table { 1280 gpu_opp_table: gpu-opp-table {
1283 compatible = "operating-points-v2"; 1281 compatible = "operating-points-v2";
1284 1282
1285 opp@100000000 { 1283 opp-100000000 {
1286 opp-hz = /bits/ 64 <100000000>; 1284 opp-hz = /bits/ 64 <100000000>;
1287 opp-microvolt = <950000>; 1285 opp-microvolt = <950000>;
1288 }; 1286 };
1289 opp@200000000 { 1287 opp-200000000 {
1290 opp-hz = /bits/ 64 <200000000>; 1288 opp-hz = /bits/ 64 <200000000>;
1291 opp-microvolt = <950000>; 1289 opp-microvolt = <950000>;
1292 }; 1290 };
1293 opp@300000000 { 1291 opp-300000000 {
1294 opp-hz = /bits/ 64 <300000000>; 1292 opp-hz = /bits/ 64 <300000000>;
1295 opp-microvolt = <1000000>; 1293 opp-microvolt = <1000000>;
1296 }; 1294 };
1297 opp@400000000 { 1295 opp-400000000 {
1298 opp-hz = /bits/ 64 <400000000>; 1296 opp-hz = /bits/ 64 <400000000>;
1299 opp-microvolt = <1100000>; 1297 opp-microvolt = <1100000>;
1300 }; 1298 };
1301 opp@500000000 { 1299 opp-500000000 {
1302 opp-hz = /bits/ 64 <500000000>; 1300 opp-hz = /bits/ 64 <500000000>;
1303 opp-microvolt = <1200000>; 1301 opp-microvolt = <1200000>;
1304 }; 1302 };
1305 opp@600000000 { 1303 opp-600000000 {
1306 opp-hz = /bits/ 64 <600000000>; 1304 opp-hz = /bits/ 64 <600000000>;
1307 opp-microvolt = <1250000>; 1305 opp-microvolt = <1250000>;
1308 }; 1306 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
index 33c44e857247..0e34354b2092 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -108,8 +108,8 @@
108 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 108 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
109 snps,reset-active-low; 109 snps,reset-active-low;
110 snps,reset-delays-us = <0 10000 50000>; 110 snps,reset-delays-us = <0 10000 50000>;
111 tx_delay = <0x25>; 111 tx_delay = <0x24>;
112 rx_delay = <0x11>; 112 rx_delay = <0x18>;
113 status = "okay"; 113 status = "okay";
114}; 114};
115 115
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 2157a528276b..79b4d1d4b5d6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -46,8 +46,7 @@
46 46
47 vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { 47 vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
48 compatible = "regulator-fixed"; 48 compatible = "regulator-fixed";
49 enable-active-high; 49 gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
50 gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
51 pinctrl-names = "default"; 50 pinctrl-names = "default";
52 pinctrl-0 = <&usb20_host_drv>; 51 pinctrl-0 = <&usb20_host_drv>;
53 regulator-name = "vcc_host1_5v"; 52 regulator-name = "vcc_host1_5v";
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 84f14b132e8f..dabef1a21649 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1445,11 +1445,11 @@
1445 1445
1446 sdmmc0 { 1446 sdmmc0 {
1447 sdmmc0_clk: sdmmc0-clk { 1447 sdmmc0_clk: sdmmc0-clk {
1448 rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>; 1448 rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
1449 }; 1449 };
1450 1450
1451 sdmmc0_cmd: sdmmc0-cmd { 1451 sdmmc0_cmd: sdmmc0-cmd {
1452 rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>; 1452 rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
1453 }; 1453 };
1454 1454
1455 sdmmc0_dectn: sdmmc0-dectn { 1455 sdmmc0_dectn: sdmmc0-dectn {
@@ -1461,14 +1461,14 @@
1461 }; 1461 };
1462 1462
1463 sdmmc0_bus1: sdmmc0-bus1 { 1463 sdmmc0_bus1: sdmmc0-bus1 {
1464 rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>; 1464 rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
1465 }; 1465 };
1466 1466
1467 sdmmc0_bus4: sdmmc0-bus4 { 1467 sdmmc0_bus4: sdmmc0-bus4 {
1468 rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>, 1468 rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
1469 <1 RK_PA1 1 &pcfg_pull_up_4ma>, 1469 <1 RK_PA1 1 &pcfg_pull_up_8ma>,
1470 <1 RK_PA2 1 &pcfg_pull_up_4ma>, 1470 <1 RK_PA2 1 &pcfg_pull_up_8ma>,
1471 <1 RK_PA3 1 &pcfg_pull_up_4ma>; 1471 <1 RK_PA3 1 &pcfg_pull_up_8ma>;
1472 }; 1472 };
1473 1473
1474 sdmmc0_gpio: sdmmc0-gpio { 1474 sdmmc0_gpio: sdmmc0-gpio {
@@ -1642,50 +1642,50 @@
1642 rgmiim1_pins: rgmiim1-pins { 1642 rgmiim1_pins: rgmiim1-pins {
1643 rockchip,pins = 1643 rockchip,pins =
1644 /* mac_txclk */ 1644 /* mac_txclk */
1645 <1 RK_PB4 2 &pcfg_pull_none_12ma>, 1645 <1 RK_PB4 2 &pcfg_pull_none_8ma>,
1646 /* mac_rxclk */ 1646 /* mac_rxclk */
1647 <1 RK_PB5 2 &pcfg_pull_none_2ma>, 1647 <1 RK_PB5 2 &pcfg_pull_none_4ma>,
1648 /* mac_mdio */ 1648 /* mac_mdio */
1649 <1 RK_PC3 2 &pcfg_pull_none_2ma>, 1649 <1 RK_PC3 2 &pcfg_pull_none_4ma>,
1650 /* mac_txen */ 1650 /* mac_txen */
1651 <1 RK_PD1 2 &pcfg_pull_none_12ma>, 1651 <1 RK_PD1 2 &pcfg_pull_none_8ma>,
1652 /* mac_clk */ 1652 /* mac_clk */
1653 <1 RK_PC5 2 &pcfg_pull_none_2ma>, 1653 <1 RK_PC5 2 &pcfg_pull_none_4ma>,
1654 /* mac_rxdv */ 1654 /* mac_rxdv */
1655 <1 RK_PC6 2 &pcfg_pull_none_2ma>, 1655 <1 RK_PC6 2 &pcfg_pull_none_4ma>,
1656 /* mac_mdc */ 1656 /* mac_mdc */
1657 <1 RK_PC7 2 &pcfg_pull_none_2ma>, 1657 <1 RK_PC7 2 &pcfg_pull_none_4ma>,
1658 /* mac_rxd1 */ 1658 /* mac_rxd1 */
1659 <1 RK_PB2 2 &pcfg_pull_none_2ma>, 1659 <1 RK_PB2 2 &pcfg_pull_none_4ma>,
1660 /* mac_rxd0 */ 1660 /* mac_rxd0 */
1661 <1 RK_PB3 2 &pcfg_pull_none_2ma>, 1661 <1 RK_PB3 2 &pcfg_pull_none_4ma>,
1662 /* mac_txd1 */ 1662 /* mac_txd1 */
1663 <1 RK_PB0 2 &pcfg_pull_none_12ma>, 1663 <1 RK_PB0 2 &pcfg_pull_none_8ma>,
1664 /* mac_txd0 */ 1664 /* mac_txd0 */
1665 <1 RK_PB1 2 &pcfg_pull_none_12ma>, 1665 <1 RK_PB1 2 &pcfg_pull_none_8ma>,
1666 /* mac_rxd3 */ 1666 /* mac_rxd3 */
1667 <1 RK_PB6 2 &pcfg_pull_none_2ma>, 1667 <1 RK_PB6 2 &pcfg_pull_none_4ma>,
1668 /* mac_rxd2 */ 1668 /* mac_rxd2 */
1669 <1 RK_PB7 2 &pcfg_pull_none_2ma>, 1669 <1 RK_PB7 2 &pcfg_pull_none_4ma>,
1670 /* mac_txd3 */ 1670 /* mac_txd3 */
1671 <1 RK_PC0 2 &pcfg_pull_none_12ma>, 1671 <1 RK_PC0 2 &pcfg_pull_none_8ma>,
1672 /* mac_txd2 */ 1672 /* mac_txd2 */
1673 <1 RK_PC1 2 &pcfg_pull_none_12ma>, 1673 <1 RK_PC1 2 &pcfg_pull_none_8ma>,
1674 1674
1675 /* mac_txclk */ 1675 /* mac_txclk */
1676 <0 RK_PB0 1 &pcfg_pull_none>, 1676 <0 RK_PB0 1 &pcfg_pull_none_8ma>,
1677 /* mac_txen */ 1677 /* mac_txen */
1678 <0 RK_PB4 1 &pcfg_pull_none>, 1678 <0 RK_PB4 1 &pcfg_pull_none_8ma>,
1679 /* mac_clk */ 1679 /* mac_clk */
1680 <0 RK_PD0 1 &pcfg_pull_none>, 1680 <0 RK_PD0 1 &pcfg_pull_none_4ma>,
1681 /* mac_txd1 */ 1681 /* mac_txd1 */
1682 <0 RK_PC0 1 &pcfg_pull_none>, 1682 <0 RK_PC0 1 &pcfg_pull_none_8ma>,
1683 /* mac_txd0 */ 1683 /* mac_txd0 */
1684 <0 RK_PC1 1 &pcfg_pull_none>, 1684 <0 RK_PC1 1 &pcfg_pull_none_8ma>,
1685 /* mac_txd3 */ 1685 /* mac_txd3 */
1686 <0 RK_PC7 1 &pcfg_pull_none>, 1686 <0 RK_PC7 1 &pcfg_pull_none_8ma>,
1687 /* mac_txd2 */ 1687 /* mac_txd2 */
1688 <0 RK_PC6 1 &pcfg_pull_none>; 1688 <0 RK_PC6 1 &pcfg_pull_none_8ma>;
1689 }; 1689 };
1690 1690
1691 rmiim1_pins: rmiim1-pins { 1691 rmiim1_pins: rmiim1-pins {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
index 4a543f2117d4..844eac939a97 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
@@ -158,6 +158,7 @@
158}; 158};
159 159
160&hdmi { 160&hdmi {
161 ddc-i2c-bus = <&i2c3>;
161 pinctrl-names = "default"; 162 pinctrl-names = "default";
162 pinctrl-0 = <&hdmi_cec>; 163 pinctrl-0 = <&hdmi_cec>;
163 status = "okay"; 164 status = "okay";