aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPhilipp Zabel <p.zabel@pengutronix.de>2016-08-29 02:32:03 -0400
committerPhilipp Zabel <p.zabel@pengutronix.de>2016-10-20 08:40:21 -0400
commita92d81456c08ea6917a7630718837f0a01cbd0d0 (patch)
treeaed5d45b049d1509ee64d31c90ce0fa337c79349
parenteae13c9337e2bba0f59b1723114e73be18499c5b (diff)
gpu: ipu-v3: initially clear all interrupts
If we want to stop resetting the IPU in the future, masking all interrupts before registering the irq handlers will not be enough to avoid spurious interrupts. We also have to clear them. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
-rw-r--r--drivers/gpu/ipu-v3/ipu-common.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index b7d7bd6e3d60..97218af4fe75 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1286,8 +1286,11 @@ static int ipu_irq_init(struct ipu_soc *ipu)
1286 return ret; 1286 return ret;
1287 } 1287 }
1288 1288
1289 for (i = 0; i < IPU_NUM_IRQS; i += 32) 1289 /* Mask and clear all interrupts */
1290 for (i = 0; i < IPU_NUM_IRQS; i += 32) {
1290 ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32)); 1291 ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));
1292 ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32));
1293 }
1291 1294
1292 for (i = 0; i < IPU_NUM_IRQS; i += 32) { 1295 for (i = 0; i < IPU_NUM_IRQS; i += 32) {
1293 gc = irq_get_domain_generic_chip(ipu->domain, i); 1296 gc = irq_get_domain_generic_chip(ipu->domain, i);