diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-05-31 05:08:45 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2016-07-07 04:21:27 -0400 |
commit | a9003187a984ea835b5533165d97733303c5399e (patch) | |
tree | 79e320df9d9ae4169c8d63ef0b4f795e832461af | |
parent | 56aebae0003f8987cf1f07238ec9e6243fe88080 (diff) |
arm64: dts: r8a7796: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 85f0843ddd87..fab61eddede3 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi | |||
@@ -122,7 +122,7 @@ | |||
122 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | 122 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
123 | <&scif_clk>; | 123 | <&scif_clk>; |
124 | clock-names = "fck", "brg_int", "scif_clk"; | 124 | clock-names = "fck", "brg_int", "scif_clk"; |
125 | power-domains = <&cpg>; | 125 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
126 | status = "disabled"; | 126 | status = "disabled"; |
127 | }; | 127 | }; |
128 | }; | 128 | }; |