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authorJani Nikula <jani.nikula@intel.com>2017-10-09 05:29:59 -0400
committerJani Nikula <jani.nikula@intel.com>2017-10-11 15:04:33 -0400
commita8a08886ef8c6a5a740e50e3897466cfd11724ff (patch)
tree39bb36348d3903e6a1ebdb084c58ff4b59865210
parentfc603ca7f81d729bbec7ced294f25a93113c49f7 (diff)
drm/i915/dp: limit sink rates based on rate
Get rid of redundant intel_dp_num_rates(). We can simply look at the rate and limit based on that. Cc: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: <manasi.d.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171009092959.29021-3-jani.nikula@intel.com
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c26
1 files changed, 7 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 09d75df497c0..b0f446b68f42 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -137,32 +137,20 @@ static void vlv_steal_power_sequencer(struct drm_device *dev,
137 enum pipe pipe); 137 enum pipe pipe);
138static void intel_dp_unset_edid(struct intel_dp *intel_dp); 138static void intel_dp_unset_edid(struct intel_dp *intel_dp);
139 139
140static int intel_dp_num_rates(u8 link_bw_code)
141{
142 switch (link_bw_code) {
143 default:
144 WARN(1, "invalid max DP link bw val %x, using 1.62Gbps\n",
145 link_bw_code);
146 case DP_LINK_BW_1_62:
147 return 1;
148 case DP_LINK_BW_2_7:
149 return 2;
150 case DP_LINK_BW_5_4:
151 return 3;
152 }
153}
154
155/* update sink rates from dpcd */ 140/* update sink rates from dpcd */
156static void intel_dp_set_sink_rates(struct intel_dp *intel_dp) 141static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)
157{ 142{
158 int i, num_rates; 143 int i, max_rate;
159 144
160 num_rates = intel_dp_num_rates(intel_dp->dpcd[DP_MAX_LINK_RATE]); 145 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
161 146
162 for (i = 0; i < num_rates; i++) 147 for (i = 0; i < ARRAY_SIZE(default_rates); i++) {
148 if (default_rates[i] > max_rate)
149 break;
163 intel_dp->sink_rates[i] = default_rates[i]; 150 intel_dp->sink_rates[i] = default_rates[i];
151 }
164 152
165 intel_dp->num_sink_rates = num_rates; 153 intel_dp->num_sink_rates = i;
166} 154}
167 155
168/* Theoretical max between source and sink */ 156/* Theoretical max between source and sink */