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authorRex Zhu <Rex.Zhu@amd.com>2016-06-28 04:22:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-06-29 12:12:26 -0400
commita7f14a184e0e8e94becfc3f9608f6b0f9c339572 (patch)
treea784597665cb1ab3c7ce2af1ca141396098eb502
parentd9d533c1483c4daf76e7e720c35896a430563ff8 (diff)
drm/amd/powerplay: workaround for UVD clock issue
workaround issue that when uvd dpm disabled, uvd clock remain high on polaris10. Manually turn off the clocks. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index e19520c4b4b6..d9c88d13f8db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1106,6 +1106,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
1106 if (fences == 0 && handles == 0) { 1106 if (fences == 0 && handles == 0) {
1107 if (adev->pm.dpm_enabled) { 1107 if (adev->pm.dpm_enabled) {
1108 amdgpu_dpm_enable_uvd(adev, false); 1108 amdgpu_dpm_enable_uvd(adev, false);
1109 /* just work around for uvd clock remain high even
1110 * when uvd dpm disabled on Polaris10 */
1111 if (adev->asic_type == CHIP_POLARIS10)
1112 amdgpu_asic_set_uvd_clocks(adev, 0, 0);
1109 } else { 1113 } else {
1110 amdgpu_asic_set_uvd_clocks(adev, 0, 0); 1114 amdgpu_asic_set_uvd_clocks(adev, 0, 0);
1111 } 1115 }