diff options
author | Kenneth Feng <kenneth.feng@amd.com> | 2019-01-18 05:08:19 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-01-25 16:15:35 -0500 |
commit | a7cd97718166be64b3359f586bbe0a6bb64a6ba4 (patch) | |
tree | 9e7ebdd1e2c10908c6eb91191c6854fd3dafaf88 | |
parent | f14899fd2a560796450e9af383dfaee6ce557d6b (diff) |
drm/amd/powerplay: OD setting fix on Vega10
gfxclk for OD setting is limited to 1980M for non-acg
ASICs of Vega10
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c index b8747a5c9204..99d596dc0e89 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include "vega10_pptable.h" | 32 | #include "vega10_pptable.h" |
33 | 33 | ||
34 | #define NUM_DSPCLK_LEVELS 8 | 34 | #define NUM_DSPCLK_LEVELS 8 |
35 | #define VEGA10_ENGINECLOCK_HARDMAX 198000 | ||
35 | 36 | ||
36 | static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable, | 37 | static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable, |
37 | enum phm_platform_caps cap) | 38 | enum phm_platform_caps cap) |
@@ -258,7 +259,26 @@ static int init_over_drive_limits( | |||
258 | struct pp_hwmgr *hwmgr, | 259 | struct pp_hwmgr *hwmgr, |
259 | const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) | 260 | const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) |
260 | { | 261 | { |
261 | hwmgr->platform_descriptor.overdriveLimit.engineClock = | 262 | const ATOM_Vega10_GFXCLK_Dependency_Table *gfxclk_dep_table = |
263 | (const ATOM_Vega10_GFXCLK_Dependency_Table *) | ||
264 | (((unsigned long) powerplay_table) + | ||
265 | le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset)); | ||
266 | bool is_acg_enabled = false; | ||
267 | ATOM_Vega10_GFXCLK_Dependency_Record_V2 *patom_record_v2; | ||
268 | |||
269 | if (gfxclk_dep_table->ucRevId == 1) { | ||
270 | patom_record_v2 = | ||
271 | (ATOM_Vega10_GFXCLK_Dependency_Record_V2 *)gfxclk_dep_table->entries; | ||
272 | is_acg_enabled = | ||
273 | (bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable; | ||
274 | } | ||
275 | |||
276 | if (powerplay_table->ulMaxODEngineClock > VEGA10_ENGINECLOCK_HARDMAX && | ||
277 | !is_acg_enabled) | ||
278 | hwmgr->platform_descriptor.overdriveLimit.engineClock = | ||
279 | VEGA10_ENGINECLOCK_HARDMAX; | ||
280 | else | ||
281 | hwmgr->platform_descriptor.overdriveLimit.engineClock = | ||
262 | le32_to_cpu(powerplay_table->ulMaxODEngineClock); | 282 | le32_to_cpu(powerplay_table->ulMaxODEngineClock); |
263 | hwmgr->platform_descriptor.overdriveLimit.memoryClock = | 283 | hwmgr->platform_descriptor.overdriveLimit.memoryClock = |
264 | le32_to_cpu(powerplay_table->ulMaxODMemoryClock); | 284 | le32_to_cpu(powerplay_table->ulMaxODMemoryClock); |