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author | Russell King <rmk+kernel@armlinux.org.uk> | 2018-05-11 06:15:29 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@armlinux.org.uk> | 2018-05-31 18:27:16 -0400 |
commit | a78d156587931a2c3b354534aa772febf6c9e855 (patch) | |
tree | e76fd07a3833a1e3a91ad3c86a19a736a39033f4 | |
parent | add5609877c6785cc002c6ed7e008b1d61064439 (diff) |
ARM: spectre-v1: add speculation barrier (csdb) macros
Add assembly and C macros for the new CSDB instruction.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/include/asm/assembler.h | 8 | ||||
-rw-r--r-- | arch/arm/include/asm/barrier.h | 13 |
2 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index bc8d4bbd82e2..ef1386b1af9b 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -447,6 +447,14 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) | |||
447 | .size \name , . - \name | 447 | .size \name , . - \name |
448 | .endm | 448 | .endm |
449 | 449 | ||
450 | .macro csdb | ||
451 | #ifdef CONFIG_THUMB2_KERNEL | ||
452 | .inst.w 0xf3af8014 | ||
453 | #else | ||
454 | .inst 0xe320f014 | ||
455 | #endif | ||
456 | .endm | ||
457 | |||
450 | .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req | 458 | .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req |
451 | #ifndef CONFIG_CPU_USE_DOMAINS | 459 | #ifndef CONFIG_CPU_USE_DOMAINS |
452 | adds \tmp, \addr, #\size - 1 | 460 | adds \tmp, \addr, #\size - 1 |
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h index 40f5c410fd8c..3d9c1d4b7e75 100644 --- a/arch/arm/include/asm/barrier.h +++ b/arch/arm/include/asm/barrier.h | |||
@@ -17,6 +17,12 @@ | |||
17 | #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") | 17 | #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") |
18 | #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") | 18 | #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") |
19 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") | 19 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") |
20 | #ifdef CONFIG_THUMB2_KERNEL | ||
21 | #define CSDB ".inst.w 0xf3af8014" | ||
22 | #else | ||
23 | #define CSDB ".inst 0xe320f014" | ||
24 | #endif | ||
25 | #define csdb() __asm__ __volatile__(CSDB : : : "memory") | ||
20 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 | 26 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 |
21 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ | 27 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
22 | : : "r" (0) : "memory") | 28 | : : "r" (0) : "memory") |
@@ -37,6 +43,13 @@ | |||
37 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") | 43 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
38 | #endif | 44 | #endif |
39 | 45 | ||
46 | #ifndef CSDB | ||
47 | #define CSDB | ||
48 | #endif | ||
49 | #ifndef csdb | ||
50 | #define csdb() | ||
51 | #endif | ||
52 | |||
40 | #ifdef CONFIG_ARM_HEAVY_MB | 53 | #ifdef CONFIG_ARM_HEAVY_MB |
41 | extern void (*soc_mb)(void); | 54 | extern void (*soc_mb)(void); |
42 | extern void arm_heavy_mb(void); | 55 | extern void arm_heavy_mb(void); |