ARM: dts: am57xx-beagle-x15: Add dual ethernet

Add CPSW DT binding to beagle X15 DTS in order to
get ethernet working with this board.

Note that we're also adding sleep state which will
place all pins in mux mode 15 - which means "driver
off" - thus conserving power.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 106 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 49edbda68cd5..6c2e8e41b1e9 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -140,6 +140,86 @@
                 >;
         };
 
+        cpsw_pins_default: cpsw_pins_default {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        0x250 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_tclk */
+                        0x254 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_tctl */
+                        0x258 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td3 */
+                        0x25c (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td2 */
+                        0x260 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td1 */
+                        0x264 (PIN_OUTPUT | MUX_MODE0)  /* rgmii1_td0 */
+                        0x268 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rclk */
+                        0x26c (PIN_INPUT | MUX_MODE0)   /* rgmii1_rctl */
+                        0x270 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd3 */
+                        0x274 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd2 */
+                        0x278 (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd1 */
+                        0x27c (PIN_INPUT | MUX_MODE0)   /* rgmii1_rd0 */
+
+                        /* Slave 2 */
+                        0x198 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_tclk */
+                        0x19c (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_tctl */
+                        0x1a0 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td3 */
+                        0x1a4 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td2 */
+                        0x1a8 (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td1 */
+                        0x1ac (PIN_OUTPUT | MUX_MODE3)  /* rgmii2_td0 */
+                        0x1b0 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rclk */
+                        0x1b4 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rctl */
+                        0x1b8 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd3 */
+                        0x1bc (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd2 */
+                        0x1c0 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd1 */
+                        0x1c4 (PIN_INPUT | MUX_MODE3)   /* rgmii2_rd0 */
+                >;
+
+        };
+
+        cpsw_pins_sleep: cpsw_pins_sleep {
+                pinctrl-single,pins = <
+                        /* Slave 1 */
+                        0x250 (PIN_INPUT | MUX_MODE15)
+                        0x254 (PIN_INPUT | MUX_MODE15)
+                        0x258 (PIN_INPUT | MUX_MODE15)
+                        0x25c (PIN_INPUT | MUX_MODE15)
+                        0x260 (PIN_INPUT | MUX_MODE15)
+                        0x264 (PIN_INPUT | MUX_MODE15)
+                        0x268 (PIN_INPUT | MUX_MODE15)
+                        0x26c (PIN_INPUT | MUX_MODE15)
+                        0x270 (PIN_INPUT | MUX_MODE15)
+                        0x274 (PIN_INPUT | MUX_MODE15)
+                        0x278 (PIN_INPUT | MUX_MODE15)
+                        0x27c (PIN_INPUT | MUX_MODE15)
+
+                        /* Slave 2 */
+                        0x198 (PIN_INPUT | MUX_MODE15)
+                        0x19c (PIN_INPUT | MUX_MODE15)
+                        0x1a0 (PIN_INPUT | MUX_MODE15)
+                        0x1a4 (PIN_INPUT | MUX_MODE15)
+                        0x1a8 (PIN_INPUT | MUX_MODE15)
+                        0x1ac (PIN_INPUT | MUX_MODE15)
+                        0x1b0 (PIN_INPUT | MUX_MODE15)
+                        0x1b4 (PIN_INPUT | MUX_MODE15)
+                        0x1b8 (PIN_INPUT | MUX_MODE15)
+                        0x1bc (PIN_INPUT | MUX_MODE15)
+                        0x1c0 (PIN_INPUT | MUX_MODE15)
+                        0x1c4 (PIN_INPUT | MUX_MODE15)
+                >;
+        };
+
+        davinci_mdio_pins_default: davinci_mdio_pins_default {
+                pinctrl-single,pins = <
+                        /* MDIO */
+                        0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* mdio_mclk */
+                        0x240 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mdio_d */
+                >;
+        };
+
+        davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
+                pinctrl-single,pins = <
+                        0x23c (PIN_INPUT | MUX_MODE15)
+                        0x240 (PIN_INPUT | MUX_MODE15)
+                >;
+        };
+
         tps659038_pins_default: tps659038_pins_default {
                 pinctrl-single,pins = <
                         0x418 (PIN_INPUT_PULLUP | MUX_MODE14)   /* wakeup0.gpio1_0 */
@@ -365,6 +445,32 @@
         pinctrl-0 = <&uart3_pins_default>;
 };
 
+&mac {
+        status = "okay";
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&cpsw_pins_default>;
+        pinctrl-1 = <&cpsw_pins_sleep>;
+        dual_emac;
+};
+
+&cpsw_emac0 {
+        phy_id = <&davinci_mdio>, <1>;
+        phy-mode = "rgmii";
+        dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+        phy_id = <&davinci_mdio>, <2>;
+        phy-mode = "rgmii";
+        dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&davinci_mdio_pins_default>;
+        pinctrl-1 = <&davinci_mdio_pins_sleep>;
+};
+
 &mmc1 {
         status = "okay";