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authorMarc Zyngier <marc.zyngier@arm.com>2017-10-27 10:28:54 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2017-11-10 03:45:06 -0500
commita75460547e13c99762c2f9dbfcdd13ad416f91c5 (patch)
tree8c6e05e5e0cb42db4c969f79a67d5a50913d03af
parentd3d83f7fef9dfa8bf5a279497dcaa3dd690bce2f (diff)
KVM: arm/arm64: GICv4: Enable VLPI support
All it takes is the has_v4 flag to be set in gic_kvm_info as well as "kvm-arm.vgic_v4_enable=1" being passed on the command line for GICv4 to be enabled in KVM. Acked-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
-rw-r--r--Documentation/admin-guide/kernel-parameters.txt4
-rw-r--r--virt/kvm/arm/vgic/vgic-v3.c14
2 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 3daa0a590236..6f897a4c8281 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1881,6 +1881,10 @@
1881 [KVM,ARM] Trap guest accesses to GICv3 common 1881 [KVM,ARM] Trap guest accesses to GICv3 common
1882 system registers 1882 system registers
1883 1883
1884 kvm-arm.vgic_v4_enable=
1885 [KVM,ARM] Allow use of GICv4 for direct injection of
1886 LPIs.
1887
1884 kvm-intel.ept= [KVM,Intel] Disable extended page tables 1888 kvm-intel.ept= [KVM,Intel] Disable extended page tables
1885 (virtualized MMU) support on capable Intel chips. 1889 (virtualized MMU) support on capable Intel chips.
1886 Default is 1 (enabled) 1890 Default is 1 (enabled)
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
index 863351c090d8..2f05f732d3fd 100644
--- a/virt/kvm/arm/vgic/vgic-v3.c
+++ b/virt/kvm/arm/vgic/vgic-v3.c
@@ -24,6 +24,7 @@
24static bool group0_trap; 24static bool group0_trap;
25static bool group1_trap; 25static bool group1_trap;
26static bool common_trap; 26static bool common_trap;
27static bool gicv4_enable;
27 28
28void vgic_v3_set_underflow(struct kvm_vcpu *vcpu) 29void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
29{ 30{
@@ -461,6 +462,12 @@ static int __init early_common_trap_cfg(char *buf)
461} 462}
462early_param("kvm-arm.vgic_v3_common_trap", early_common_trap_cfg); 463early_param("kvm-arm.vgic_v3_common_trap", early_common_trap_cfg);
463 464
465static int __init early_gicv4_enable(char *buf)
466{
467 return strtobool(buf, &gicv4_enable);
468}
469early_param("kvm-arm.vgic_v4_enable", early_gicv4_enable);
470
464/** 471/**
465 * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT 472 * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
466 * @node: pointer to the DT node 473 * @node: pointer to the DT node
@@ -480,6 +487,13 @@ int vgic_v3_probe(const struct gic_kvm_info *info)
480 kvm_vgic_global_state.can_emulate_gicv2 = false; 487 kvm_vgic_global_state.can_emulate_gicv2 = false;
481 kvm_vgic_global_state.ich_vtr_el2 = ich_vtr_el2; 488 kvm_vgic_global_state.ich_vtr_el2 = ich_vtr_el2;
482 489
490 /* GICv4 support? */
491 if (info->has_v4) {
492 kvm_vgic_global_state.has_gicv4 = gicv4_enable;
493 kvm_info("GICv4 support %sabled\n",
494 gicv4_enable ? "en" : "dis");
495 }
496
483 if (!info->vcpu.start) { 497 if (!info->vcpu.start) {
484 kvm_info("GICv3: no GICV resource entry\n"); 498 kvm_info("GICv3: no GICV resource entry\n");
485 kvm_vgic_global_state.vcpu_base = 0; 499 kvm_vgic_global_state.vcpu_base = 0;