diff options
author | Sandy Huang <hjc@rock-chips.com> | 2018-08-28 04:32:30 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2018-08-29 08:01:23 -0400 |
commit | a6edf83922ef39f81dca8a66c9e0c43ed165e144 (patch) | |
tree | 38e7a662eeb92d22efb37a1c367c7e0e71e5b4b8 | |
parent | 29adeb4f954b2e398c75d71bd49e62b0287d50c7 (diff) |
drm/rockchip: vop: fix some register define error for px30
1. interrupt register define error lead to enable interrupt failed;
2. px30 unsupport hdmi output;
3. there are some hardware designed bug, we must swap win2 gate and
enable offset, otherwise will appear vop iommu pagefault.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1535445150-40296-1-git-send-email-hjc@rock-chips.com
-rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index d824ca60c1a4..7f29913824ce 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c | |||
@@ -190,10 +190,10 @@ static const int px30_vop_intrs[] = { | |||
190 | static const struct vop_intr px30_intr = { | 190 | static const struct vop_intr px30_intr = { |
191 | .intrs = px30_vop_intrs, | 191 | .intrs = px30_vop_intrs, |
192 | .nintrs = ARRAY_SIZE(px30_vop_intrs), | 192 | .nintrs = ARRAY_SIZE(px30_vop_intrs), |
193 | .line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 12), | 193 | .line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0), |
194 | .status = VOP_REG_SYNC(PX30_INTR_STATUS, 0xf, 0), | 194 | .status = VOP_REG_MASK_SYNC(PX30_INTR_STATUS, 0xffff, 0), |
195 | .enable = VOP_REG_SYNC(PX30_INTR_EN, 0xf, 4), | 195 | .enable = VOP_REG_MASK_SYNC(PX30_INTR_EN, 0xffff, 0), |
196 | .clear = VOP_REG_SYNC(PX30_INTR_CLEAR, 0xf, 8), | 196 | .clear = VOP_REG_MASK_SYNC(PX30_INTR_CLEAR, 0xffff, 0), |
197 | }; | 197 | }; |
198 | 198 | ||
199 | static const struct vop_common px30_common = { | 199 | static const struct vop_common px30_common = { |
@@ -212,10 +212,8 @@ static const struct vop_modeset px30_modeset = { | |||
212 | 212 | ||
213 | static const struct vop_output px30_output = { | 213 | static const struct vop_output px30_output = { |
214 | .rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 1), | 214 | .rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 1), |
215 | .hdmi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 9), | ||
216 | .mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 25), | 215 | .mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 25), |
217 | .rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0), | 216 | .rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0), |
218 | .hdmi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 8), | ||
219 | .mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24), | 217 | .mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24), |
220 | }; | 218 | }; |
221 | 219 | ||
@@ -257,8 +255,8 @@ static const struct vop_win_phy px30_win1_data = { | |||
257 | static const struct vop_win_phy px30_win2_data = { | 255 | static const struct vop_win_phy px30_win2_data = { |
258 | .data_formats = formats_win_lite, | 256 | .data_formats = formats_win_lite, |
259 | .nformats = ARRAY_SIZE(formats_win_lite), | 257 | .nformats = ARRAY_SIZE(formats_win_lite), |
260 | .gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0), | 258 | .gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4), |
261 | .enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4), | 259 | .enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0), |
262 | .format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5), | 260 | .format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5), |
263 | .rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20), | 261 | .rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20), |
264 | .dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0), | 262 | .dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0), |