ARM: dts: Add Arria10 Ethernet EDAC devicetree entry

Add the device tree entries needed to support the Altera Ethernet FIFO
buffer EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1466603939-7526-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>

1 files changed, 16 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 17e81dc9213e..5820b70c95b3 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -621,6 +621,22 @@
                                 compatible = "altr,socfpga-a10-ocram-ecc";
                                 reg = <0xff8c3000 0x400>;
                         };
+
+                        emac0-rx-ecc@ff8c0800 {
+                                compatible = "altr,socfpga-eth-mac-ecc";
+                                reg = <0xff8c0800 0x400>;
+                                altr,ecc-parent = <&gmac0>;
+                                interrupts = <4 IRQ_TYPE_LEVEL_HIGH>,
+                                             <36 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+
+                        emac0-tx-ecc@ff8c0c00 {
+                                compatible = "altr,socfpga-eth-mac-ecc";
+                                reg = <0xff8c0c00 0x400>;
+                                altr,ecc-parent = <&gmac0>;
+                                interrupts = <5 IRQ_TYPE_LEVEL_HIGH>,
+                                             <37 IRQ_TYPE_LEVEL_HIGH>;
+                        };
                 };
 
                 rst: rstmgr@ffd05000 {