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authorAida Mynzhasova <aida.mynzhasova@skitlab.ru>2015-01-26 12:26:32 -0500
committerTony Lindgren <tony@atomide.com>2015-01-26 12:26:32 -0500
commita64459c42d744c765b4d38ae908c318635aaa697 (patch)
tree9063a447e41c1f0bbd617107c7bc9d96bcef97b6
parentabf8cc1d5bc8babf9ac5410d50089f0004ec5593 (diff)
ARM: OMAP2+: Add clock domain support for dm816x
This patch adds required definitions and structures for clockdomain initialization, so omap3xxx_clockdomains_init() was substituted by new ti81xx_clockdomains_init() while early initialization of TI81XX platform. Note that we now need to have 81xx in a separate CONFIG_SOC_TI81XX block instead inside the ifdef block for omap3 to avoid make randconfig build errors. This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> [tony@atomide.com: updated to apply, renamed to clockdomains81xx.c, fixed to use am33xx_clkdm_operations, various fixes suggested by Paul Walmsley] Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/clockdomain.h1
-rw-r--r--arch/arm/mach-omap2/clockdomains81xx_data.c194
-rw-r--r--arch/arm/mach-omap2/cm81xx.h61
-rw-r--r--arch/arm/mach-omap2/io.c78
5 files changed, 298 insertions, 38 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 3a6463f88ea2..352873c7a6a6 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -171,6 +171,8 @@ obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common)
171obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o 171obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
172obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) 172obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common)
173obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o 173obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
174obj-$(CONFIG_SOC_TI81XX) += $(clockdomain-common)
175obj-$(CONFIG_SOC_TI81XX) += clockdomains81xx_data.o
174obj-$(CONFIG_SOC_AM43XX) += $(clockdomain-common) 176obj-$(CONFIG_SOC_AM43XX) += $(clockdomain-common)
175obj-$(CONFIG_SOC_AM43XX) += clockdomains43xx_data.o 177obj-$(CONFIG_SOC_AM43XX) += clockdomains43xx_data.o
176obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common) 178obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common)
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 82c37b1becc4..77bab5fb6814 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -216,6 +216,7 @@ extern void __init omap242x_clockdomains_init(void);
216extern void __init omap243x_clockdomains_init(void); 216extern void __init omap243x_clockdomains_init(void);
217extern void __init omap3xxx_clockdomains_init(void); 217extern void __init omap3xxx_clockdomains_init(void);
218extern void __init am33xx_clockdomains_init(void); 218extern void __init am33xx_clockdomains_init(void);
219extern void __init ti81xx_clockdomains_init(void);
219extern void __init omap44xx_clockdomains_init(void); 220extern void __init omap44xx_clockdomains_init(void);
220extern void __init omap54xx_clockdomains_init(void); 221extern void __init omap54xx_clockdomains_init(void);
221extern void __init dra7xx_clockdomains_init(void); 222extern void __init dra7xx_clockdomains_init(void);
diff --git a/arch/arm/mach-omap2/clockdomains81xx_data.c b/arch/arm/mach-omap2/clockdomains81xx_data.c
new file mode 100644
index 000000000000..ce2a82001d0d
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains81xx_data.c
@@ -0,0 +1,194 @@
1/*
2 * TI81XX Clock Domain data.
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H
18#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H
19
20#include <linux/kernel.h>
21#include <linux/io.h>
22
23#include "clockdomain.h"
24#include "cm81xx.h"
25
26/*
27 * Note that 814x seems to have HWSUP_SWSUP for many clockdomains
28 * while 816x does not. According to the TRM, 816x only has HWSUP
29 * for ALWON_L3_FAST. Also note that the TI tree clockdomains81xx.h
30 * seems to have the related ifdef the wrong way around claiming
31 * 816x supports HWSUP while 814x does not. For now, we only set
32 * HWSUP for ALWON_L3_FAST as that seems to be supported for both
33 * dm814x and dm816x.
34 */
35
36/* Common for 81xx */
37
38static struct clockdomain alwon_l3_slow_81xx_clkdm = {
39 .name = "alwon_l3s_clkdm",
40 .pwrdm = { .name = "alwon_pwrdm" },
41 .cm_inst = TI81XX_CM_ALWON_MOD,
42 .clkdm_offs = TI81XX_CM_ALWON_L3_SLOW_CLKDM,
43 .flags = CLKDM_CAN_SWSUP,
44};
45
46static struct clockdomain alwon_l3_med_81xx_clkdm = {
47 .name = "alwon_l3_med_clkdm",
48 .pwrdm = { .name = "alwon_pwrdm" },
49 .cm_inst = TI81XX_CM_ALWON_MOD,
50 .clkdm_offs = TI81XX_CM_ALWON_L3_MED_CLKDM,
51 .flags = CLKDM_CAN_SWSUP,
52};
53
54static struct clockdomain alwon_l3_fast_81xx_clkdm = {
55 .name = "alwon_l3_fast_clkdm",
56 .pwrdm = { .name = "alwon_pwrdm" },
57 .cm_inst = TI81XX_CM_ALWON_MOD,
58 .clkdm_offs = TI81XX_CM_ALWON_L3_FAST_CLKDM,
59 .flags = CLKDM_CAN_HWSUP_SWSUP,
60};
61
62static struct clockdomain alwon_ethernet_81xx_clkdm = {
63 .name = "alwon_ethernet_clkdm",
64 .pwrdm = { .name = "alwon_pwrdm" },
65 .cm_inst = TI81XX_CM_ALWON_MOD,
66 .clkdm_offs = TI81XX_CM_ETHERNET_CLKDM,
67 .flags = CLKDM_CAN_SWSUP,
68};
69
70static struct clockdomain mmu_81xx_clkdm = {
71 .name = "mmu_clkdm",
72 .pwrdm = { .name = "alwon_pwrdm" },
73 .cm_inst = TI81XX_CM_ALWON_MOD,
74 .clkdm_offs = TI81XX_CM_MMU_CLKDM,
75 .flags = CLKDM_CAN_SWSUP,
76};
77
78static struct clockdomain mmu_cfg_81xx_clkdm = {
79 .name = "mmu_cfg_clkdm",
80 .pwrdm = { .name = "alwon_pwrdm" },
81 .cm_inst = TI81XX_CM_ALWON_MOD,
82 .clkdm_offs = TI81XX_CM_MMUCFG_CLKDM,
83 .flags = CLKDM_CAN_SWSUP,
84};
85
86/* 816x only */
87
88static struct clockdomain alwon_mpu_816x_clkdm = {
89 .name = "alwon_mpu_clkdm",
90 .pwrdm = { .name = "alwon_pwrdm" },
91 .cm_inst = TI81XX_CM_ALWON_MOD,
92 .clkdm_offs = TI81XX_CM_ALWON_MPU_CLKDM,
93 .flags = CLKDM_CAN_SWSUP,
94};
95
96static struct clockdomain active_gem_816x_clkdm = {
97 .name = "active_gem_clkdm",
98 .pwrdm = { .name = "active_pwrdm" },
99 .cm_inst = TI816X_CM_ACTIVE_MOD,
100 .clkdm_offs = TI816X_CM_ACTIVE_GEM_CLKDM,
101 .flags = CLKDM_CAN_SWSUP,
102};
103
104static struct clockdomain ivahd0_816x_clkdm = {
105 .name = "ivahd0_clkdm",
106 .pwrdm = { .name = "ivahd0_pwrdm" },
107 .cm_inst = TI816X_CM_IVAHD0_MOD,
108 .clkdm_offs = TI816X_CM_IVAHD0_CLKDM,
109 .flags = CLKDM_CAN_SWSUP,
110};
111
112static struct clockdomain ivahd1_816x_clkdm = {
113 .name = "ivahd1_clkdm",
114 .pwrdm = { .name = "ivahd1_pwrdm" },
115 .cm_inst = TI816X_CM_IVAHD1_MOD,
116 .clkdm_offs = TI816X_CM_IVAHD1_CLKDM,
117 .flags = CLKDM_CAN_SWSUP,
118};
119
120static struct clockdomain ivahd2_816x_clkdm = {
121 .name = "ivahd2_clkdm",
122 .pwrdm = { .name = "ivahd2_pwrdm" },
123 .cm_inst = TI816X_CM_IVAHD2_MOD,
124 .clkdm_offs = TI816X_CM_IVAHD2_CLKDM,
125 .flags = CLKDM_CAN_SWSUP,
126};
127
128static struct clockdomain sgx_816x_clkdm = {
129 .name = "sgx_clkdm",
130 .pwrdm = { .name = "sgx_pwrdm" },
131 .cm_inst = TI816X_CM_SGX_MOD,
132 .clkdm_offs = TI816X_CM_SGX_CLKDM,
133 .flags = CLKDM_CAN_SWSUP,
134};
135
136static struct clockdomain default_l3_med_816x_clkdm = {
137 .name = "default_l3_med_clkdm",
138 .pwrdm = { .name = "default_pwrdm" },
139 .cm_inst = TI816X_CM_DEFAULT_MOD,
140 .clkdm_offs = TI816X_CM_DEFAULT_L3_MED_CLKDM,
141 .flags = CLKDM_CAN_SWSUP,
142};
143
144static struct clockdomain default_ducati_816x_clkdm = {
145 .name = "default_ducati_clkdm",
146 .pwrdm = { .name = "default_pwrdm" },
147 .cm_inst = TI816X_CM_DEFAULT_MOD,
148 .clkdm_offs = TI816X_CM_DEFAULT_DUCATI_CLKDM,
149 .flags = CLKDM_CAN_SWSUP,
150};
151
152static struct clockdomain default_pci_816x_clkdm = {
153 .name = "default_pci_clkdm",
154 .pwrdm = { .name = "default_pwrdm" },
155 .cm_inst = TI816X_CM_DEFAULT_MOD,
156 .clkdm_offs = TI816X_CM_DEFAULT_PCI_CLKDM,
157 .flags = CLKDM_CAN_SWSUP,
158};
159
160static struct clockdomain default_l3_slow_816x_clkdm = {
161 .name = "default_l3_slow_clkdm",
162 .pwrdm = { .name = "default_pwrdm" },
163 .cm_inst = TI816X_CM_DEFAULT_MOD,
164 .clkdm_offs = TI816X_CM_DEFAULT_L3_SLOW_CLKDM,
165 .flags = CLKDM_CAN_SWSUP,
166};
167
168static struct clockdomain *clockdomains_ti81xx[] __initdata = {
169 &alwon_mpu_816x_clkdm,
170 &alwon_l3_slow_81xx_clkdm,
171 &alwon_l3_med_81xx_clkdm,
172 &alwon_l3_fast_81xx_clkdm,
173 &alwon_ethernet_81xx_clkdm,
174 &mmu_81xx_clkdm,
175 &mmu_cfg_81xx_clkdm,
176 &active_gem_816x_clkdm,
177 &ivahd0_816x_clkdm,
178 &ivahd1_816x_clkdm,
179 &ivahd2_816x_clkdm,
180 &sgx_816x_clkdm,
181 &default_l3_med_816x_clkdm,
182 &default_ducati_816x_clkdm,
183 &default_pci_816x_clkdm,
184 &default_l3_slow_816x_clkdm,
185 NULL,
186};
187
188void __init ti81xx_clockdomains_init(void)
189{
190 clkdm_register_platform_funcs(&am33xx_clkdm_operations);
191 clkdm_register_clkdms(clockdomains_ti81xx);
192 clkdm_complete_init();
193}
194#endif
diff --git a/arch/arm/mach-omap2/cm81xx.h b/arch/arm/mach-omap2/cm81xx.h
new file mode 100644
index 000000000000..45cb407da222
--- /dev/null
+++ b/arch/arm/mach-omap2/cm81xx.h
@@ -0,0 +1,61 @@
1/*
2 * Clock domain register offsets for TI81XX.
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
18#define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
19
20/* TI81XX common CM module offsets */
21#define TI81XX_CM_ALWON_MOD 0x1400 /* 1KB */
22
23/* TI816X CM module offsets */
24#define TI816X_CM_ACTIVE_MOD 0x0400 /* 256B */
25#define TI816X_CM_DEFAULT_MOD 0x0500 /* 256B */
26#define TI816X_CM_IVAHD0_MOD 0x0600 /* 256B */
27#define TI816X_CM_IVAHD1_MOD 0x0700 /* 256B */
28#define TI816X_CM_IVAHD2_MOD 0x0800 /* 256B */
29#define TI816X_CM_SGX_MOD 0x0900 /* 256B */
30
31/* ALWON */
32#define TI81XX_CM_ALWON_L3_SLOW_CLKDM 0x0000
33#define TI81XX_CM_ALWON_L3_MED_CLKDM 0x0004
34#define TI81XX_CM_ETHERNET_CLKDM 0x0004
35#define TI81XX_CM_MMU_CLKDM 0x000C
36#define TI81XX_CM_MMUCFG_CLKDM 0x0010
37#define TI81XX_CM_ALWON_MPU_CLKDM 0x001C
38#define TI81XX_CM_ALWON_L3_FAST_CLKDM 0x0030
39
40/* ACTIVE */
41#define TI816X_CM_ACTIVE_GEM_CLKDM 0x0000
42
43/* IVAHD0 */
44#define TI816X_CM_IVAHD0_CLKDM 0x0000
45
46/* IVAHD1 */
47#define TI816X_CM_IVAHD1_CLKDM 0x0000
48
49/* IVAHD2 */
50#define TI816X_CM_IVAHD2_CLKDM 0x0000
51
52/* SGX */
53#define TI816X_CM_SGX_CLKDM 0x0000
54
55/* DEFAULT */
56#define TI816X_CM_DEFAULT_L3_MED_CLKDM 0x0004
57#define TI816X_CM_DEFAULT_PCI_CLKDM 0x0010
58#define TI816X_CM_DEFAULT_L3_SLOW_CLKDM 0x0014
59#define TI816X_CM_DEFAULT_DUCATI_CLKDM 0x0018
60
61#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e4a5630149e1..ed3e6e8f91df 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -492,44 +492,6 @@ void __init am35xx_init_early(void)
492 omap_clk_soc_init = am35xx_dt_clk_init; 492 omap_clk_soc_init = am35xx_dt_clk_init;
493} 493}
494 494
495void __init ti814x_init_early(void)
496{
497 omap2_set_globals_tap(TI814X_CLASS,
498 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
499 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
500 NULL);
501 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
502 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
503 omap3xxx_check_revision();
504 ti81xx_check_features();
505 omap3xxx_voltagedomains_init();
506 omap3xxx_powerdomains_init();
507 omap3xxx_clockdomains_init();
508 omap3xxx_hwmod_init();
509 omap_hwmod_init_postsetup();
510 if (of_have_populated_dt())
511 omap_clk_soc_init = ti81xx_dt_clk_init;
512}
513
514void __init ti816x_init_early(void)
515{
516 omap2_set_globals_tap(TI816X_CLASS,
517 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
518 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
519 NULL);
520 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
521 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
522 omap3xxx_check_revision();
523 ti81xx_check_features();
524 omap3xxx_voltagedomains_init();
525 omap3xxx_powerdomains_init();
526 omap3xxx_clockdomains_init();
527 omap3xxx_hwmod_init();
528 omap_hwmod_init_postsetup();
529 if (of_have_populated_dt())
530 omap_clk_soc_init = ti81xx_dt_clk_init;
531}
532
533void __init omap3_init_late(void) 495void __init omap3_init_late(void)
534{ 496{
535 omap_common_late_init(); 497 omap_common_late_init();
@@ -572,6 +534,46 @@ void __init ti81xx_init_late(void)
572} 534}
573#endif 535#endif
574 536
537#ifdef CONFIG_SOC_TI81XX
538void __init ti814x_init_early(void)
539{
540 omap2_set_globals_tap(TI814X_CLASS,
541 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
542 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
543 NULL);
544 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
545 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
546 omap3xxx_check_revision();
547 ti81xx_check_features();
548 omap3xxx_voltagedomains_init();
549 omap3xxx_powerdomains_init();
550 ti81xx_clockdomains_init();
551 omap3xxx_hwmod_init();
552 omap_hwmod_init_postsetup();
553 if (of_have_populated_dt())
554 omap_clk_soc_init = ti81xx_dt_clk_init;
555}
556
557void __init ti816x_init_early(void)
558{
559 omap2_set_globals_tap(TI816X_CLASS,
560 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
561 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
562 NULL);
563 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
564 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
565 omap3xxx_check_revision();
566 ti81xx_check_features();
567 omap3xxx_voltagedomains_init();
568 omap3xxx_powerdomains_init();
569 ti81xx_clockdomains_init();
570 omap3xxx_hwmod_init();
571 omap_hwmod_init_postsetup();
572 if (of_have_populated_dt())
573 omap_clk_soc_init = ti81xx_dt_clk_init;
574}
575#endif
576
575#ifdef CONFIG_SOC_AM33XX 577#ifdef CONFIG_SOC_AM33XX
576void __init am33xx_init_early(void) 578void __init am33xx_init_early(void)
577{ 579{
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