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authorOlof Johansson <olof@lixom.net>2018-09-25 16:49:08 -0400
committerOlof Johansson <olof@lixom.net>2018-09-25 16:49:08 -0400
commita64240a625b353cd4c45a319ee47d745a30e2ec7 (patch)
tree429930560e09fb81084ba71508b0bd54f14f6576
parent47188a858a457239741bb2e9d7630fd7fad5327b (diff)
parentff1e37c6809daab75f7b2dea1efe69330e8eb65b (diff)
Merge tag 'samsung-dt-4.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM changes for v4.20 1. Bring up DSI and HDMI on Exynos5250 Arndale. 2. Use the new way of setting external wakeup interrupts on S5Pv210. 3. Use proper cpufreq suspend OPP to fix suspend/wakeup from RAM on Snow Chromebook (Exynos5250). 4. Fully describe regualtors on Odroid XU3-family boards. 5. Fix sound in Snow-rev5 Chromebook. 6. Fix regulators configuration on Peach Pi/Pit Chromebooks (Exynos5420) which should be always on. 7. Fix pull control on PMIC interrupt lines on multiple boards which essentially fixes waking up by RTC. 8. Add PMIC interrupts on Exynos4210 UniversalC210 board. 9. Add external SD card support for Trats board (Exynos4210). 10. Correct audio subsystem parent clock on Peach Chromebooks. 11. Minor cleanups. * tag 'samsung-dt-4.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Correct audio subsystem parent clock on Peach Chromebooks ARM: dts: exynos: Add external SD card support for Trats board ARM: dts: exynos: Disable pull control for PMIC IRQ line on Artik5 board ARM: dts: exynos: Disable pull control for S5M8767 PMIC ARM: dts: exynos: Remove double SD card detect pin inversion ARM: dts: exynos: Add missing PMIC interrupts on UniversalC210 board ARM: dts: exynos: Disable pull control for MAX8997 interrupts on Origen ARM: dts: exynos: Fix regulators configuration on Peach Pi/Pit Chromebooks ARM: dts: exynos: Fix sound in Snow-rev5 Chromebook ARM: dts: exynos: Add LDO28 regulator on Exynos5422 Odroid boards ARM: dts: exynos: Disable unused PMIC regulators on Exynos5422 Odroid boards ARM: dts: exynos: Add unused PMIC regulators on Exynos5422 Odroid boards ARM: dts: exynos: Add missing used PMIC regulators on Exynos5422 Odroid boards ARM: dts: exynos: Mark 1 GHz CPU OPP as suspend OPP on Exynos5250 ARM: dts: exynos: Convert exynos5250.dtsi to opp-v2 bindings ARM: dts: s5pv210: Switch to S5Pv210 specific pinctrl wakeup compatible ARM: dts: exynos: Fix HDMI-HPD line handling on Arndale ARM: dts: exynos: Use i2c-gpio for HDMI-DDC on Arndale ARM: dts: exynos: Add DSI and panel nodes on Arndale ARM: dts: exynos: Add DSI node on Exynos5250 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/exynos3250-artik5.dtsi7
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts9
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts15
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts11
-rw-r--r--arch/arm/boot/dts/exynos4412-midas.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts102
-rw-r--r--arch/arm/boot/dts/exynos5250-pinctrl.dtsi11
-rw-r--r--arch/arm/boot/dts/exynos5250-snow-rev5.dts11
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi152
-rw-r--r--arch/arm/boot/dts/exynos5420-peach-pit.dts5
-rw-r--r--arch/arm/boot/dts/exynos5422-odroid-core.dtsi157
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi6
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3.dts6
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts5
-rw-r--r--arch/arm/boot/dts/s5pv210.dtsi2
16 files changed, 433 insertions, 72 deletions
diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
index 620b50c19ead..7c22cbf6f3d4 100644
--- a/arch/arm/boot/dts/exynos3250-artik5.dtsi
+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
@@ -69,6 +69,8 @@
69 compatible = "samsung,s2mps14-pmic"; 69 compatible = "samsung,s2mps14-pmic";
70 interrupt-parent = <&gpx3>; 70 interrupt-parent = <&gpx3>;
71 interrupts = <5 IRQ_TYPE_NONE>; 71 interrupts = <5 IRQ_TYPE_NONE>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&s2mps14_irq>;
72 reg = <0x66>; 74 reg = <0x66>;
73 75
74 s2mps14_osc: clocks { 76 s2mps14_osc: clocks {
@@ -350,6 +352,11 @@
350 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>; 352 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
351 samsung,pin-val = <1>; 353 samsung,pin-val = <1>;
352 }; 354 };
355
356 s2mps14_irq: s2mps14-irq {
357 samsung,pins = "gpx3-5";
358 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
359 };
353}; 360};
354 361
355&rtc { 362&rtc {
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 2ab99f9f3d0a..dd9ec05eb0f7 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -151,6 +151,8 @@
151 reg = <0x66>; 151 reg = <0x66>;
152 interrupt-parent = <&gpx0>; 152 interrupt-parent = <&gpx0>;
153 interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>; 153 interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&max8997_irq>;
154 156
155 max8997,pmic-buck1-dvs-voltage = <1350000>; 157 max8997,pmic-buck1-dvs-voltage = <1350000>;
156 max8997,pmic-buck2-dvs-voltage = <1100000>; 158 max8997,pmic-buck2-dvs-voltage = <1100000>;
@@ -288,6 +290,13 @@
288 }; 290 };
289}; 291};
290 292
293&pinctrl_1 {
294 max8997_irq: max8997-irq {
295 samsung,pins = "gpx0-3", "gpx0-4";
296 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
297 };
298};
299
291&sdhci_0 { 300&sdhci_0 {
292 bus-width = <4>; 301 bus-width = <4>;
293 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>; 302 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 6f1d76cb7951..f9bbc6315cd9 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -385,6 +385,12 @@
385 regulator-max-microvolt = <1800000>; 385 regulator-max-microvolt = <1800000>;
386 }; 386 };
387 387
388 tflash_reg: LDO17 {
389 regulator-name = "VTF_2.8V";
390 regulator-min-microvolt = <2800000>;
391 regulator-max-microvolt = <2800000>;
392 };
393
388 vddq_reg: LDO21 { 394 vddq_reg: LDO21 {
389 regulator-name = "VDDQ_M1M2_1.2V"; 395 regulator-name = "VDDQ_M1M2_1.2V";
390 regulator-min-microvolt = <1200000>; 396 regulator-min-microvolt = <1200000>;
@@ -452,6 +458,15 @@
452 status = "okay"; 458 status = "okay";
453}; 459};
454 460
461&sdhci_2 {
462 bus-width = <4>;
463 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
464 pinctrl-names = "default";
465 vmmc-supply = <&tflash_reg>;
466 cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
467 status = "okay";
468};
469
455&serial_0 { 470&serial_0 {
456 status = "okay"; 471 status = "okay";
457}; 472};
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 4e6ff97e1ec4..5c3d98654f13 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -310,6 +310,9 @@
310 310
311 pmic@66 { 311 pmic@66 {
312 compatible = "national,lp3974"; 312 compatible = "national,lp3974";
313 interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&lp3974_irq>;
313 reg = <0x66>; 316 reg = <0x66>;
314 317
315 max8998,pmic-buck1-default-dvs-idx = <0>; 318 max8998,pmic-buck1-default-dvs-idx = <0>;
@@ -503,6 +506,11 @@
503}; 506};
504 507
505&pinctrl_1 { 508&pinctrl_1 {
509 lp3974_irq: lp3974-irq {
510 samsung,pins = "gpx0-7", "gpx2-7";
511 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
512 };
513
506 hdmi_hpd: hdmi-hpd { 514 hdmi_hpd: hdmi-hpd {
507 samsung,pins = "gpx3-7"; 515 samsung,pins = "gpx3-7";
508 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 516 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
@@ -537,8 +545,7 @@
537 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; 545 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
538 pinctrl-names = "default"; 546 pinctrl-names = "default";
539 vmmc-supply = <&ldo5_reg>; 547 vmmc-supply = <&ldo5_reg>;
540 cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; 548 cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
541 cd-inverted;
542 status = "okay"; 549 status = "okay";
543}; 550};
544 551
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index c0476c290977..aed2f2e2b0d1 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -1269,8 +1269,7 @@
1269 1269
1270&sdhci_2 { 1270&sdhci_2 {
1271 bus-width = <4>; 1271 bus-width = <4>;
1272 cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; 1272 cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
1273 cd-inverted;
1274 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>; 1273 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>;
1275 pinctrl-names = "default"; 1274 pinctrl-names = "default";
1276 vmmc-supply = <&ldo21_reg>; 1275 vmmc-supply = <&ldo21_reg>;
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index a09e46c9dbc0..2caa3132f34e 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -539,8 +539,7 @@
539 pinctrl-names = "default"; 539 pinctrl-names = "default";
540 vmmc-supply = <&ldo21_reg>; 540 vmmc-supply = <&ldo21_reg>;
541 vqmmc-supply = <&ldo4_reg>; 541 vqmmc-supply = <&ldo4_reg>;
542 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>; 542 cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
543 cd-inverted;
544 status = "okay"; 543 status = "okay";
545}; 544};
546 545
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 7a8a5c55701a..7d1f2dc59038 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -71,6 +71,17 @@
71 }; 71 };
72 }; 72 };
73 73
74 panel: panel {
75 compatible = "boe,hv070wsa-100";
76 power-supply = <&vcc_3v3_reg>;
77 enable-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>;
78 port {
79 panel_ep: endpoint {
80 remote-endpoint = <&bridge_out_ep>;
81 };
82 };
83 };
84
74 regulators { 85 regulators {
75 compatible = "simple-bus"; 86 compatible = "simple-bus";
76 #address-cells = <1>; 87 #address-cells = <1>;
@@ -97,6 +108,30 @@
97 reg = <2>; 108 reg = <2>;
98 regulator-name = "hdmi-en"; 109 regulator-name = "hdmi-en";
99 }; 110 };
111
112 vcc_1v2_reg: regulator@3 {
113 compatible = "regulator-fixed";
114 reg = <3>;
115 regulator-name = "VCC_1V2";
116 regulator-min-microvolt = <1200000>;
117 regulator-max-microvolt = <1200000>;
118 };
119
120 vcc_1v8_reg: regulator@4 {
121 compatible = "regulator-fixed";
122 reg = <4>;
123 regulator-name = "VCC_1V8";
124 regulator-min-microvolt = <1800000>;
125 regulator-max-microvolt = <1800000>;
126 };
127
128 vcc_3v3_reg: regulator@5 {
129 compatible = "regulator-fixed";
130 reg = <5>;
131 regulator-name = "VCC_3V3";
132 regulator-min-microvolt = <3300000>;
133 regulator-max-microvolt = <3300000>;
134 };
100 }; 135 };
101 136
102 fixed-rate-clocks { 137 fixed-rate-clocks {
@@ -119,6 +154,32 @@
119 cpu0-supply = <&buck2_reg>; 154 cpu0-supply = <&buck2_reg>;
120}; 155};
121 156
157&dsi_0 {
158 vddcore-supply = <&ldo8_reg>;
159 vddio-supply = <&ldo10_reg>;
160 samsung,pll-clock-frequency = <24000000>;
161 samsung,burst-clock-frequency = <320000000>;
162 samsung,esc-clock-frequency = <10000000>;
163 status = "okay";
164
165 bridge@0 {
166 reg = <0>;
167 compatible = "toshiba,tc358764";
168 vddc-supply = <&vcc_1v2_reg>;
169 vddio-supply = <&vcc_1v8_reg>;
170 vddlvds-supply = <&vcc_3v3_reg>;
171 reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 port@1 {
175 reg = <1>;
176 bridge_out_ep: endpoint {
177 remote-endpoint = <&panel_ep>;
178 };
179 };
180 };
181};
182
122&dp { 183&dp {
123 status = "okay"; 184 status = "okay";
124 samsung,color-space = <0>; 185 samsung,color-space = <0>;
@@ -149,9 +210,11 @@
149}; 210};
150 211
151&hdmi { 212&hdmi {
213 pinctrl-names = "default";
214 pinctrl-0 = <&hdmi_hpd>;
152 status = "okay"; 215 status = "okay";
153 ddc = <&i2c_2>; 216 ddc = <&i2c_ddc>;
154 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>; 217 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
155 vdd_osc-supply = <&ldo10_reg>; 218 vdd_osc-supply = <&ldo10_reg>;
156 vdd_pll-supply = <&ldo8_reg>; 219 vdd_pll-supply = <&ldo8_reg>;
157 vdd-supply = <&ldo8_reg>; 220 vdd-supply = <&ldo8_reg>;
@@ -168,6 +231,8 @@
168 reg = <0x66>; 231 reg = <0x66>;
169 interrupt-parent = <&gpx3>; 232 interrupt-parent = <&gpx3>;
170 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 233 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&s5m8767_irq>;
171 236
172 vinb1-supply = <&main_dc_reg>; 237 vinb1-supply = <&main_dc_reg>;
173 vinb2-supply = <&main_dc_reg>; 238 vinb2-supply = <&main_dc_reg>;
@@ -452,13 +517,6 @@
452 }; 517 };
453}; 518};
454 519
455&i2c_2 {
456 status = "okay";
457 /* used by HDMI DDC */
458 samsung,i2c-sda-delay = <100>;
459 samsung,i2c-max-bus-freq = <66000>;
460};
461
462&i2c_3 { 520&i2c_3 {
463 status = "okay"; 521 status = "okay";
464 522
@@ -535,6 +593,13 @@
535 cap-sd-highspeed; 593 cap-sd-highspeed;
536}; 594};
537 595
596&pinctrl_0 {
597 s5m8767_irq: s5m8767-irq {
598 samsung,pins = "gpx3-2";
599 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
600 };
601};
602
538&rtc { 603&rtc {
539 status = "okay"; 604 status = "okay";
540}; 605};
@@ -547,3 +612,22 @@
547 status = "okay"; 612 status = "okay";
548 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; 613 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
549}; 614};
615
616&soc {
617 /*
618 * For unknown reasons HDMI-DDC does not work with Exynos I2C
619 * controllers. Lets use software I2C over GPIO pins as a workaround.
620 */
621 i2c_ddc: i2c-gpio {
622 pinctrl-names = "default";
623 pinctrl-0 = <&i2c2_gpio_bus>;
624 status = "okay";
625 compatible = "i2c-gpio";
626 gpios = <&gpa0 6 0 /* sda */
627 &gpa0 7 0 /* scl */
628 >;
629 i2c-gpio,delay-us = <2>;
630 #address-cells = <1>;
631 #size-cells = <0>;
632 };
633};
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index 6ff6dea29d44..d31a68672bfa 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -225,6 +225,12 @@
225 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 225 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
226 }; 226 };
227 227
228 i2c2_gpio_bus: i2c2-gpio-bus {
229 samsung,pins = "gpa0-6", "gpa0-7";
230 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
231 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
232 };
233
228 uart2_data: uart2-data { 234 uart2_data: uart2-data {
229 samsung,pins = "gpa1-0", "gpa1-1"; 235 samsung,pins = "gpa1-0", "gpa1-1";
230 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 236 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
@@ -593,6 +599,11 @@
593 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 599 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
594 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 600 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
595 }; 601 };
602
603 hdmi_hpd: hdmi-hpd {
604 samsung,pins = "gpx3-7";
605 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
606 };
596}; 607};
597 608
598&pinctrl_1 { 609&pinctrl_1 {
diff --git a/arch/arm/boot/dts/exynos5250-snow-rev5.dts b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
index 0348b1c49a69..7cbfc6f1f4b8 100644
--- a/arch/arm/boot/dts/exynos5250-snow-rev5.dts
+++ b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
@@ -20,6 +20,14 @@
20 20
21 samsung,model = "Snow-I2S-MAX98090"; 21 samsung,model = "Snow-I2S-MAX98090";
22 samsung,audio-codec = <&max98090>; 22 samsung,audio-codec = <&max98090>;
23
24 cpu {
25 sound-dai = <&i2s0 0>;
26 };
27
28 codec {
29 sound-dai = <&max98090 0>, <&hdmi>;
30 };
23 }; 31 };
24}; 32};
25 33
@@ -31,6 +39,9 @@
31 interrupt-parent = <&gpx0>; 39 interrupt-parent = <&gpx0>;
32 pinctrl-names = "default"; 40 pinctrl-names = "default";
33 pinctrl-0 = <&max98090_irq>; 41 pinctrl-0 = <&max98090_irq>;
42 clocks = <&pmu_system_controller 0>;
43 clock-names = "mclk";
44 #sound-dai-cells = <1>;
34 }; 45 };
35}; 46};
36 47
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index da163a40af15..5044f754e6e5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -54,62 +54,109 @@
54 device_type = "cpu"; 54 device_type = "cpu";
55 compatible = "arm,cortex-a15"; 55 compatible = "arm,cortex-a15";
56 reg = <0>; 56 reg = <0>;
57 clock-frequency = <1700000000>;
58 clocks = <&clock CLK_ARM_CLK>; 57 clocks = <&clock CLK_ARM_CLK>;
59 clock-names = "cpu"; 58 clock-names = "cpu";
60 clock-latency = <140000>; 59 operating-points-v2 = <&cpu0_opp_table>;
61
62 operating-points = <
63 1700000 1300000
64 1600000 1250000
65 1500000 1225000
66 1400000 1200000
67 1300000 1150000
68 1200000 1125000
69 1100000 1100000
70 1000000 1075000
71 900000 1050000
72 800000 1025000
73 700000 1012500
74 600000 1000000
75 500000 975000
76 400000 950000
77 300000 937500
78 200000 925000
79 >;
80 #cooling-cells = <2>; /* min followed by max */ 60 #cooling-cells = <2>; /* min followed by max */
81 }; 61 };
82 cpu@1 { 62 cpu@1 {
83 device_type = "cpu"; 63 device_type = "cpu";
84 compatible = "arm,cortex-a15"; 64 compatible = "arm,cortex-a15";
85 reg = <1>; 65 reg = <1>;
86 clock-frequency = <1700000000>;
87 clocks = <&clock CLK_ARM_CLK>; 66 clocks = <&clock CLK_ARM_CLK>;
88 clock-names = "cpu"; 67 clock-names = "cpu";
89 clock-latency = <140000>; 68 operating-points-v2 = <&cpu0_opp_table>;
90
91 operating-points = <
92 1700000 1300000
93 1600000 1250000
94 1500000 1225000
95 1400000 1200000
96 1300000 1150000
97 1200000 1125000
98 1100000 1100000
99 1000000 1075000
100 900000 1050000
101 800000 1025000
102 700000 1012500
103 600000 1000000
104 500000 975000
105 400000 950000
106 300000 937500
107 200000 925000
108 >;
109 #cooling-cells = <2>; /* min followed by max */ 69 #cooling-cells = <2>; /* min followed by max */
110 }; 70 };
111 }; 71 };
112 72
73 cpu0_opp_table: opp_table0 {
74 compatible = "operating-points-v2";
75 opp-shared;
76
77 opp-200000000 {
78 opp-hz = /bits/ 64 <200000000>;
79 opp-microvolt = <925000>;
80 clock-latency-ns = <140000>;
81 };
82 opp-300000000 {
83 opp-hz = /bits/ 64 <300000000>;
84 opp-microvolt = <937500>;
85 clock-latency-ns = <140000>;
86 };
87 opp-400000000 {
88 opp-hz = /bits/ 64 <400000000>;
89 opp-microvolt = <950000>;
90 clock-latency-ns = <140000>;
91 };
92 opp-500000000 {
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <975000>;
95 clock-latency-ns = <140000>;
96 };
97 opp-600000000 {
98 opp-hz = /bits/ 64 <600000000>;
99 opp-microvolt = <1000000>;
100 clock-latency-ns = <140000>;
101 };
102 opp-700000000 {
103 opp-hz = /bits/ 64 <700000000>;
104 opp-microvolt = <1012500>;
105 clock-latency-ns = <140000>;
106 };
107 opp-800000000 {
108 opp-hz = /bits/ 64 <800000000>;
109 opp-microvolt = <1025000>;
110 clock-latency-ns = <140000>;
111 };
112 opp-900000000 {
113 opp-hz = /bits/ 64 <900000000>;
114 opp-microvolt = <1050000>;
115 clock-latency-ns = <140000>;
116 };
117 opp-1000000000 {
118 opp-hz = /bits/ 64 <1000000000>;
119 opp-microvolt = <1075000>;
120 clock-latency-ns = <140000>;
121 opp-suspend;
122 };
123 opp-1100000000 {
124 opp-hz = /bits/ 64 <1100000000>;
125 opp-microvolt = <1100000>;
126 clock-latency-ns = <140000>;
127 };
128 opp-1200000000 {
129 opp-hz = /bits/ 64 <1200000000>;
130 opp-microvolt = <1125000>;
131 clock-latency-ns = <140000>;
132 };
133 opp-1300000000 {
134 opp-hz = /bits/ 64 <1300000000>;
135 opp-microvolt = <1150000>;
136 clock-latency-ns = <140000>;
137 };
138 opp-1400000000 {
139 opp-hz = /bits/ 64 <1400000000>;
140 opp-microvolt = <1200000>;
141 clock-latency-ns = <140000>;
142 };
143 opp-1500000000 {
144 opp-hz = /bits/ 64 <1500000000>;
145 opp-microvolt = <1225000>;
146 clock-latency-ns = <140000>;
147 };
148 opp-1600000000 {
149 opp-hz = /bits/ 64 <1600000000>;
150 opp-microvolt = <1250000>;
151 clock-latency-ns = <140000>;
152 };
153 opp-1700000000 {
154 opp-hz = /bits/ 64 <1700000000>;
155 opp-microvolt = <1300000>;
156 clock-latency-ns = <140000>;
157 };
158 };
159
113 soc: soc { 160 soc: soc {
114 sysram@2020000 { 161 sysram@2020000 {
115 compatible = "mmio-sram"; 162 compatible = "mmio-sram";
@@ -756,6 +803,27 @@
756 #phy-cells = <0>; 803 #phy-cells = <0>;
757 }; 804 };
758 805
806 mipi_phy: video-phy@10040710 {
807 compatible = "samsung,s5pv210-mipi-video-phy";
808 reg = <0x10040710 0x100>;
809 #phy-cells = <1>;
810 syscon = <&pmu_system_controller>;
811 };
812
813 dsi_0: dsi@14500000 {
814 compatible = "samsung,exynos4210-mipi-dsi";
815 reg = <0x14500000 0x10000>;
816 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
817 samsung,power-domain = <&pd_disp1>;
818 phys = <&mipi_phy 3>;
819 phy-names = "dsim";
820 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI1>;
821 clock-names = "bus_clk", "sclk_mipi";
822 status = "disabled";
823 #address-cells = <1>;
824 #size-cells = <0>;
825 };
826
759 adc: adc@12d10000 { 827 adc: adc@12d10000 {
760 compatible = "samsung,exynos-adc-v1"; 828 compatible = "samsung,exynos-adc-v1";
761 reg = <0x12D10000 0x100>; 829 reg = <0x12D10000 0x100>;
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 57c2332bf282..f78db6809cca 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -153,7 +153,7 @@
153 153
154&clock_audss { 154&clock_audss {
155 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; 155 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
156 assigned-clock-parents = <&clock CLK_FOUT_EPLL>; 156 assigned-clock-parents = <&clock CLK_MAU_EPLL>;
157}; 157};
158 158
159&cpu0 { 159&cpu0 {
@@ -312,6 +312,7 @@
312 regulator-name = "vdd_1v35"; 312 regulator-name = "vdd_1v35";
313 regulator-min-microvolt = <1350000>; 313 regulator-min-microvolt = <1350000>;
314 regulator-max-microvolt = <1350000>; 314 regulator-max-microvolt = <1350000>;
315 regulator-always-on;
315 regulator-boot-on; 316 regulator-boot-on;
316 regulator-state-mem { 317 regulator-state-mem {
317 regulator-on-in-suspend; 318 regulator-on-in-suspend;
@@ -333,6 +334,7 @@
333 regulator-name = "vdd_2v"; 334 regulator-name = "vdd_2v";
334 regulator-min-microvolt = <2000000>; 335 regulator-min-microvolt = <2000000>;
335 regulator-max-microvolt = <2000000>; 336 regulator-max-microvolt = <2000000>;
337 regulator-always-on;
336 regulator-boot-on; 338 regulator-boot-on;
337 regulator-state-mem { 339 regulator-state-mem {
338 regulator-on-in-suspend; 340 regulator-on-in-suspend;
@@ -343,6 +345,7 @@
343 regulator-name = "vdd_1v8"; 345 regulator-name = "vdd_1v8";
344 regulator-min-microvolt = <1800000>; 346 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>; 347 regulator-max-microvolt = <1800000>;
348 regulator-always-on;
346 regulator-boot-on; 349 regulator-boot-on;
347 regulator-state-mem { 350 regulator-state-mem {
348 regulator-on-in-suspend; 351 regulator-on-in-suspend;
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 2f4f40882dab..2fac4baf1eb4 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -154,6 +154,13 @@
154 regulator-always-on; 154 regulator-always-on;
155 }; 155 };
156 156
157 ldo2_reg: LDO2 {
158 regulator-name = "vdd_ldo2";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
161 regulator-always-on;
162 };
163
157 ldo3_reg: LDO3 { 164 ldo3_reg: LDO3 {
158 regulator-name = "vddq_mmc0"; 165 regulator-name = "vddq_mmc0";
159 regulator-min-microvolt = <1800000>; 166 regulator-min-microvolt = <1800000>;
@@ -216,10 +223,10 @@
216 }; 223 };
217 224
218 ldo12_reg: LDO12 { 225 ldo12_reg: LDO12 {
226 /* Unused */
219 regulator-name = "vdd_ldo12"; 227 regulator-name = "vdd_ldo12";
220 regulator-min-microvolt = <1800000>; 228 regulator-min-microvolt = <800000>;
221 regulator-max-microvolt = <1800000>; 229 regulator-max-microvolt = <2375000>;
222 regulator-always-on;
223 }; 230 };
224 231
225 ldo13_reg: LDO13 { 232 ldo13_reg: LDO13 {
@@ -228,6 +235,13 @@
228 regulator-max-microvolt = <2800000>; 235 regulator-max-microvolt = <2800000>;
229 }; 236 };
230 237
238 ldo14_reg: LDO14 {
239 /* Unused */
240 regulator-name = "vdd_ldo14";
241 regulator-min-microvolt = <800000>;
242 regulator-max-microvolt = <3950000>;
243 };
244
231 ldo15_reg: LDO15 { 245 ldo15_reg: LDO15 {
232 regulator-name = "vdd_ldo15"; 246 regulator-name = "vdd_ldo15";
233 regulator-min-microvolt = <3300000>; 247 regulator-min-microvolt = <3300000>;
@@ -236,10 +250,10 @@
236 }; 250 };
237 251
238 ldo16_reg: LDO16 { 252 ldo16_reg: LDO16 {
253 /* Unused */
239 regulator-name = "vdd_ldo16"; 254 regulator-name = "vdd_ldo16";
240 regulator-min-microvolt = <2200000>; 255 regulator-min-microvolt = <800000>;
241 regulator-max-microvolt = <2200000>; 256 regulator-max-microvolt = <3950000>;
242 regulator-always-on;
243 }; 257 };
244 258
245 ldo17_reg: LDO17 { 259 ldo17_reg: LDO17 {
@@ -261,20 +275,139 @@
261 regulator-max-microvolt = <2800000>; 275 regulator-max-microvolt = <2800000>;
262 }; 276 };
263 277
264 ldo24_reg: LDO24 { 278 ldo20_reg: LDO20 {
265 regulator-name = "tsp_io"; 279 /* Unused */
266 regulator-min-microvolt = <2800000>; 280 regulator-name = "vdd_ldo20";
267 regulator-max-microvolt = <2800000>; 281 regulator-min-microvolt = <800000>;
282 regulator-max-microvolt = <3950000>;
283 };
284
285 ldo21_reg: LDO21 {
286 /* Unused */
287 regulator-name = "vdd_ldo21";
288 regulator-min-microvolt = <800000>;
289 regulator-max-microvolt = <3950000>;
290 };
291
292 ldo22_reg: LDO22 {
293 /* Unused */
294 regulator-name = "vdd_ldo22";
295 regulator-min-microvolt = <800000>;
296 regulator-max-microvolt = <2375000>;
297 };
298
299 ldo23_reg: LDO23 {
300 regulator-name = "vdd_mifs";
301 regulator-min-microvolt = <1100000>;
302 regulator-max-microvolt = <1100000>;
268 regulator-always-on; 303 regulator-always-on;
269 }; 304 };
270 305
306 ldo24_reg: LDO24 {
307 /* Unused */
308 regulator-name = "vdd_ldo24";
309 regulator-min-microvolt = <800000>;
310 regulator-max-microvolt = <3950000>;
311 };
312
313 ldo25_reg: LDO25 {
314 /* Unused */
315 regulator-name = "vdd_ldo25";
316 regulator-min-microvolt = <800000>;
317 regulator-max-microvolt = <3950000>;
318 };
319
271 ldo26_reg: LDO26 { 320 ldo26_reg: LDO26 {
321 /* Used on XU3, XU3-Lite and XU4 */
272 regulator-name = "vdd_ldo26"; 322 regulator-name = "vdd_ldo26";
273 regulator-min-microvolt = <3000000>; 323 regulator-min-microvolt = <800000>;
274 regulator-max-microvolt = <3000000>; 324 regulator-max-microvolt = <3950000>;
325 };
326
327 ldo27_reg: LDO27 {
328 regulator-name = "vdd_g3ds";
329 regulator-min-microvolt = <1000000>;
330 regulator-max-microvolt = <1000000>;
275 regulator-always-on; 331 regulator-always-on;
276 }; 332 };
277 333
334 ldo28_reg: LDO28 {
335 /* Used on XU3 */
336 regulator-name = "vdd_ldo28";
337 regulator-min-microvolt = <800000>;
338 regulator-max-microvolt = <3950000>;
339 };
340
341 ldo29_reg: LDO29 {
342 /* Unused */
343 regulator-name = "vdd_ldo29";
344 regulator-min-microvolt = <800000>;
345 regulator-max-microvolt = <3950000>;
346 };
347
348 ldo30_reg: LDO30 {
349 /* Unused */
350 regulator-name = "vdd_ldo30";
351 regulator-min-microvolt = <800000>;
352 regulator-max-microvolt = <3950000>;
353 };
354
355 ldo31_reg: LDO31 {
356 /* Unused */
357 regulator-name = "vdd_ldo31";
358 regulator-min-microvolt = <800000>;
359 regulator-max-microvolt = <3950000>;
360 };
361
362 ldo32_reg: LDO32 {
363 /* Unused */
364 regulator-name = "vdd_ldo32";
365 regulator-min-microvolt = <800000>;
366 regulator-max-microvolt = <3950000>;
367 };
368
369 ldo33_reg: LDO33 {
370 /* Unused */
371 regulator-name = "vdd_ldo33";
372 regulator-min-microvolt = <800000>;
373 regulator-max-microvolt = <3950000>;
374 };
375
376 ldo34_reg: LDO34 {
377 /* Unused */
378 regulator-name = "vdd_ldo34";
379 regulator-min-microvolt = <800000>;
380 regulator-max-microvolt = <3950000>;
381 };
382
383 ldo35_reg: LDO35 {
384 /* Unused */
385 regulator-name = "vdd_ldo35";
386 regulator-min-microvolt = <800000>;
387 regulator-max-microvolt = <2375000>;
388 };
389
390 ldo36_reg: LDO36 {
391 /* Unused */
392 regulator-name = "vdd_ldo36";
393 regulator-min-microvolt = <800000>;
394 regulator-max-microvolt = <3950000>;
395 };
396
397 ldo37_reg: LDO37 {
398 /* Unused */
399 regulator-name = "vdd_ldo37";
400 regulator-min-microvolt = <800000>;
401 regulator-max-microvolt = <3950000>;
402 };
403
404 ldo38_reg: LDO38 {
405 /* Unused */
406 regulator-name = "vdd_ldo38";
407 regulator-min-microvolt = <800000>;
408 regulator-max-microvolt = <3950000>;
409 };
410
278 buck1_reg: BUCK1 { 411 buck1_reg: BUCK1 {
279 regulator-name = "vdd_mif"; 412 regulator-name = "vdd_mif";
280 regulator-min-microvolt = <800000>; 413 regulator-min-microvolt = <800000>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 96e281c0a118..e522edb2bb82 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -367,6 +367,12 @@
367 status = "okay"; 367 status = "okay";
368}; 368};
369 369
370&ldo26_reg {
371 regulator-min-microvolt = <3000000>;
372 regulator-max-microvolt = <3000000>;
373 regulator-always-on;
374};
375
370&mixer { 376&mixer {
371 status = "okay"; 377 status = "okay";
372}; 378};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 0322f281912c..db0bc17a667b 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -49,6 +49,12 @@
49 }; 49 };
50}; 50};
51 51
52&ldo28_reg {
53 regulator-name = "dp_p3v3";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
56};
57
52&pwm { 58&pwm {
53 /* 59 /*
54 * PWM 0 -- fan 60 * PWM 0 -- fan
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index d80ab9085da1..e0f470fe54c8 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -153,7 +153,7 @@
153 153
154&clock_audss { 154&clock_audss {
155 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; 155 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
156 assigned-clock-parents = <&clock CLK_FOUT_EPLL>; 156 assigned-clock-parents = <&clock CLK_MAU_EPLL>;
157}; 157};
158 158
159&cpu0 { 159&cpu0 {
@@ -312,6 +312,7 @@
312 regulator-name = "vdd_1v35"; 312 regulator-name = "vdd_1v35";
313 regulator-min-microvolt = <1350000>; 313 regulator-min-microvolt = <1350000>;
314 regulator-max-microvolt = <1350000>; 314 regulator-max-microvolt = <1350000>;
315 regulator-always-on;
315 regulator-boot-on; 316 regulator-boot-on;
316 regulator-state-mem { 317 regulator-state-mem {
317 regulator-on-in-suspend; 318 regulator-on-in-suspend;
@@ -333,6 +334,7 @@
333 regulator-name = "vdd_2v"; 334 regulator-name = "vdd_2v";
334 regulator-min-microvolt = <2000000>; 335 regulator-min-microvolt = <2000000>;
335 regulator-max-microvolt = <2000000>; 336 regulator-max-microvolt = <2000000>;
337 regulator-always-on;
336 regulator-boot-on; 338 regulator-boot-on;
337 regulator-state-mem { 339 regulator-state-mem {
338 regulator-on-in-suspend; 340 regulator-on-in-suspend;
@@ -343,6 +345,7 @@
343 regulator-name = "vdd_1v8"; 345 regulator-name = "vdd_1v8";
344 regulator-min-microvolt = <1800000>; 346 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>; 347 regulator-max-microvolt = <1800000>;
348 regulator-always-on;
346 regulator-boot-on; 349 regulator-boot-on;
347 regulator-state-mem { 350 regulator-state-mem {
348 regulator-on-in-suspend; 351 regulator-on-in-suspend;
diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
index 67358562a6ea..75f454a210d6 100644
--- a/arch/arm/boot/dts/s5pv210.dtsi
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -120,7 +120,7 @@
120 interrupts = <30>; 120 interrupts = <30>;
121 121
122 wakeup-interrupt-controller { 122 wakeup-interrupt-controller {
123 compatible = "samsung,exynos4210-wakeup-eint"; 123 compatible = "samsung,s5pv210-wakeup-eint";
124 interrupts = <16>; 124 interrupts = <16>;
125 interrupt-parent = <&vic0>; 125 interrupt-parent = <&vic0>;
126 }; 126 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-23 03:40:56 -0400