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authorMichel Dänzer <michel.daenzer@amd.com>2018-02-23 06:29:04 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-03-05 15:37:31 -0500
commita44f8626603292c40bb88e11db0a50bb8c9a900a (patch)
tree5ce389f9c1294463e1e05fba066480aa90cae73d
parent81988f9c3d9907d7df0ea97e8e4842064b88b7b8 (diff)
drm/amdgpu/dce6: Use DRM_DEBUG instead of DRM_INFO for HPD IRQ info
For consistency with other DCE generations. HPD IRQs appear to be working fine. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v6_0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 03f19363f8f6..ee2162e81da9 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -3037,7 +3037,7 @@ static int dce_v6_0_hpd_irq(struct amdgpu_device *adev,
3037 tmp |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK; 3037 tmp |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK;
3038 WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp); 3038 WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);
3039 schedule_work(&adev->hotplug_work); 3039 schedule_work(&adev->hotplug_work);
3040 DRM_INFO("IH: HPD%d\n", hpd + 1); 3040 DRM_DEBUG("IH: HPD%d\n", hpd + 1);
3041 } 3041 }
3042 3042
3043 return 0; 3043 return 0;