arm64: dts: renesas: r8a77995: Add IPMMU device nodes

Add r8a77995 IPMMU nodes and keep all disabled by default.

Based on work for the r8a7795 and r8a7796 by Magnus Damm

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

1 files changed, 82 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 21b832fb20b2..f02bf81e5a5a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -115,6 +115,88 @@
                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                 };
 
+                ipmmu_vi0: mmu@febd0000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xfebd0000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 14>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_vp0: mmu@fe990000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xfe990000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 16>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_vc0: mmu@fe6b0000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xfe6b0000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 12>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_pv0: mmu@fd800000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xfd800000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 6>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_hc: mmu@e6570000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xe6570000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 2>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_rt: mmu@ffc80000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xffc80000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 10>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_mp: mmu@ec670000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xec670000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 4>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_ds0: mmu@e6740000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xe6740000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 0>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_ds1: mmu@e7740000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xe7740000 0 0x1000>;
+                        renesas,ipmmu-main = <&ipmmu_mm 1>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+                ipmmu_mm: mmu@e67b0000 {
+                        compatible = "renesas,ipmmu-r8a77995";
+                        reg = <0 0xe67b0000 0 0x1000>;
+                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+                        #iommu-cells = <1>;
+                        status = "disabled";
+                };
+
+
                 cpg: clock-controller@e6150000 {
                         compatible = "renesas,r8a77995-cpg-mssr";
                         reg = <0 0xe6150000 0 0x1000>;