diff options
author | Olof Johansson <olof@lixom.net> | 2015-01-29 16:54:26 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2015-01-29 16:54:26 -0500 |
commit | a35306d3ad45df81fedbe65a1cc8214b91d03aca (patch) | |
tree | 1b77a28d37e2759d0a57b0f5fa0e9a335c271f77 | |
parent | 1e4cd7e52bd0181ba057a5cda4116cb025b94635 (diff) | |
parent | 6591a02e17e6d6587c3cf7588d523fa6f26b584a (diff) |
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 2nd DT updates for v3.20" from Kukjin Kim:
- for all of Samsung SoCs
: use generic power domain bindings
: add 'dr_mode' property for hsotg/dwc2 devices
- exynos3250-rinato and exynos3250-monk
: add regulator-haptic
- exynos5422-odroidxu3
: reduce total RAM by 22 MiB because last 22 MiB
for secure monitor cannot be accessed by kernel
: add on-board INA231 sensors and LDO26 of PMIC
for the sensors
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: reduce total RAM by 22 MiB for exynos5422-odroidxu3
ARM: dts: add on-board INA231 sensors for exynos5422-odroidxu3
ARM: dts: Add regulator-haptic node for exynos3250-monk
ARM: dts: Add regulator-haptic node for exynos3250-rinato
ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
ARM: dts: convert to generic power domain bindings for exynos DT
Signed-off-by: Olof Johansson <olof@lixom.net>
22 files changed, 123 insertions, 34 deletions
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index abde1ea8a119..f4445e5a2bbb 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt | |||
@@ -23,7 +23,7 @@ Optional Properties: | |||
23 | devices in this power domain. Maximum of 4 pairs (N = 0 to 3) | 23 | devices in this power domain. Maximum of 4 pairs (N = 0 to 3) |
24 | are supported currently. | 24 | are supported currently. |
25 | 25 | ||
26 | Node of a device using power domains must have a samsung,power-domain property | 26 | Node of a device using power domains must have a power-domains property |
27 | defined with a phandle to respective power domain. | 27 | defined with a phandle to respective power domain. |
28 | 28 | ||
29 | Example: | 29 | Example: |
diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt index 6fa4c737af23..729543c47046 100644 --- a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt +++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt | |||
@@ -45,7 +45,7 @@ Required properties: | |||
45 | Exynos4 SoCs, there needs no "master" clock. | 45 | Exynos4 SoCs, there needs no "master" clock. |
46 | Exynos5 SoCs, some System MMUs must have "master" clocks. | 46 | Exynos5 SoCs, some System MMUs must have "master" clocks. |
47 | - clocks: Required if the System MMU is needed to gate its clock. | 47 | - clocks: Required if the System MMU is needed to gate its clock. |
48 | - samsung,power-domain: Required if the System MMU is needed to gate its power. | 48 | - power-domains: Required if the System MMU is needed to gate its power. |
49 | Please refer to the following document: | 49 | Please refer to the following document: |
50 | Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 50 | Documentation/devicetree/bindings/arm/exynos/power_domain.txt |
51 | 51 | ||
@@ -54,7 +54,7 @@ Examples: | |||
54 | compatible = "samsung,exynos5-gsc"; | 54 | compatible = "samsung,exynos5-gsc"; |
55 | reg = <0x13e00000 0x1000>; | 55 | reg = <0x13e00000 0x1000>; |
56 | interrupts = <0 85 0>; | 56 | interrupts = <0 85 0>; |
57 | samsung,power-domain = <&pd_gsc>; | 57 | power-domains = <&pd_gsc>; |
58 | clocks = <&clock CLK_GSCL0>; | 58 | clocks = <&clock CLK_GSCL0>; |
59 | clock-names = "gscl"; | 59 | clock-names = "gscl"; |
60 | }; | 60 | }; |
@@ -66,5 +66,5 @@ Examples: | |||
66 | interrupts = <2 0>; | 66 | interrupts = <2 0>; |
67 | clock-names = "sysmmu", "master"; | 67 | clock-names = "sysmmu", "master"; |
68 | clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; | 68 | clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; |
69 | samsung,power-domain = <&pd_gsc>; | 69 | power-domains = <&pd_gsc>; |
70 | }; | 70 | }; |
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index 3e3c5f349570..2d5787eac91a 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt | |||
@@ -28,7 +28,7 @@ Required properties: | |||
28 | for DMA contiguous memory allocation and its size. | 28 | for DMA contiguous memory allocation and its size. |
29 | 29 | ||
30 | Optional properties: | 30 | Optional properties: |
31 | - samsung,power-domain : power-domain property defined with a phandle | 31 | - power-domains : power-domain property defined with a phandle |
32 | to respective power domain. | 32 | to respective power domain. |
33 | 33 | ||
34 | Example: | 34 | Example: |
@@ -38,7 +38,7 @@ mfc: codec@13400000 { | |||
38 | compatible = "samsung,mfc-v5"; | 38 | compatible = "samsung,mfc-v5"; |
39 | reg = <0x13400000 0x10000>; | 39 | reg = <0x13400000 0x10000>; |
40 | interrupts = <0 94 0>; | 40 | interrupts = <0 94 0>; |
41 | samsung,power-domain = <&pd_mfc>; | 41 | power-domains = <&pd_mfc>; |
42 | clocks = <&clock 273>; | 42 | clocks = <&clock 273>; |
43 | clock-names = "mfc"; | 43 | clock-names = "mfc"; |
44 | }; | 44 | }; |
diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt index ca2b4aacd9af..802aa7ef64e5 100644 --- a/Documentation/devicetree/bindings/video/exynos_dsim.txt +++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt | |||
@@ -21,7 +21,7 @@ Required properties: | |||
21 | according to DSI host bindings (see MIPI DSI bindings [1]) | 21 | according to DSI host bindings (see MIPI DSI bindings [1]) |
22 | 22 | ||
23 | Optional properties: | 23 | Optional properties: |
24 | - samsung,power-domain: a phandle to DSIM power domain node | 24 | - power-domains: a phandle to DSIM power domain node |
25 | 25 | ||
26 | Child nodes: | 26 | Child nodes: |
27 | Should contain DSI peripheral nodes (see MIPI DSI bindings [1]). | 27 | Should contain DSI peripheral nodes (see MIPI DSI bindings [1]). |
@@ -53,7 +53,7 @@ Example: | |||
53 | phy-names = "dsim"; | 53 | phy-names = "dsim"; |
54 | vddcore-supply = <&vusb_reg>; | 54 | vddcore-supply = <&vusb_reg>; |
55 | vddio-supply = <&vmipi_reg>; | 55 | vddio-supply = <&vmipi_reg>; |
56 | samsung,power-domain = <&pd_lcd0>; | 56 | power-domains = <&pd_lcd0>; |
57 | #address-cells = <1>; | 57 | #address-cells = <1>; |
58 | #size-cells = <0>; | 58 | #size-cells = <0>; |
59 | samsung,pll-clock-frequency = <24000000>; | 59 | samsung,pll-clock-frequency = <24000000>; |
diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt b/Documentation/devicetree/bindings/video/samsung-fimd.txt index cf1af6371021..a8bbbde03e79 100644 --- a/Documentation/devicetree/bindings/video/samsung-fimd.txt +++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt | |||
@@ -38,7 +38,7 @@ Required properties: | |||
38 | property. Must contain "sclk_fimd" and "fimd". | 38 | property. Must contain "sclk_fimd" and "fimd". |
39 | 39 | ||
40 | Optional Properties: | 40 | Optional Properties: |
41 | - samsung,power-domain: a phandle to FIMD power domain node. | 41 | - power-domains: a phandle to FIMD power domain node. |
42 | - samsung,invert-vden: video enable signal is inverted | 42 | - samsung,invert-vden: video enable signal is inverted |
43 | - samsung,invert-vclk: video clock signal is inverted | 43 | - samsung,invert-vclk: video clock signal is inverted |
44 | - display-timings: timing settings for FIMD, as described in document [1]. | 44 | - display-timings: timing settings for FIMD, as described in document [1]. |
@@ -97,7 +97,7 @@ SoC specific DT entry: | |||
97 | interrupts = <11 0>, <11 1>, <11 2>; | 97 | interrupts = <11 0>, <11 1>, <11 2>; |
98 | clocks = <&clock 140>, <&clock 283>; | 98 | clocks = <&clock 140>, <&clock 283>; |
99 | clock-names = "sclk_fimd", "fimd"; | 99 | clock-names = "sclk_fimd", "fimd"; |
100 | samsung,power-domain = <&pd_lcd0>; | 100 | power-domains = <&pd_lcd0>; |
101 | status = "disabled"; | 101 | status = "disabled"; |
102 | }; | 102 | }; |
103 | 103 | ||
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 5e4a471faee1..d9a6dd525791 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts | |||
@@ -108,6 +108,13 @@ | |||
108 | }; | 108 | }; |
109 | }; | 109 | }; |
110 | }; | 110 | }; |
111 | |||
112 | haptics { | ||
113 | compatible = "regulator-haptic"; | ||
114 | haptic-supply = <&motor_reg>; | ||
115 | min-microvolt = <1100000>; | ||
116 | max-microvolt = <2700000>; | ||
117 | }; | ||
111 | }; | 118 | }; |
112 | 119 | ||
113 | &adc { | 120 | &adc { |
@@ -140,6 +147,7 @@ | |||
140 | &hsotg { | 147 | &hsotg { |
141 | vusb_d-supply = <&ldo15_reg>; | 148 | vusb_d-supply = <&ldo15_reg>; |
142 | vusb_a-supply = <&ldo12_reg>; | 149 | vusb_a-supply = <&ldo12_reg>; |
150 | dr_mode = "peripheral"; | ||
143 | status = "okay"; | 151 | status = "okay"; |
144 | }; | 152 | }; |
145 | 153 | ||
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index c7f4fab6dfd9..af7589efa567 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts | |||
@@ -99,6 +99,13 @@ | |||
99 | }; | 99 | }; |
100 | }; | 100 | }; |
101 | }; | 101 | }; |
102 | |||
103 | haptics { | ||
104 | compatible = "regulator-haptic"; | ||
105 | haptic-supply = <&motor_reg>; | ||
106 | min-microvolt = <1100000>; | ||
107 | max-microvolt = <2700000>; | ||
108 | }; | ||
102 | }; | 109 | }; |
103 | 110 | ||
104 | &adc { | 111 | &adc { |
@@ -131,6 +138,7 @@ | |||
131 | &hsotg { | 138 | &hsotg { |
132 | vusb_d-supply = <&ldo15_reg>; | 139 | vusb_d-supply = <&ldo15_reg>; |
133 | vusb_a-supply = <&ldo12_reg>; | 140 | vusb_a-supply = <&ldo12_reg>; |
141 | dr_mode = "peripheral"; | ||
134 | status = "okay"; | 142 | status = "okay"; |
135 | }; | 143 | }; |
136 | 144 | ||
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 204a84be5b87..acdf34401015 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi | |||
@@ -141,26 +141,31 @@ | |||
141 | pd_cam: cam-power-domain@10023C00 { | 141 | pd_cam: cam-power-domain@10023C00 { |
142 | compatible = "samsung,exynos4210-pd"; | 142 | compatible = "samsung,exynos4210-pd"; |
143 | reg = <0x10023C00 0x20>; | 143 | reg = <0x10023C00 0x20>; |
144 | #power-domain-cells = <0>; | ||
144 | }; | 145 | }; |
145 | 146 | ||
146 | pd_mfc: mfc-power-domain@10023C40 { | 147 | pd_mfc: mfc-power-domain@10023C40 { |
147 | compatible = "samsung,exynos4210-pd"; | 148 | compatible = "samsung,exynos4210-pd"; |
148 | reg = <0x10023C40 0x20>; | 149 | reg = <0x10023C40 0x20>; |
150 | #power-domain-cells = <0>; | ||
149 | }; | 151 | }; |
150 | 152 | ||
151 | pd_g3d: g3d-power-domain@10023C60 { | 153 | pd_g3d: g3d-power-domain@10023C60 { |
152 | compatible = "samsung,exynos4210-pd"; | 154 | compatible = "samsung,exynos4210-pd"; |
153 | reg = <0x10023C60 0x20>; | 155 | reg = <0x10023C60 0x20>; |
156 | #power-domain-cells = <0>; | ||
154 | }; | 157 | }; |
155 | 158 | ||
156 | pd_lcd0: lcd0-power-domain@10023C80 { | 159 | pd_lcd0: lcd0-power-domain@10023C80 { |
157 | compatible = "samsung,exynos4210-pd"; | 160 | compatible = "samsung,exynos4210-pd"; |
158 | reg = <0x10023C80 0x20>; | 161 | reg = <0x10023C80 0x20>; |
162 | #power-domain-cells = <0>; | ||
159 | }; | 163 | }; |
160 | 164 | ||
161 | pd_isp: isp-power-domain@10023CA0 { | 165 | pd_isp: isp-power-domain@10023CA0 { |
162 | compatible = "samsung,exynos4210-pd"; | 166 | compatible = "samsung,exynos4210-pd"; |
163 | reg = <0x10023CA0 0x20>; | 167 | reg = <0x10023CA0 0x20>; |
168 | #power-domain-cells = <0>; | ||
164 | }; | 169 | }; |
165 | 170 | ||
166 | cmu: clock-controller@10030000 { | 171 | cmu: clock-controller@10030000 { |
@@ -235,7 +240,7 @@ | |||
235 | interrupts = <0 84 0>, <0 85 0>, <0 86 0>; | 240 | interrupts = <0 84 0>, <0 85 0>, <0 86 0>; |
236 | clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; | 241 | clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; |
237 | clock-names = "sclk_fimd", "fimd"; | 242 | clock-names = "sclk_fimd", "fimd"; |
238 | samsung,power-domain = <&pd_lcd0>; | 243 | power-domains = <&pd_lcd0>; |
239 | samsung,sysreg = <&sys_reg>; | 244 | samsung,sysreg = <&sys_reg>; |
240 | status = "disabled"; | 245 | status = "disabled"; |
241 | }; | 246 | }; |
@@ -245,7 +250,7 @@ | |||
245 | reg = <0x11C80000 0x10000>; | 250 | reg = <0x11C80000 0x10000>; |
246 | interrupts = <0 83 0>; | 251 | interrupts = <0 83 0>; |
247 | samsung,phy-type = <0>; | 252 | samsung,phy-type = <0>; |
248 | samsung,power-domain = <&pd_lcd0>; | 253 | power-domains = <&pd_lcd0>; |
249 | phys = <&mipi_phy 1>; | 254 | phys = <&mipi_phy 1>; |
250 | phy-names = "dsim"; | 255 | phy-names = "dsim"; |
251 | clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; | 256 | clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; |
@@ -348,7 +353,7 @@ | |||
348 | interrupts = <0 102 0>; | 353 | interrupts = <0 102 0>; |
349 | clock-names = "mfc", "sclk_mfc"; | 354 | clock-names = "mfc", "sclk_mfc"; |
350 | clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>; | 355 | clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>; |
351 | samsung,power-domain = <&pd_mfc>; | 356 | power-domains = <&pd_mfc>; |
352 | status = "disabled"; | 357 | status = "disabled"; |
353 | }; | 358 | }; |
354 | 359 | ||
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index b8168f1f8139..c5dc2efb99ed 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi | |||
@@ -81,36 +81,43 @@ | |||
81 | pd_mfc: mfc-power-domain@10023C40 { | 81 | pd_mfc: mfc-power-domain@10023C40 { |
82 | compatible = "samsung,exynos4210-pd"; | 82 | compatible = "samsung,exynos4210-pd"; |
83 | reg = <0x10023C40 0x20>; | 83 | reg = <0x10023C40 0x20>; |
84 | #power-domain-cells = <0>; | ||
84 | }; | 85 | }; |
85 | 86 | ||
86 | pd_g3d: g3d-power-domain@10023C60 { | 87 | pd_g3d: g3d-power-domain@10023C60 { |
87 | compatible = "samsung,exynos4210-pd"; | 88 | compatible = "samsung,exynos4210-pd"; |
88 | reg = <0x10023C60 0x20>; | 89 | reg = <0x10023C60 0x20>; |
90 | #power-domain-cells = <0>; | ||
89 | }; | 91 | }; |
90 | 92 | ||
91 | pd_lcd0: lcd0-power-domain@10023C80 { | 93 | pd_lcd0: lcd0-power-domain@10023C80 { |
92 | compatible = "samsung,exynos4210-pd"; | 94 | compatible = "samsung,exynos4210-pd"; |
93 | reg = <0x10023C80 0x20>; | 95 | reg = <0x10023C80 0x20>; |
96 | #power-domain-cells = <0>; | ||
94 | }; | 97 | }; |
95 | 98 | ||
96 | pd_tv: tv-power-domain@10023C20 { | 99 | pd_tv: tv-power-domain@10023C20 { |
97 | compatible = "samsung,exynos4210-pd"; | 100 | compatible = "samsung,exynos4210-pd"; |
98 | reg = <0x10023C20 0x20>; | 101 | reg = <0x10023C20 0x20>; |
102 | #power-domain-cells = <0>; | ||
99 | }; | 103 | }; |
100 | 104 | ||
101 | pd_cam: cam-power-domain@10023C00 { | 105 | pd_cam: cam-power-domain@10023C00 { |
102 | compatible = "samsung,exynos4210-pd"; | 106 | compatible = "samsung,exynos4210-pd"; |
103 | reg = <0x10023C00 0x20>; | 107 | reg = <0x10023C00 0x20>; |
108 | #power-domain-cells = <0>; | ||
104 | }; | 109 | }; |
105 | 110 | ||
106 | pd_gps: gps-power-domain@10023CE0 { | 111 | pd_gps: gps-power-domain@10023CE0 { |
107 | compatible = "samsung,exynos4210-pd"; | 112 | compatible = "samsung,exynos4210-pd"; |
108 | reg = <0x10023CE0 0x20>; | 113 | reg = <0x10023CE0 0x20>; |
114 | #power-domain-cells = <0>; | ||
109 | }; | 115 | }; |
110 | 116 | ||
111 | pd_gps_alive: gps-alive-power-domain@10023D00 { | 117 | pd_gps_alive: gps-alive-power-domain@10023D00 { |
112 | compatible = "samsung,exynos4210-pd"; | 118 | compatible = "samsung,exynos4210-pd"; |
113 | reg = <0x10023D00 0x20>; | 119 | reg = <0x10023D00 0x20>; |
120 | #power-domain-cells = <0>; | ||
114 | }; | 121 | }; |
115 | 122 | ||
116 | gic: interrupt-controller@10490000 { | 123 | gic: interrupt-controller@10490000 { |
@@ -147,7 +154,7 @@ | |||
147 | compatible = "samsung,exynos4210-mipi-dsi"; | 154 | compatible = "samsung,exynos4210-mipi-dsi"; |
148 | reg = <0x11C80000 0x10000>; | 155 | reg = <0x11C80000 0x10000>; |
149 | interrupts = <0 79 0>; | 156 | interrupts = <0 79 0>; |
150 | samsung,power-domain = <&pd_lcd0>; | 157 | power-domains = <&pd_lcd0>; |
151 | phys = <&mipi_phy 1>; | 158 | phys = <&mipi_phy 1>; |
152 | phy-names = "dsim"; | 159 | phy-names = "dsim"; |
153 | clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; | 160 | clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; |
@@ -172,7 +179,7 @@ | |||
172 | interrupts = <0 84 0>; | 179 | interrupts = <0 84 0>; |
173 | clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; | 180 | clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; |
174 | clock-names = "fimc", "sclk_fimc"; | 181 | clock-names = "fimc", "sclk_fimc"; |
175 | samsung,power-domain = <&pd_cam>; | 182 | power-domains = <&pd_cam>; |
176 | samsung,sysreg = <&sys_reg>; | 183 | samsung,sysreg = <&sys_reg>; |
177 | status = "disabled"; | 184 | status = "disabled"; |
178 | }; | 185 | }; |
@@ -183,7 +190,7 @@ | |||
183 | interrupts = <0 85 0>; | 190 | interrupts = <0 85 0>; |
184 | clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; | 191 | clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; |
185 | clock-names = "fimc", "sclk_fimc"; | 192 | clock-names = "fimc", "sclk_fimc"; |
186 | samsung,power-domain = <&pd_cam>; | 193 | power-domains = <&pd_cam>; |
187 | samsung,sysreg = <&sys_reg>; | 194 | samsung,sysreg = <&sys_reg>; |
188 | status = "disabled"; | 195 | status = "disabled"; |
189 | }; | 196 | }; |
@@ -194,7 +201,7 @@ | |||
194 | interrupts = <0 86 0>; | 201 | interrupts = <0 86 0>; |
195 | clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; | 202 | clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; |
196 | clock-names = "fimc", "sclk_fimc"; | 203 | clock-names = "fimc", "sclk_fimc"; |
197 | samsung,power-domain = <&pd_cam>; | 204 | power-domains = <&pd_cam>; |
198 | samsung,sysreg = <&sys_reg>; | 205 | samsung,sysreg = <&sys_reg>; |
199 | status = "disabled"; | 206 | status = "disabled"; |
200 | }; | 207 | }; |
@@ -205,7 +212,7 @@ | |||
205 | interrupts = <0 87 0>; | 212 | interrupts = <0 87 0>; |
206 | clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; | 213 | clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; |
207 | clock-names = "fimc", "sclk_fimc"; | 214 | clock-names = "fimc", "sclk_fimc"; |
208 | samsung,power-domain = <&pd_cam>; | 215 | power-domains = <&pd_cam>; |
209 | samsung,sysreg = <&sys_reg>; | 216 | samsung,sysreg = <&sys_reg>; |
210 | status = "disabled"; | 217 | status = "disabled"; |
211 | }; | 218 | }; |
@@ -217,7 +224,7 @@ | |||
217 | clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; | 224 | clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; |
218 | clock-names = "csis", "sclk_csis"; | 225 | clock-names = "csis", "sclk_csis"; |
219 | bus-width = <4>; | 226 | bus-width = <4>; |
220 | samsung,power-domain = <&pd_cam>; | 227 | power-domains = <&pd_cam>; |
221 | phys = <&mipi_phy 0>; | 228 | phys = <&mipi_phy 0>; |
222 | phy-names = "csis"; | 229 | phy-names = "csis"; |
223 | status = "disabled"; | 230 | status = "disabled"; |
@@ -232,7 +239,7 @@ | |||
232 | clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; | 239 | clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; |
233 | clock-names = "csis", "sclk_csis"; | 240 | clock-names = "csis", "sclk_csis"; |
234 | bus-width = <2>; | 241 | bus-width = <2>; |
235 | samsung,power-domain = <&pd_cam>; | 242 | power-domains = <&pd_cam>; |
236 | phys = <&mipi_phy 2>; | 243 | phys = <&mipi_phy 2>; |
237 | phy-names = "csis"; | 244 | phy-names = "csis"; |
238 | status = "disabled"; | 245 | status = "disabled"; |
@@ -391,7 +398,7 @@ | |||
391 | compatible = "samsung,mfc-v5"; | 398 | compatible = "samsung,mfc-v5"; |
392 | reg = <0x13400000 0x10000>; | 399 | reg = <0x13400000 0x10000>; |
393 | interrupts = <0 94 0>; | 400 | interrupts = <0 94 0>; |
394 | samsung,power-domain = <&pd_mfc>; | 401 | power-domains = <&pd_mfc>; |
395 | clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; | 402 | clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; |
396 | clock-names = "mfc", "sclk_mfc"; | 403 | clock-names = "mfc", "sclk_mfc"; |
397 | status = "disabled"; | 404 | status = "disabled"; |
@@ -641,7 +648,7 @@ | |||
641 | interrupts = <11 0>, <11 1>, <11 2>; | 648 | interrupts = <11 0>, <11 1>, <11 2>; |
642 | clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; | 649 | clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; |
643 | clock-names = "sclk_fimd", "fimd"; | 650 | clock-names = "sclk_fimd", "fimd"; |
644 | samsung,power-domain = <&pd_lcd0>; | 651 | power-domains = <&pd_lcd0>; |
645 | samsung,sysreg = <&sys_reg>; | 652 | samsung,sysreg = <&sys_reg>; |
646 | status = "disabled"; | 653 | status = "disabled"; |
647 | }; | 654 | }; |
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 720836205546..1c0c7be02616 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts | |||
@@ -91,6 +91,7 @@ | |||
91 | hsotg@12480000 { | 91 | hsotg@12480000 { |
92 | vusb_d-supply = <&vusb_reg>; | 92 | vusb_d-supply = <&vusb_reg>; |
93 | vusb_a-supply = <&vusbdac_reg>; | 93 | vusb_a-supply = <&vusbdac_reg>; |
94 | dr_mode = "peripheral"; | ||
94 | status = "okay"; | 95 | status = "okay"; |
95 | }; | 96 | }; |
96 | 97 | ||
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index aaf0cae4f5e8..08f89e0ff2b8 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts | |||
@@ -71,6 +71,7 @@ | |||
71 | hsotg@12480000 { | 71 | hsotg@12480000 { |
72 | vusb_d-supply = <&ldo3_reg>; | 72 | vusb_d-supply = <&ldo3_reg>; |
73 | vusb_a-supply = <&ldo8_reg>; | 73 | vusb_a-supply = <&ldo8_reg>; |
74 | dr_mode = "peripheral"; | ||
74 | status = "okay"; | 75 | status = "okay"; |
75 | }; | 76 | }; |
76 | 77 | ||
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index bcc9e63c8070..6728aaa2af9d 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi | |||
@@ -79,6 +79,7 @@ | |||
79 | pd_lcd1: lcd1-power-domain@10023CA0 { | 79 | pd_lcd1: lcd1-power-domain@10023CA0 { |
80 | compatible = "samsung,exynos4210-pd"; | 80 | compatible = "samsung,exynos4210-pd"; |
81 | reg = <0x10023CA0 0x20>; | 81 | reg = <0x10023CA0 0x20>; |
82 | #power-domain-cells = <0>; | ||
82 | }; | 83 | }; |
83 | 84 | ||
84 | gic: interrupt-controller@10490000 { | 85 | gic: interrupt-controller@10490000 { |
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 3fbf588682b9..ffcf17bbf63b 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi | |||
@@ -381,6 +381,7 @@ | |||
381 | }; | 381 | }; |
382 | 382 | ||
383 | hsotg@12480000 { | 383 | hsotg@12480000 { |
384 | dr_mode = "peripheral"; | ||
384 | status = "okay"; | 385 | status = "okay"; |
385 | vusb_d-supply = <&ldo15_reg>; | 386 | vusb_d-supply = <&ldo15_reg>; |
386 | vusb_a-supply = <&ldo12_reg>; | 387 | vusb_a-supply = <&ldo12_reg>; |
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 29231b452643..c81c4769411d 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts | |||
@@ -845,6 +845,7 @@ | |||
845 | hsotg@12480000 { | 845 | hsotg@12480000 { |
846 | vusb_d-supply = <&ldo15_reg>; | 846 | vusb_d-supply = <&ldo15_reg>; |
847 | vusb_a-supply = <&ldo12_reg>; | 847 | vusb_a-supply = <&ldo12_reg>; |
848 | dr_mode = "peripheral"; | ||
848 | status = "okay"; | 849 | status = "okay"; |
849 | }; | 850 | }; |
850 | 851 | ||
diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index c1c9b37340d9..2007def1ab43 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi | |||
@@ -131,36 +131,43 @@ | |||
131 | pd_cam: cam-power-domain@10024000 { | 131 | pd_cam: cam-power-domain@10024000 { |
132 | compatible = "samsung,exynos4210-pd"; | 132 | compatible = "samsung,exynos4210-pd"; |
133 | reg = <0x10024000 0x20>; | 133 | reg = <0x10024000 0x20>; |
134 | #power-domain-cells = <0>; | ||
134 | }; | 135 | }; |
135 | 136 | ||
136 | pd_tv: tv-power-domain@10024020 { | 137 | pd_tv: tv-power-domain@10024020 { |
137 | compatible = "samsung,exynos4210-pd"; | 138 | compatible = "samsung,exynos4210-pd"; |
138 | reg = <0x10024020 0x20>; | 139 | reg = <0x10024020 0x20>; |
140 | #power-domain-cells = <0>; | ||
139 | }; | 141 | }; |
140 | 142 | ||
141 | pd_mfc: mfc-power-domain@10024040 { | 143 | pd_mfc: mfc-power-domain@10024040 { |
142 | compatible = "samsung,exynos4210-pd"; | 144 | compatible = "samsung,exynos4210-pd"; |
143 | reg = <0x10024040 0x20>; | 145 | reg = <0x10024040 0x20>; |
146 | #power-domain-cells = <0>; | ||
144 | }; | 147 | }; |
145 | 148 | ||
146 | pd_g3d: g3d-power-domain@10024060 { | 149 | pd_g3d: g3d-power-domain@10024060 { |
147 | compatible = "samsung,exynos4210-pd"; | 150 | compatible = "samsung,exynos4210-pd"; |
148 | reg = <0x10024060 0x20>; | 151 | reg = <0x10024060 0x20>; |
152 | #power-domain-cells = <0>; | ||
149 | }; | 153 | }; |
150 | 154 | ||
151 | pd_lcd0: lcd0-power-domain@10024080 { | 155 | pd_lcd0: lcd0-power-domain@10024080 { |
152 | compatible = "samsung,exynos4210-pd"; | 156 | compatible = "samsung,exynos4210-pd"; |
153 | reg = <0x10024080 0x20>; | 157 | reg = <0x10024080 0x20>; |
158 | #power-domain-cells = <0>; | ||
154 | }; | 159 | }; |
155 | 160 | ||
156 | pd_isp0: isp0-power-domain@100240A0 { | 161 | pd_isp0: isp0-power-domain@100240A0 { |
157 | compatible = "samsung,exynos4210-pd"; | 162 | compatible = "samsung,exynos4210-pd"; |
158 | reg = <0x100240A0 0x20>; | 163 | reg = <0x100240A0 0x20>; |
164 | #power-domain-cells = <0>; | ||
159 | }; | 165 | }; |
160 | 166 | ||
161 | pd_isp1: isp1-power-domain@100240E0 { | 167 | pd_isp1: isp1-power-domain@100240E0 { |
162 | compatible = "samsung,exynos4210-pd"; | 168 | compatible = "samsung,exynos4210-pd"; |
163 | reg = <0x100240E0 0x20>; | 169 | reg = <0x100240E0 0x20>; |
170 | #power-domain-cells = <0>; | ||
164 | }; | 171 | }; |
165 | 172 | ||
166 | cmu: clock-controller@10030000 { | 173 | cmu: clock-controller@10030000 { |
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 93b70402e943..da8734e25f50 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi | |||
@@ -52,6 +52,7 @@ | |||
52 | pd_isp: isp-power-domain@10023CA0 { | 52 | pd_isp: isp-power-domain@10023CA0 { |
53 | compatible = "samsung,exynos4210-pd"; | 53 | compatible = "samsung,exynos4210-pd"; |
54 | reg = <0x10023CA0 0x20>; | 54 | reg = <0x10023CA0 0x20>; |
55 | #power-domain-cells = <0>; | ||
55 | }; | 56 | }; |
56 | 57 | ||
57 | clock: clock-controller@10030000 { | 58 | clock: clock-controller@10030000 { |
@@ -195,7 +196,7 @@ | |||
195 | compatible = "samsung,exynos4212-fimc-lite"; | 196 | compatible = "samsung,exynos4212-fimc-lite"; |
196 | reg = <0x12390000 0x1000>; | 197 | reg = <0x12390000 0x1000>; |
197 | interrupts = <0 105 0>; | 198 | interrupts = <0 105 0>; |
198 | samsung,power-domain = <&pd_isp>; | 199 | power-domains = <&pd_isp>; |
199 | clocks = <&clock CLK_FIMC_LITE0>; | 200 | clocks = <&clock CLK_FIMC_LITE0>; |
200 | clock-names = "flite"; | 201 | clock-names = "flite"; |
201 | status = "disabled"; | 202 | status = "disabled"; |
@@ -205,7 +206,7 @@ | |||
205 | compatible = "samsung,exynos4212-fimc-lite"; | 206 | compatible = "samsung,exynos4212-fimc-lite"; |
206 | reg = <0x123A0000 0x1000>; | 207 | reg = <0x123A0000 0x1000>; |
207 | interrupts = <0 106 0>; | 208 | interrupts = <0 106 0>; |
208 | samsung,power-domain = <&pd_isp>; | 209 | power-domains = <&pd_isp>; |
209 | clocks = <&clock CLK_FIMC_LITE1>; | 210 | clocks = <&clock CLK_FIMC_LITE1>; |
210 | clock-names = "flite"; | 211 | clock-names = "flite"; |
211 | status = "disabled"; | 212 | status = "disabled"; |
@@ -215,7 +216,7 @@ | |||
215 | compatible = "samsung,exynos4212-fimc-is", "simple-bus"; | 216 | compatible = "samsung,exynos4212-fimc-is", "simple-bus"; |
216 | reg = <0x12000000 0x260000>; | 217 | reg = <0x12000000 0x260000>; |
217 | interrupts = <0 90 0>, <0 95 0>; | 218 | interrupts = <0 90 0>, <0 95 0>; |
218 | samsung,power-domain = <&pd_isp>; | 219 | power-domains = <&pd_isp>; |
219 | clocks = <&clock CLK_FIMC_LITE0>, | 220 | clocks = <&clock CLK_FIMC_LITE0>, |
220 | <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, | 221 | <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, |
221 | <&clock CLK_PPMUISPMX>, | 222 | <&clock CLK_PPMUISPMX>, |
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 0a229fcd7acf..2b5a62c91d26 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi | |||
@@ -93,11 +93,13 @@ | |||
93 | pd_gsc: gsc-power-domain@10044000 { | 93 | pd_gsc: gsc-power-domain@10044000 { |
94 | compatible = "samsung,exynos4210-pd"; | 94 | compatible = "samsung,exynos4210-pd"; |
95 | reg = <0x10044000 0x20>; | 95 | reg = <0x10044000 0x20>; |
96 | #power-domain-cells = <0>; | ||
96 | }; | 97 | }; |
97 | 98 | ||
98 | pd_mfc: mfc-power-domain@10044040 { | 99 | pd_mfc: mfc-power-domain@10044040 { |
99 | compatible = "samsung,exynos4210-pd"; | 100 | compatible = "samsung,exynos4210-pd"; |
100 | reg = <0x10044040 0x20>; | 101 | reg = <0x10044040 0x20>; |
102 | #power-domain-cells = <0>; | ||
101 | }; | 103 | }; |
102 | 104 | ||
103 | clock: clock-controller@10010000 { | 105 | clock: clock-controller@10010000 { |
@@ -222,7 +224,7 @@ | |||
222 | compatible = "samsung,mfc-v6"; | 224 | compatible = "samsung,mfc-v6"; |
223 | reg = <0x11000000 0x10000>; | 225 | reg = <0x11000000 0x10000>; |
224 | interrupts = <0 96 0>; | 226 | interrupts = <0 96 0>; |
225 | samsung,power-domain = <&pd_mfc>; | 227 | power-domains = <&pd_mfc>; |
226 | clocks = <&clock CLK_MFC>; | 228 | clocks = <&clock CLK_MFC>; |
227 | clock-names = "mfc"; | 229 | clock-names = "mfc"; |
228 | }; | 230 | }; |
@@ -682,7 +684,7 @@ | |||
682 | compatible = "samsung,exynos5-gsc"; | 684 | compatible = "samsung,exynos5-gsc"; |
683 | reg = <0x13e00000 0x1000>; | 685 | reg = <0x13e00000 0x1000>; |
684 | interrupts = <0 85 0>; | 686 | interrupts = <0 85 0>; |
685 | samsung,power-domain = <&pd_gsc>; | 687 | power-domains = <&pd_gsc>; |
686 | clocks = <&clock CLK_GSCL0>; | 688 | clocks = <&clock CLK_GSCL0>; |
687 | clock-names = "gscl"; | 689 | clock-names = "gscl"; |
688 | }; | 690 | }; |
@@ -691,7 +693,7 @@ | |||
691 | compatible = "samsung,exynos5-gsc"; | 693 | compatible = "samsung,exynos5-gsc"; |
692 | reg = <0x13e10000 0x1000>; | 694 | reg = <0x13e10000 0x1000>; |
693 | interrupts = <0 86 0>; | 695 | interrupts = <0 86 0>; |
694 | samsung,power-domain = <&pd_gsc>; | 696 | power-domains = <&pd_gsc>; |
695 | clocks = <&clock CLK_GSCL1>; | 697 | clocks = <&clock CLK_GSCL1>; |
696 | clock-names = "gscl"; | 698 | clock-names = "gscl"; |
697 | }; | 699 | }; |
@@ -700,7 +702,7 @@ | |||
700 | compatible = "samsung,exynos5-gsc"; | 702 | compatible = "samsung,exynos5-gsc"; |
701 | reg = <0x13e20000 0x1000>; | 703 | reg = <0x13e20000 0x1000>; |
702 | interrupts = <0 87 0>; | 704 | interrupts = <0 87 0>; |
703 | samsung,power-domain = <&pd_gsc>; | 705 | power-domains = <&pd_gsc>; |
704 | clocks = <&clock CLK_GSCL2>; | 706 | clocks = <&clock CLK_GSCL2>; |
705 | clock-names = "gscl"; | 707 | clock-names = "gscl"; |
706 | }; | 708 | }; |
@@ -709,7 +711,7 @@ | |||
709 | compatible = "samsung,exynos5-gsc"; | 711 | compatible = "samsung,exynos5-gsc"; |
710 | reg = <0x13e30000 0x1000>; | 712 | reg = <0x13e30000 0x1000>; |
711 | interrupts = <0 88 0>; | 713 | interrupts = <0 88 0>; |
712 | samsung,power-domain = <&pd_gsc>; | 714 | power-domains = <&pd_gsc>; |
713 | clocks = <&clock CLK_GSCL3>; | 715 | clocks = <&clock CLK_GSCL3>; |
714 | clock-names = "gscl"; | 716 | clock-names = "gscl"; |
715 | }; | 717 | }; |
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 517e50f6760b..03ef2481c640 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi | |||
@@ -178,7 +178,7 @@ | |||
178 | interrupts = <0 96 0>; | 178 | interrupts = <0 96 0>; |
179 | clocks = <&clock CLK_MFC>; | 179 | clocks = <&clock CLK_MFC>; |
180 | clock-names = "mfc"; | 180 | clock-names = "mfc"; |
181 | samsung,power-domain = <&mfc_pd>; | 181 | power-domains = <&mfc_pd>; |
182 | }; | 182 | }; |
183 | 183 | ||
184 | mmc_0: mmc@12200000 { | 184 | mmc_0: mmc@12200000 { |
@@ -250,11 +250,13 @@ | |||
250 | gsc_pd: power-domain@10044000 { | 250 | gsc_pd: power-domain@10044000 { |
251 | compatible = "samsung,exynos4210-pd"; | 251 | compatible = "samsung,exynos4210-pd"; |
252 | reg = <0x10044000 0x20>; | 252 | reg = <0x10044000 0x20>; |
253 | #power-domain-cells = <0>; | ||
253 | }; | 254 | }; |
254 | 255 | ||
255 | isp_pd: power-domain@10044020 { | 256 | isp_pd: power-domain@10044020 { |
256 | compatible = "samsung,exynos4210-pd"; | 257 | compatible = "samsung,exynos4210-pd"; |
257 | reg = <0x10044020 0x20>; | 258 | reg = <0x10044020 0x20>; |
259 | #power-domain-cells = <0>; | ||
258 | }; | 260 | }; |
259 | 261 | ||
260 | mfc_pd: power-domain@10044060 { | 262 | mfc_pd: power-domain@10044060 { |
@@ -263,11 +265,13 @@ | |||
263 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, | 265 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, |
264 | <&clock CLK_MOUT_USER_ACLK333>; | 266 | <&clock CLK_MOUT_USER_ACLK333>; |
265 | clock-names = "oscclk", "pclk0", "clk0"; | 267 | clock-names = "oscclk", "pclk0", "clk0"; |
268 | #power-domain-cells = <0>; | ||
266 | }; | 269 | }; |
267 | 270 | ||
268 | msc_pd: power-domain@10044120 { | 271 | msc_pd: power-domain@10044120 { |
269 | compatible = "samsung,exynos4210-pd"; | 272 | compatible = "samsung,exynos4210-pd"; |
270 | reg = <0x10044120 0x20>; | 273 | reg = <0x10044120 0x20>; |
274 | #power-domain-cells = <0>; | ||
271 | }; | 275 | }; |
272 | 276 | ||
273 | pinctrl_0: pinctrl@13400000 { | 277 | pinctrl_0: pinctrl@13400000 { |
@@ -730,7 +734,7 @@ | |||
730 | interrupts = <0 85 0>; | 734 | interrupts = <0 85 0>; |
731 | clocks = <&clock CLK_GSCL0>; | 735 | clocks = <&clock CLK_GSCL0>; |
732 | clock-names = "gscl"; | 736 | clock-names = "gscl"; |
733 | samsung,power-domain = <&gsc_pd>; | 737 | power-domains = <&gsc_pd>; |
734 | }; | 738 | }; |
735 | 739 | ||
736 | gsc_1: video-scaler@13e10000 { | 740 | gsc_1: video-scaler@13e10000 { |
@@ -739,7 +743,7 @@ | |||
739 | interrupts = <0 86 0>; | 743 | interrupts = <0 86 0>; |
740 | clocks = <&clock CLK_GSCL1>; | 744 | clocks = <&clock CLK_GSCL1>; |
741 | clock-names = "gscl"; | 745 | clock-names = "gscl"; |
742 | samsung,power-domain = <&gsc_pd>; | 746 | power-domains = <&gsc_pd>; |
743 | }; | 747 | }; |
744 | 748 | ||
745 | pmu_system_controller: system-controller@10040000 { | 749 | pmu_system_controller: system-controller@10040000 { |
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index c29123c0734d..a519c863248d 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts | |||
@@ -18,7 +18,7 @@ | |||
18 | compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5"; | 18 | compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5"; |
19 | 19 | ||
20 | memory { | 20 | memory { |
21 | reg = <0x40000000 0x80000000>; | 21 | reg = <0x40000000 0x7EA00000>; |
22 | }; | 22 | }; |
23 | 23 | ||
24 | chosen { | 24 | chosen { |
@@ -174,6 +174,13 @@ | |||
174 | regulator-always-on; | 174 | regulator-always-on; |
175 | }; | 175 | }; |
176 | 176 | ||
177 | ldo26_reg: LDO26 { | ||
178 | regulator-name = "vdd_ldo26"; | ||
179 | regulator-min-microvolt = <3000000>; | ||
180 | regulator-max-microvolt = <3000000>; | ||
181 | regulator-always-on; | ||
182 | }; | ||
183 | |||
177 | buck1_reg: BUCK1 { | 184 | buck1_reg: BUCK1 { |
178 | regulator-name = "vdd_mif"; | 185 | regulator-name = "vdd_mif"; |
179 | regulator-min-microvolt = <800000>; | 186 | regulator-min-microvolt = <800000>; |
@@ -330,3 +337,35 @@ | |||
330 | &usbdrd_dwc3_1 { | 337 | &usbdrd_dwc3_1 { |
331 | dr_mode = "otg"; | 338 | dr_mode = "otg"; |
332 | }; | 339 | }; |
340 | |||
341 | &i2c_0 { | ||
342 | status = "okay"; | ||
343 | |||
344 | /* A15 cluster: VDD_ARM */ | ||
345 | ina231@40 { | ||
346 | compatible = "ti,ina231"; | ||
347 | reg = <0x40>; | ||
348 | shunt-resistor = <10000>; | ||
349 | }; | ||
350 | |||
351 | /* memory: VDD_MEM */ | ||
352 | ina231@41 { | ||
353 | compatible = "ti,ina231"; | ||
354 | reg = <0x41>; | ||
355 | shunt-resistor = <10000>; | ||
356 | }; | ||
357 | |||
358 | /* GPU: VDD_G3D */ | ||
359 | ina231@44 { | ||
360 | compatible = "ti,ina231"; | ||
361 | reg = <0x44>; | ||
362 | shunt-resistor = <10000>; | ||
363 | }; | ||
364 | |||
365 | /* A7 cluster: VDD_KFC */ | ||
366 | ina231@45 { | ||
367 | compatible = "ti,ina231"; | ||
368 | reg = <0x45>; | ||
369 | shunt-resistor = <10000>; | ||
370 | }; | ||
371 | }; | ||
diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts index aa31b84a707a..f00cea7aca2f 100644 --- a/arch/arm/boot/dts/s5pv210-aquila.dts +++ b/arch/arm/boot/dts/s5pv210-aquila.dts | |||
@@ -355,6 +355,7 @@ | |||
355 | &hsotg { | 355 | &hsotg { |
356 | vusb_a-supply = <&ldo3_reg>; | 356 | vusb_a-supply = <&ldo3_reg>; |
357 | vusb_d-supply = <&ldo8_reg>; | 357 | vusb_d-supply = <&ldo8_reg>; |
358 | dr_mode = "peripheral"; | ||
358 | status = "okay"; | 359 | status = "okay"; |
359 | }; | 360 | }; |
360 | 361 | ||
diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts index 6387c77a6f7b..a3d4643b202e 100644 --- a/arch/arm/boot/dts/s5pv210-goni.dts +++ b/arch/arm/boot/dts/s5pv210-goni.dts | |||
@@ -333,6 +333,7 @@ | |||
333 | &hsotg { | 333 | &hsotg { |
334 | vusb_a-supply = <&ldo3_reg>; | 334 | vusb_a-supply = <&ldo3_reg>; |
335 | vusb_d-supply = <&ldo8_reg>; | 335 | vusb_d-supply = <&ldo8_reg>; |
336 | dr_mode = "peripheral"; | ||
336 | status = "okay"; | 337 | status = "okay"; |
337 | }; | 338 | }; |
338 | 339 | ||
diff --git a/arch/arm/boot/dts/s5pv210-smdkv210.dts b/arch/arm/boot/dts/s5pv210-smdkv210.dts index cb8521899ec8..da7d210df670 100644 --- a/arch/arm/boot/dts/s5pv210-smdkv210.dts +++ b/arch/arm/boot/dts/s5pv210-smdkv210.dts | |||
@@ -181,6 +181,7 @@ | |||
181 | }; | 181 | }; |
182 | 182 | ||
183 | &hsotg { | 183 | &hsotg { |
184 | dr_mode = "peripheral"; | ||
184 | status = "okay"; | 185 | status = "okay"; |
185 | }; | 186 | }; |
186 | 187 | ||