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authorNicholas Piggin <npiggin@gmail.com>2018-04-01 01:38:13 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2018-04-03 08:14:27 -0400
commita2b5e056b75ee6ef0777817644a456b36b96ce38 (patch)
tree02711ff4c5dc10a6ab6cb756c4bbbc5d1720e2e8
parentb6f534d1a642a9b6263fd52df30806171fbc331e (diff)
powerpc/powernv: Fix SMT4 forcing idle code
The PSSCR value is not stored to PACA_REQ_PSSCR if the CPU does not have the XER[SO] bug. Fix this by storing up-front, outside the workaround code. The initial test is not required because it is a slow path. The workaround is made to depend on CONFIG_KVM_BOOK3S_HV_POSSIBLE, to match pnv_power9_force_smt4_catch() where it is used. Drop the comment on pnv_power9_force_smt4_catch() as it's no longer true. Fixes: 7672691a08c8 ("powerpc/powernv: Provide a way to force a core into SMT4 mode") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r--arch/powerpc/kernel/idle_book3s.S9
-rw-r--r--arch/powerpc/platforms/powernv/idle.c4
2 files changed, 5 insertions, 8 deletions
diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 903ec2a5c76c..81defb6a9b74 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -442,20 +442,20 @@ _GLOBAL(power9_offline_stop)
442 * r3 contains desired PSSCR register value. 442 * r3 contains desired PSSCR register value.
443 */ 443 */
444_GLOBAL(power9_idle_stop) 444_GLOBAL(power9_idle_stop)
445BEGIN_FTR_SECTION
446 lwz r5, PACA_DONT_STOP(r13)
447 cmpwi r5, 0
448 bne 1f
449 std r3, PACA_REQ_PSSCR(r13) 445 std r3, PACA_REQ_PSSCR(r13)
446#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
447BEGIN_FTR_SECTION
450 sync 448 sync
451 lwz r5, PACA_DONT_STOP(r13) 449 lwz r5, PACA_DONT_STOP(r13)
452 cmpwi r5, 0 450 cmpwi r5, 0
453 bne 1f 451 bne 1f
454END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG) 452END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG)
453#endif
455 mtspr SPRN_PSSCR,r3 454 mtspr SPRN_PSSCR,r3
456 LOAD_REG_ADDR(r4,power_enter_stop) 455 LOAD_REG_ADDR(r4,power_enter_stop)
457 b pnv_powersave_common 456 b pnv_powersave_common
458 /* No return */ 457 /* No return */
458#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
4591: 4591:
460 /* 460 /*
461 * We get here when TM / thread reconfiguration bug workaround 461 * We get here when TM / thread reconfiguration bug workaround
@@ -465,6 +465,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG)
465 li r3, 0 465 li r3, 0
466 std r3, PACA_REQ_PSSCR(r13) 466 std r3, PACA_REQ_PSSCR(r13)
467 blr /* return 0 for wakeup cause / SRR1 value */ 467 blr /* return 0 for wakeup cause / SRR1 value */
468#endif
468 469
469/* 470/*
470 * On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1, 471 * On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1,
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 378fde1f85a8..1f12ab1e6030 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -397,10 +397,6 @@ void power9_idle(void)
397 * all other threads not to stop, and sending a message to any 397 * all other threads not to stop, and sending a message to any
398 * that are in a stop state. 398 * that are in a stop state.
399 * Must be called with preemption disabled. 399 * Must be called with preemption disabled.
400 *
401 * DO NOT call this unless cpu_has_feature(CPU_FTR_P9_TM_XER_SO_BUG) is
402 * true; otherwise this function will hang the system, due to the
403 * optimization in power9_idle_stop.
404 */ 400 */
405void pnv_power9_force_smt4_catch(void) 401void pnv_power9_force_smt4_catch(void)
406{ 402{