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authorSinclair Yeh <syeh@vmware.com>2017-06-02 01:55:50 -0400
committerThomas Hellstrom <thellstrom@vmware.com>2017-06-07 08:36:02 -0400
commita1ac633912305168bf432c3d47979d43b16164f8 (patch)
treea16c610f9d82665889f29e973ec83cf792ed42c0
parent8a309c8a2d0619efe29ec652c163d6b89eff9f9f (diff)
drm/vmwgfx: Fix large topology crash
The previous attempt at this had an issue with with num_clips > 1 because it would always end up using the coordinates of the last clip while using width and height calculated from the bounding box of all the clips. So if the last clip happens to be not at the top-left corner of the bounding box, the CPU blit operation would go out of bounds. The original intent was to coalesce all the clips into one blit, and to do that we need to also track the starting point of the content buffer. Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c22
1 files changed, 17 insertions, 5 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index 60ace30246cf..50be1f034f9e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -56,6 +56,8 @@ enum stdu_content_type {
56 * @right: Right side of bounding box. 56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box. 57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box. 58 * @bottom: Bottom side of bounding box.
59 * @fb_left: Left side of the framebuffer/content bounding box
60 * @fb_top: Top of the framebuffer/content bounding box
59 * @buf: DMA buffer when DMA-ing between buffer and screen targets. 61 * @buf: DMA buffer when DMA-ing between buffer and screen targets.
60 * @sid: Surface ID when copying between surface and screen targets. 62 * @sid: Surface ID when copying between surface and screen targets.
61 */ 63 */
@@ -63,6 +65,7 @@ struct vmw_stdu_dirty {
63 struct vmw_kms_dirty base; 65 struct vmw_kms_dirty base;
64 SVGA3dTransferType transfer; 66 SVGA3dTransferType transfer;
65 s32 left, right, top, bottom; 67 s32 left, right, top, bottom;
68 s32 fb_left, fb_top;
66 u32 pitch; 69 u32 pitch;
67 union { 70 union {
68 struct vmw_dma_buffer *buf; 71 struct vmw_dma_buffer *buf;
@@ -647,7 +650,7 @@ static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
647 * 650 *
648 * @dirty: The closure structure. 651 * @dirty: The closure structure.
649 * 652 *
650 * This function calculates the bounding box for all the incoming clips 653 * This function calculates the bounding box for all the incoming clips.
651 */ 654 */
652static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty) 655static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
653{ 656{
@@ -656,11 +659,19 @@ static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
656 659
657 dirty->num_hits = 1; 660 dirty->num_hits = 1;
658 661
659 /* Calculate bounding box */ 662 /* Calculate destination bounding box */
660 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1); 663 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
661 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1); 664 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
662 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2); 665 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
663 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2); 666 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
667
668 /*
669 * Calculate content bounding box. We only need the top-left
670 * coordinate because width and height will be the same as the
671 * destination bounding box above
672 */
673 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
674 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
664} 675}
665 676
666 677
@@ -697,11 +708,11 @@ static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
697 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */ 708 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */
698 src_pitch = stdu->display_srf->base_size.width * stdu->cpp; 709 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
699 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used); 710 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used);
700 src += dirty->unit_y1 * src_pitch + dirty->unit_x1 * stdu->cpp; 711 src += ddirty->top * src_pitch + ddirty->left * stdu->cpp;
701 712
702 dst_pitch = ddirty->pitch; 713 dst_pitch = ddirty->pitch;
703 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used); 714 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used);
704 dst += dirty->fb_y * dst_pitch + dirty->fb_x * stdu->cpp; 715 dst += ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp;
705 716
706 717
707 /* Figure out the real direction */ 718 /* Figure out the real direction */
@@ -760,7 +771,7 @@ static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
760 } 771 }
761 772
762out_cleanup: 773out_cleanup:
763 ddirty->left = ddirty->top = S32_MAX; 774 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
764 ddirty->right = ddirty->bottom = S32_MIN; 775 ddirty->right = ddirty->bottom = S32_MIN;
765} 776}
766 777
@@ -812,6 +823,7 @@ int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
812 SVGA3D_READ_HOST_VRAM; 823 SVGA3D_READ_HOST_VRAM;
813 ddirty.left = ddirty.top = S32_MAX; 824 ddirty.left = ddirty.top = S32_MAX;
814 ddirty.right = ddirty.bottom = S32_MIN; 825 ddirty.right = ddirty.bottom = S32_MIN;
826 ddirty.fb_left = ddirty.fb_top = S32_MAX;
815 ddirty.pitch = vfb->base.pitches[0]; 827 ddirty.pitch = vfb->base.pitches[0];
816 ddirty.buf = buf; 828 ddirty.buf = buf;
817 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit; 829 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;