diff options
author | Christian König <christian.koenig@amd.com> | 2017-11-29 09:12:28 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-12-06 15:57:20 -0500 |
commit | a19e2696135efb471981c1ae1ec3cb2b70c41a2e (patch) | |
tree | c41e23532c046081e76582f7b002f38f6fcc7f92 | |
parent | 470195f82e4ea550b7c37736a12bf3fa565295ea (diff) |
x86/PCI: Only enable a 64bit BAR on single-socket AMD Family 15h
When we have a multi-socket system, each CPU core needs the same setup.
Since this is tricky to do in the fixup code, don't enable a 64bit BAR on
multi-socket systems for now.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r-- | arch/x86/pci/fixup.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 5328e86f73eb..e663d6bf1328 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c | |||
@@ -665,6 +665,16 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) | |||
665 | unsigned i; | 665 | unsigned i; |
666 | u32 base, limit, high; | 666 | u32 base, limit, high; |
667 | struct resource *res, *conflict; | 667 | struct resource *res, *conflict; |
668 | struct pci_dev *other; | ||
669 | |||
670 | /* Check that we are the only device of that type */ | ||
671 | other = pci_get_device(dev->vendor, dev->device, NULL); | ||
672 | if (other != dev || | ||
673 | (other = pci_get_device(dev->vendor, dev->device, other))) { | ||
674 | /* This is a multi-socket system, don't touch it for now */ | ||
675 | pci_dev_put(other); | ||
676 | return; | ||
677 | } | ||
668 | 678 | ||
669 | for (i = 0; i < 8; i++) { | 679 | for (i = 0; i < 8; i++) { |
670 | pci_read_config_dword(dev, AMD_141b_MMIO_BASE(i), &base); | 680 | pci_read_config_dword(dev, AMD_141b_MMIO_BASE(i), &base); |
@@ -719,10 +729,10 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) | |||
719 | 729 | ||
720 | pci_bus_add_resource(dev->bus, res, 0); | 730 | pci_bus_add_resource(dev->bus, res, 0); |
721 | } | 731 | } |
722 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar); | 732 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar); |
723 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar); | 733 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar); |
724 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar); | 734 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar); |
725 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar); | 735 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar); |
726 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar); | 736 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar); |
727 | 737 | ||
728 | #endif | 738 | #endif |