diff options
author | Tony Lindgren <tony@atomide.com> | 2019-03-26 13:54:40 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2019-04-08 13:10:59 -0400 |
commit | a071e407ffbe32f7afe77ce5ffdb926d8682f17c (patch) | |
tree | 974ec0b8676f801dc55034da7ecd63385d58416d | |
parent | cb682853c98ff0205ea40e961ef667d2fff5599a (diff) |
ARM: OMAP2+: Drop gpio platform data for am33xx and am43xx
We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 33 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 87 |
4 files changed, 0 insertions, 151 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index 359a01af2923..f91edfbdaef9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h | |||
@@ -30,9 +30,6 @@ extern struct omap_hwmod_ocp_if am33xx_l3_main__gfx; | |||
30 | extern struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc; | 30 | extern struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc; |
31 | extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan0; | 31 | extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan0; |
32 | extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan1; | 32 | extern struct omap_hwmod_ocp_if am33xx_l4_per__dcan1; |
33 | extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio1; | ||
34 | extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio2; | ||
35 | extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio3; | ||
36 | extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio; | 33 | extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio; |
37 | extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm; | 34 | extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm; |
38 | extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0; | 35 | extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0; |
@@ -88,9 +85,6 @@ extern struct omap_hwmod am33xx_elm_hwmod; | |||
88 | extern struct omap_hwmod am33xx_epwmss0_hwmod; | 85 | extern struct omap_hwmod am33xx_epwmss0_hwmod; |
89 | extern struct omap_hwmod am33xx_epwmss1_hwmod; | 86 | extern struct omap_hwmod am33xx_epwmss1_hwmod; |
90 | extern struct omap_hwmod am33xx_epwmss2_hwmod; | 87 | extern struct omap_hwmod am33xx_epwmss2_hwmod; |
91 | extern struct omap_hwmod am33xx_gpio1_hwmod; | ||
92 | extern struct omap_hwmod am33xx_gpio2_hwmod; | ||
93 | extern struct omap_hwmod am33xx_gpio3_hwmod; | ||
94 | extern struct omap_hwmod am33xx_gpmc_hwmod; | 88 | extern struct omap_hwmod am33xx_gpmc_hwmod; |
95 | extern struct omap_hwmod am33xx_mailbox_hwmod; | 89 | extern struct omap_hwmod am33xx_mailbox_hwmod; |
96 | extern struct omap_hwmod am33xx_mcasp0_hwmod; | 90 | extern struct omap_hwmod am33xx_mcasp0_hwmod; |
@@ -122,7 +116,6 @@ extern struct omap_hwmod_class am33xx_emif_hwmod_class; | |||
122 | extern struct omap_hwmod_class am33xx_l4_hwmod_class; | 116 | extern struct omap_hwmod_class am33xx_l4_hwmod_class; |
123 | extern struct omap_hwmod_class am33xx_wkup_m3_hwmod_class; | 117 | extern struct omap_hwmod_class am33xx_wkup_m3_hwmod_class; |
124 | extern struct omap_hwmod_class am33xx_control_hwmod_class; | 118 | extern struct omap_hwmod_class am33xx_control_hwmod_class; |
125 | extern struct omap_hwmod_class am33xx_gpio_hwmod_class; | ||
126 | extern struct omap_hwmod_class am33xx_timer_hwmod_class; | 119 | extern struct omap_hwmod_class am33xx_timer_hwmod_class; |
127 | extern struct omap_hwmod_class am33xx_epwmss_hwmod_class; | 120 | extern struct omap_hwmod_class am33xx_epwmss_hwmod_class; |
128 | extern struct omap_hwmod_class am33xx_ehrpwm_hwmod_class; | 121 | extern struct omap_hwmod_class am33xx_ehrpwm_hwmod_class; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index 5057513103d2..407123dbc86e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c | |||
@@ -122,30 +122,6 @@ struct omap_hwmod_ocp_if am33xx_l4_per__dcan1 = { | |||
122 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 122 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
123 | }; | 123 | }; |
124 | 124 | ||
125 | /* l4 per/ls -> GPIO2 */ | ||
126 | struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = { | ||
127 | .master = &am33xx_l4_ls_hwmod, | ||
128 | .slave = &am33xx_gpio1_hwmod, | ||
129 | .clk = "l4ls_gclk", | ||
130 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
131 | }; | ||
132 | |||
133 | /* l4 per/ls -> gpio3 */ | ||
134 | struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = { | ||
135 | .master = &am33xx_l4_ls_hwmod, | ||
136 | .slave = &am33xx_gpio2_hwmod, | ||
137 | .clk = "l4ls_gclk", | ||
138 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
139 | }; | ||
140 | |||
141 | /* l4 per/ls -> gpio4 */ | ||
142 | struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = { | ||
143 | .master = &am33xx_l4_ls_hwmod, | ||
144 | .slave = &am33xx_gpio3_hwmod, | ||
145 | .clk = "l4ls_gclk", | ||
146 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
147 | }; | ||
148 | |||
149 | struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { | 125 | struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { |
150 | .master = &am33xx_cpgmac0_hwmod, | 126 | .master = &am33xx_cpgmac0_hwmod, |
151 | .slave = &am33xx_mdio_hwmod, | 127 | .slave = &am33xx_mdio_hwmod, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 5fa099112e9f..9356a1aee211 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c | |||
@@ -227,27 +227,6 @@ static struct omap_hwmod am33xx_control_hwmod = { | |||
227 | }, | 227 | }, |
228 | }; | 228 | }; |
229 | 229 | ||
230 | /* gpio0 */ | ||
231 | static struct omap_hwmod_opt_clk gpio0_opt_clks[] = { | ||
232 | { .role = "dbclk", .clk = "gpio0_dbclk" }, | ||
233 | }; | ||
234 | |||
235 | static struct omap_hwmod am33xx_gpio0_hwmod = { | ||
236 | .name = "gpio1", | ||
237 | .class = &am33xx_gpio_hwmod_class, | ||
238 | .clkdm_name = "l4_wkup_clkdm", | ||
239 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
240 | .main_clk = "dpll_core_m4_div2_ck", | ||
241 | .prcm = { | ||
242 | .omap4 = { | ||
243 | .clkctrl_offs = AM33XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET, | ||
244 | .modulemode = MODULEMODE_SWCTRL, | ||
245 | }, | ||
246 | }, | ||
247 | .opt_clks = gpio0_opt_clks, | ||
248 | .opt_clks_cnt = ARRAY_SIZE(gpio0_opt_clks), | ||
249 | }; | ||
250 | |||
251 | /* lcdc */ | 230 | /* lcdc */ |
252 | static struct omap_hwmod_class_sysconfig lcdc_sysc = { | 231 | static struct omap_hwmod_class_sysconfig lcdc_sysc = { |
253 | .rev_offs = 0x0, | 232 | .rev_offs = 0x0, |
@@ -385,14 +364,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = { | |||
385 | .user = OCP_USER_MPU, | 364 | .user = OCP_USER_MPU, |
386 | }; | 365 | }; |
387 | 366 | ||
388 | /* L4 WKUP -> GPIO1 */ | ||
389 | static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = { | ||
390 | .master = &am33xx_l4_wkup_hwmod, | ||
391 | .slave = &am33xx_gpio0_hwmod, | ||
392 | .clk = "dpll_core_m4_div2_ck", | ||
393 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
394 | }; | ||
395 | |||
396 | /* L4 WKUP -> ADC_TSC */ | 367 | /* L4 WKUP -> ADC_TSC */ |
397 | static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = { | 368 | static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = { |
398 | .master = &am33xx_l4_wkup_hwmod, | 369 | .master = &am33xx_l4_wkup_hwmod, |
@@ -471,15 +442,11 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { | |||
471 | &am33xx_l4_wkup__uart1, | 442 | &am33xx_l4_wkup__uart1, |
472 | &am33xx_l4_wkup__timer1, | 443 | &am33xx_l4_wkup__timer1, |
473 | &am33xx_l4_wkup__rtc, | 444 | &am33xx_l4_wkup__rtc, |
474 | &am33xx_l4_wkup__gpio0, | ||
475 | &am33xx_l4_wkup__adc_tsc, | 445 | &am33xx_l4_wkup__adc_tsc, |
476 | &am33xx_l4_wkup__wd_timer1, | 446 | &am33xx_l4_wkup__wd_timer1, |
477 | &am33xx_l4_hs__pruss, | 447 | &am33xx_l4_hs__pruss, |
478 | &am33xx_l4_per__dcan0, | 448 | &am33xx_l4_per__dcan0, |
479 | &am33xx_l4_per__dcan1, | 449 | &am33xx_l4_per__dcan1, |
480 | &am33xx_l4_per__gpio1, | ||
481 | &am33xx_l4_per__gpio2, | ||
482 | &am33xx_l4_per__gpio3, | ||
483 | &am33xx_l4_per__mailbox, | 450 | &am33xx_l4_per__mailbox, |
484 | &am33xx_l4_ls__mcasp0, | 451 | &am33xx_l4_ls__mcasp0, |
485 | &am33xx_l4_ls__mcasp1, | 452 | &am33xx_l4_ls__mcasp1, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index fa3c6b7e7086..dbdf1fa00fb0 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c | |||
@@ -87,26 +87,6 @@ static struct omap_hwmod am43xx_control_hwmod = { | |||
87 | }, | 87 | }, |
88 | }; | 88 | }; |
89 | 89 | ||
90 | static struct omap_hwmod_opt_clk gpio0_opt_clks[] = { | ||
91 | { .role = "dbclk", .clk = "gpio0_dbclk" }, | ||
92 | }; | ||
93 | |||
94 | static struct omap_hwmod am43xx_gpio0_hwmod = { | ||
95 | .name = "gpio1", | ||
96 | .class = &am33xx_gpio_hwmod_class, | ||
97 | .clkdm_name = "l4_wkup_clkdm", | ||
98 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
99 | .main_clk = "sys_clkin_ck", | ||
100 | .prcm = { | ||
101 | .omap4 = { | ||
102 | .clkctrl_offs = AM43XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET, | ||
103 | .modulemode = MODULEMODE_SWCTRL, | ||
104 | }, | ||
105 | }, | ||
106 | .opt_clks = gpio0_opt_clks, | ||
107 | .opt_clks_cnt = ARRAY_SIZE(gpio0_opt_clks), | ||
108 | }; | ||
109 | |||
110 | static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = { | 90 | static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = { |
111 | .rev_offs = 0x0, | 91 | .rev_offs = 0x0, |
112 | .sysc_offs = 0x4, | 92 | .sysc_offs = 0x4, |
@@ -264,46 +244,6 @@ static struct omap_hwmod am43xx_spi4_hwmod = { | |||
264 | }, | 244 | }, |
265 | }; | 245 | }; |
266 | 246 | ||
267 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | ||
268 | { .role = "dbclk", .clk = "gpio4_dbclk" }, | ||
269 | }; | ||
270 | |||
271 | static struct omap_hwmod am43xx_gpio4_hwmod = { | ||
272 | .name = "gpio5", | ||
273 | .class = &am33xx_gpio_hwmod_class, | ||
274 | .clkdm_name = "l4ls_clkdm", | ||
275 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
276 | .main_clk = "l4ls_gclk", | ||
277 | .prcm = { | ||
278 | .omap4 = { | ||
279 | .clkctrl_offs = AM43XX_CM_PER_GPIO4_CLKCTRL_OFFSET, | ||
280 | .modulemode = MODULEMODE_SWCTRL, | ||
281 | }, | ||
282 | }, | ||
283 | .opt_clks = gpio4_opt_clks, | ||
284 | .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), | ||
285 | }; | ||
286 | |||
287 | static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { | ||
288 | { .role = "dbclk", .clk = "gpio5_dbclk" }, | ||
289 | }; | ||
290 | |||
291 | static struct omap_hwmod am43xx_gpio5_hwmod = { | ||
292 | .name = "gpio6", | ||
293 | .class = &am33xx_gpio_hwmod_class, | ||
294 | .clkdm_name = "l4ls_clkdm", | ||
295 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
296 | .main_clk = "l4ls_gclk", | ||
297 | .prcm = { | ||
298 | .omap4 = { | ||
299 | .clkctrl_offs = AM43XX_CM_PER_GPIO5_CLKCTRL_OFFSET, | ||
300 | .modulemode = MODULEMODE_SWCTRL, | ||
301 | }, | ||
302 | }, | ||
303 | .opt_clks = gpio5_opt_clks, | ||
304 | .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), | ||
305 | }; | ||
306 | |||
307 | static struct omap_hwmod_class am43xx_ocp2scp_hwmod_class = { | 247 | static struct omap_hwmod_class am43xx_ocp2scp_hwmod_class = { |
308 | .name = "ocp2scp", | 248 | .name = "ocp2scp", |
309 | }; | 249 | }; |
@@ -650,13 +590,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = { | |||
650 | .user = OCP_USER_MPU, | 590 | .user = OCP_USER_MPU, |
651 | }; | 591 | }; |
652 | 592 | ||
653 | static struct omap_hwmod_ocp_if am43xx_l4_wkup__gpio0 = { | ||
654 | .master = &am33xx_l4_wkup_hwmod, | ||
655 | .slave = &am43xx_gpio0_hwmod, | ||
656 | .clk = "sys_clkin_ck", | ||
657 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
658 | }; | ||
659 | |||
660 | static struct omap_hwmod_ocp_if am43xx_l4_wkup__adc_tsc = { | 593 | static struct omap_hwmod_ocp_if am43xx_l4_wkup__adc_tsc = { |
661 | .master = &am33xx_l4_wkup_hwmod, | 594 | .master = &am33xx_l4_wkup_hwmod, |
662 | .slave = &am43xx_adc_tsc_hwmod, | 595 | .slave = &am43xx_adc_tsc_hwmod, |
@@ -769,20 +702,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi4 = { | |||
769 | .user = OCP_USER_MPU, | 702 | .user = OCP_USER_MPU, |
770 | }; | 703 | }; |
771 | 704 | ||
772 | static struct omap_hwmod_ocp_if am43xx_l4_ls__gpio4 = { | ||
773 | .master = &am33xx_l4_ls_hwmod, | ||
774 | .slave = &am43xx_gpio4_hwmod, | ||
775 | .clk = "l4ls_gclk", | ||
776 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
777 | }; | ||
778 | |||
779 | static struct omap_hwmod_ocp_if am43xx_l4_ls__gpio5 = { | ||
780 | .master = &am33xx_l4_ls_hwmod, | ||
781 | .slave = &am43xx_gpio5_hwmod, | ||
782 | .clk = "l4ls_gclk", | ||
783 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
784 | }; | ||
785 | |||
786 | static struct omap_hwmod_ocp_if am43xx_l4_ls__ocp2scp0 = { | 705 | static struct omap_hwmod_ocp_if am43xx_l4_ls__ocp2scp0 = { |
787 | .master = &am33xx_l4_ls_hwmod, | 706 | .master = &am33xx_l4_ls_hwmod, |
788 | .slave = &am43xx_ocp2scp0_hwmod, | 707 | .slave = &am43xx_ocp2scp0_hwmod, |
@@ -900,8 +819,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { | |||
900 | &am43xx_l4_ls__mcspi2, | 819 | &am43xx_l4_ls__mcspi2, |
901 | &am43xx_l4_ls__mcspi3, | 820 | &am43xx_l4_ls__mcspi3, |
902 | &am43xx_l4_ls__mcspi4, | 821 | &am43xx_l4_ls__mcspi4, |
903 | &am43xx_l4_ls__gpio4, | ||
904 | &am43xx_l4_ls__gpio5, | ||
905 | &am43xx_l3_main__pruss, | 822 | &am43xx_l3_main__pruss, |
906 | &am33xx_mpu__l3_main, | 823 | &am33xx_mpu__l3_main, |
907 | &am33xx_mpu__prcm, | 824 | &am33xx_mpu__prcm, |
@@ -922,15 +839,11 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { | |||
922 | &am43xx_l4_wkup__smartreflex1, | 839 | &am43xx_l4_wkup__smartreflex1, |
923 | &am43xx_l4_wkup__uart1, | 840 | &am43xx_l4_wkup__uart1, |
924 | &am43xx_l4_wkup__timer1, | 841 | &am43xx_l4_wkup__timer1, |
925 | &am43xx_l4_wkup__gpio0, | ||
926 | &am43xx_l4_wkup__wd_timer1, | 842 | &am43xx_l4_wkup__wd_timer1, |
927 | &am43xx_l4_wkup__adc_tsc, | 843 | &am43xx_l4_wkup__adc_tsc, |
928 | &am43xx_l3_s__qspi, | 844 | &am43xx_l3_s__qspi, |
929 | &am33xx_l4_per__dcan0, | 845 | &am33xx_l4_per__dcan0, |
930 | &am33xx_l4_per__dcan1, | 846 | &am33xx_l4_per__dcan1, |
931 | &am33xx_l4_per__gpio1, | ||
932 | &am33xx_l4_per__gpio2, | ||
933 | &am33xx_l4_per__gpio3, | ||
934 | &am33xx_l4_per__mailbox, | 847 | &am33xx_l4_per__mailbox, |
935 | &am33xx_l4_per__rng, | 848 | &am33xx_l4_per__rng, |
936 | &am33xx_l4_ls__mcasp0, | 849 | &am33xx_l4_ls__mcasp0, |