diff options
author | Icenowy Zheng <icenowy@aosc.xyz> | 2016-11-22 10:58:29 -0500 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-01-05 16:44:14 -0500 |
commit | a004ee350177ece3c059831ea49293d62aea7ca6 (patch) | |
tree | d3c220463fd18aa204d37c5228fd2b9e29d94a8e | |
parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) |
arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
PHY device which have two ports. One of the port is wired to both a HCI
USB controller and the OTG controller, which is currently not supported.
The another one is only wired to a HCI controller, and the device node of
OHCI/EHCI controller of the port can be added now.
Also the A64 USB PHY device node is also added for the HCI controllers to
work.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index e0dcab8eb035..692611e86c98 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | |||
@@ -42,8 +42,10 @@ | |||
42 | * OTHER DEALINGS IN THE SOFTWARE. | 42 | * OTHER DEALINGS IN THE SOFTWARE. |
43 | */ | 43 | */ |
44 | 44 | ||
45 | #include <dt-bindings/clock/sun50i-a64-ccu.h> | ||
45 | #include <dt-bindings/interrupt-controller/arm-gic.h> | 46 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
46 | #include <dt-bindings/pinctrl/sun4i-a10.h> | 47 | #include <dt-bindings/pinctrl/sun4i-a10.h> |
48 | #include <dt-bindings/reset/sun50i-a64-ccu.h> | ||
47 | 49 | ||
48 | / { | 50 | / { |
49 | interrupt-parent = <&gic>; | 51 | interrupt-parent = <&gic>; |
@@ -120,6 +122,50 @@ | |||
120 | #size-cells = <1>; | 122 | #size-cells = <1>; |
121 | ranges; | 123 | ranges; |
122 | 124 | ||
125 | usbphy: phy@01c19400 { | ||
126 | compatible = "allwinner,sun50i-a64-usb-phy"; | ||
127 | reg = <0x01c19400 0x14>, | ||
128 | <0x01c1b800 0x4>; | ||
129 | reg-names = "phy_ctrl", | ||
130 | "pmu1"; | ||
131 | clocks = <&ccu CLK_USB_PHY0>, | ||
132 | <&ccu CLK_USB_PHY1>; | ||
133 | clock-names = "usb0_phy", | ||
134 | "usb1_phy"; | ||
135 | resets = <&ccu RST_USB_PHY0>, | ||
136 | <&ccu RST_USB_PHY1>; | ||
137 | reset-names = "usb0_reset", | ||
138 | "usb1_reset"; | ||
139 | status = "disabled"; | ||
140 | #phy-cells = <1>; | ||
141 | }; | ||
142 | |||
143 | ehci1: usb@01c1b000 { | ||
144 | compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; | ||
145 | reg = <0x01c1b000 0x100>; | ||
146 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | ||
147 | clocks = <&ccu CLK_BUS_OHCI1>, | ||
148 | <&ccu CLK_BUS_EHCI1>, | ||
149 | <&ccu CLK_USB_OHCI1>; | ||
150 | resets = <&ccu RST_BUS_OHCI1>, | ||
151 | <&ccu RST_BUS_EHCI1>; | ||
152 | phys = <&usbphy 1>; | ||
153 | phy-names = "usb"; | ||
154 | status = "disabled"; | ||
155 | }; | ||
156 | |||
157 | ohci1: usb@01c1b400 { | ||
158 | compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; | ||
159 | reg = <0x01c1b400 0x100>; | ||
160 | interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | ||
161 | clocks = <&ccu CLK_BUS_OHCI1>, | ||
162 | <&ccu CLK_USB_OHCI1>; | ||
163 | resets = <&ccu RST_BUS_OHCI1>; | ||
164 | phys = <&usbphy 1>; | ||
165 | phy-names = "usb"; | ||
166 | status = "disabled"; | ||
167 | }; | ||
168 | |||
123 | ccu: clock@01c20000 { | 169 | ccu: clock@01c20000 { |
124 | compatible = "allwinner,sun50i-a64-ccu"; | 170 | compatible = "allwinner,sun50i-a64-ccu"; |
125 | reg = <0x01c20000 0x400>; | 171 | reg = <0x01c20000 0x400>; |