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authorLiviu Dudau <Liviu.Dudau@arm.com>2015-04-02 14:50:29 -0400
committerSudeep Holla <sudeep.holla@arm.com>2016-02-10 05:58:33 -0500
commit9fd9288ed0899f9e318a97d73e777d6d3357265e (patch)
treeb31492732e09dfeb743ad02649e9e5ab2d95c876
parenta6356f930233ff3b240b45069e7665ca357e739e (diff)
arm64: dts: Add HDLCD support on Juno platforms
ARM's Juno platforms have two HDLCD controllers, each linked to an NXP TDA19988 HDMI transmitter that provides output encoding. Add them to the device tree. Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi46
1 files changed, 42 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index b501721baf77..31d5d44db233 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -114,8 +114,8 @@
114 scpi_clk: scpi_clocks@3 { 114 scpi_clk: scpi_clocks@3 {
115 compatible = "arm,scpi-variable-clocks"; 115 compatible = "arm,scpi-variable-clocks";
116 #clock-cells = <1>; 116 #clock-cells = <1>;
117 clock-indices = <3>, <4>; 117 clock-indices = <3>;
118 clock-output-names = "pxlclk0", "pxlclk1"; 118 clock-output-names = "pxlclk";
119 }; 119 };
120 }; 120 };
121 121
@@ -145,6 +145,34 @@
145 clock-names = "apb_pclk"; 145 clock-names = "apb_pclk";
146 }; 146 };
147 147
148 hdlcd@7ff50000 {
149 compatible = "arm,hdlcd";
150 reg = <0 0x7ff50000 0 0x1000>;
151 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&scpi_clk 3>;
153 clock-names = "pxlclk";
154
155 port {
156 hdlcd1_output: endpoint@0 {
157 remote-endpoint = <&tda998x_1_input>;
158 };
159 };
160 };
161
162 hdlcd@7ff60000 {
163 compatible = "arm,hdlcd";
164 reg = <0 0x7ff60000 0 0x1000>;
165 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
166 clocks = <&scpi_clk 3>;
167 clock-names = "pxlclk";
168
169 port {
170 hdlcd0_output: endpoint@0 {
171 remote-endpoint = <&tda998x_0_input>;
172 };
173 };
174 };
175
148 soc_uart0: uart@7ff80000 { 176 soc_uart0: uart@7ff80000 {
149 compatible = "arm,pl011", "arm,primecell"; 177 compatible = "arm,pl011", "arm,primecell";
150 reg = <0x0 0x7ff80000 0x0 0x1000>; 178 reg = <0x0 0x7ff80000 0x0 0x1000>;
@@ -163,14 +191,24 @@
163 i2c-sda-hold-time-ns = <500>; 191 i2c-sda-hold-time-ns = <500>;
164 clocks = <&soc_smc50mhz>; 192 clocks = <&soc_smc50mhz>;
165 193
166 dvi0: dvi-transmitter@70 { 194 hdmi-transmitter@70 {
167 compatible = "nxp,tda998x"; 195 compatible = "nxp,tda998x";
168 reg = <0x70>; 196 reg = <0x70>;
197 port {
198 tda998x_0_input: endpoint@0 {
199 remote-endpoint = <&hdlcd0_output>;
200 };
201 };
169 }; 202 };
170 203
171 dvi1: dvi-transmitter@71 { 204 hdmi-transmitter@71 {
172 compatible = "nxp,tda998x"; 205 compatible = "nxp,tda998x";
173 reg = <0x71>; 206 reg = <0x71>;
207 port {
208 tda998x_1_input: endpoint@0 {
209 remote-endpoint = <&hdlcd1_output>;
210 };
211 };
174 }; 212 };
175 }; 213 };
176 214