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authorRob Clark <robdclark@chromium.org>2019-09-04 12:56:03 -0400
committerRob Clark <robdclark@chromium.org>2019-09-04 13:05:05 -0400
commit9f614197c744002f9968e82c649fdf7fe778e1e7 (patch)
treec4ca7e80e6b2b283a7ac066ad4116777ede94a93
parentc044e86f541a20085891c41e685a4201064430b5 (diff)
drm/msm: Use the correct dma_sync calls harder
Looks like the dma_sync calls don't do what we want on armv7 either. Fixes: Unable to handle kernel paging request at virtual address 50001000 pgd = (ptrval) [50001000] *pgd=00000000 Internal error: Oops: 805 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.3.0-rc6-00271-g9f159ae07f07 #4 Hardware name: Freescale i.MX53 (Device Tree Support) PC is at v7_dma_clean_range+0x20/0x38 LR is at __dma_page_cpu_to_dev+0x28/0x90 pc : [<c011c76c>] lr : [<c01181c4>] psr: 20000013 sp : d80b5a88 ip : de96c000 fp : d840ce6c r10: 00000000 r9 : 00000001 r8 : d843e010 r7 : 00000000 r6 : 00008000 r5 : ddb6c000 r4 : 00000000 r3 : 0000003f r2 : 00000040 r1 : 50008000 r0 : 50001000 Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 10c5387d Table: 70004019 DAC: 00000051 Process swapper/0 (pid: 1, stack limit = 0x(ptrval)) Signed-off-by: Rob Clark <robdclark@chromium.org> Fixes: 3de433c5b38a ("drm/msm: Use the correct dma_sync calls in msm_gem") Tested-by: Fabio Estevam <festevam@gmail.com>
-rw-r--r--drivers/gpu/drm/msm/msm_gem.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 7263f4373f07..5a6a79fbc9d6 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -52,7 +52,7 @@ static void sync_for_device(struct msm_gem_object *msm_obj)
52{ 52{
53 struct device *dev = msm_obj->base.dev->dev; 53 struct device *dev = msm_obj->base.dev->dev;
54 54
55 if (get_dma_ops(dev)) { 55 if (get_dma_ops(dev) && IS_ENABLED(CONFIG_ARM64)) {
56 dma_sync_sg_for_device(dev, msm_obj->sgt->sgl, 56 dma_sync_sg_for_device(dev, msm_obj->sgt->sgl,
57 msm_obj->sgt->nents, DMA_BIDIRECTIONAL); 57 msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
58 } else { 58 } else {
@@ -65,7 +65,7 @@ static void sync_for_cpu(struct msm_gem_object *msm_obj)
65{ 65{
66 struct device *dev = msm_obj->base.dev->dev; 66 struct device *dev = msm_obj->base.dev->dev;
67 67
68 if (get_dma_ops(dev)) { 68 if (get_dma_ops(dev) && IS_ENABLED(CONFIG_ARM64)) {
69 dma_sync_sg_for_cpu(dev, msm_obj->sgt->sgl, 69 dma_sync_sg_for_cpu(dev, msm_obj->sgt->sgl,
70 msm_obj->sgt->nents, DMA_BIDIRECTIONAL); 70 msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
71 } else { 71 } else {