diff options
author | Eric Anholt <eric@anholt.net> | 2016-07-07 21:53:53 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2016-07-07 21:53:53 -0400 |
commit | 9f4e62f1520de97c302d65486b146b51c6ffde7c (patch) | |
tree | 194fac093ff5a1a159b250cad654d8ff8d804cb5 | |
parent | 027a697677b0d5ff211773596d96f84078ceda80 (diff) | |
parent | 56d1fe0979dc9b73c1c12ee07722ac380d42a0c4 (diff) |
Merge tag 'drm-vc4-fixes-2016-06-06' into drm-vc4-next
Merge Mario's get_vblank_counter fix forward to prevent conflicts with
his followon patch to add precise vblank timestamping.
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_crtc.c | 32 | ||||
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_drv.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_kms.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_regs.h | 4 |
4 files changed, 45 insertions, 21 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 904d0754ad78..0f18b76c7906 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c | |||
@@ -456,14 +456,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, | |||
456 | 456 | ||
457 | WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); | 457 | WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); |
458 | 458 | ||
459 | HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), | ||
460 | vc4_state->mm.start); | ||
461 | |||
462 | if (debug_dump_regs) { | ||
463 | DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); | ||
464 | vc4_hvs_dump_state(dev); | ||
465 | } | ||
466 | |||
467 | if (crtc->state->event) { | 459 | if (crtc->state->event) { |
468 | unsigned long flags; | 460 | unsigned long flags; |
469 | 461 | ||
@@ -473,8 +465,20 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, | |||
473 | 465 | ||
474 | spin_lock_irqsave(&dev->event_lock, flags); | 466 | spin_lock_irqsave(&dev->event_lock, flags); |
475 | vc4_crtc->event = crtc->state->event; | 467 | vc4_crtc->event = crtc->state->event; |
476 | spin_unlock_irqrestore(&dev->event_lock, flags); | ||
477 | crtc->state->event = NULL; | 468 | crtc->state->event = NULL; |
469 | |||
470 | HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), | ||
471 | vc4_state->mm.start); | ||
472 | |||
473 | spin_unlock_irqrestore(&dev->event_lock, flags); | ||
474 | } else { | ||
475 | HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), | ||
476 | vc4_state->mm.start); | ||
477 | } | ||
478 | |||
479 | if (debug_dump_regs) { | ||
480 | DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); | ||
481 | vc4_hvs_dump_state(dev); | ||
478 | } | 482 | } |
479 | } | 483 | } |
480 | 484 | ||
@@ -500,12 +504,17 @@ static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc) | |||
500 | { | 504 | { |
501 | struct drm_crtc *crtc = &vc4_crtc->base; | 505 | struct drm_crtc *crtc = &vc4_crtc->base; |
502 | struct drm_device *dev = crtc->dev; | 506 | struct drm_device *dev = crtc->dev; |
507 | struct vc4_dev *vc4 = to_vc4_dev(dev); | ||
508 | struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); | ||
509 | u32 chan = vc4_crtc->channel; | ||
503 | unsigned long flags; | 510 | unsigned long flags; |
504 | 511 | ||
505 | spin_lock_irqsave(&dev->event_lock, flags); | 512 | spin_lock_irqsave(&dev->event_lock, flags); |
506 | if (vc4_crtc->event) { | 513 | if (vc4_crtc->event && |
514 | (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan)))) { | ||
507 | drm_crtc_send_vblank_event(crtc, vc4_crtc->event); | 515 | drm_crtc_send_vblank_event(crtc, vc4_crtc->event); |
508 | vc4_crtc->event = NULL; | 516 | vc4_crtc->event = NULL; |
517 | drm_crtc_vblank_put(crtc); | ||
509 | } | 518 | } |
510 | spin_unlock_irqrestore(&dev->event_lock, flags); | 519 | spin_unlock_irqrestore(&dev->event_lock, flags); |
511 | } | 520 | } |
@@ -556,6 +565,7 @@ vc4_async_page_flip_complete(struct vc4_seqno_cb *cb) | |||
556 | spin_unlock_irqrestore(&dev->event_lock, flags); | 565 | spin_unlock_irqrestore(&dev->event_lock, flags); |
557 | } | 566 | } |
558 | 567 | ||
568 | drm_crtc_vblank_put(crtc); | ||
559 | drm_framebuffer_unreference(flip_state->fb); | 569 | drm_framebuffer_unreference(flip_state->fb); |
560 | kfree(flip_state); | 570 | kfree(flip_state); |
561 | 571 | ||
@@ -598,6 +608,8 @@ static int vc4_async_page_flip(struct drm_crtc *crtc, | |||
598 | return ret; | 608 | return ret; |
599 | } | 609 | } |
600 | 610 | ||
611 | WARN_ON(drm_crtc_vblank_get(crtc) != 0); | ||
612 | |||
601 | /* Immediately update the plane's legacy fb pointer, so that later | 613 | /* Immediately update the plane's legacy fb pointer, so that later |
602 | * modeset prep sees the state that will be present when the semaphore | 614 | * modeset prep sees the state that will be present when the semaphore |
603 | * is released. | 615 | * is released. |
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index 3446ece21b4a..250ed7e3754c 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c | |||
@@ -66,12 +66,12 @@ static const struct file_operations vc4_drm_fops = { | |||
66 | }; | 66 | }; |
67 | 67 | ||
68 | static const struct drm_ioctl_desc vc4_drm_ioctls[] = { | 68 | static const struct drm_ioctl_desc vc4_drm_ioctls[] = { |
69 | DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, 0), | 69 | DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW), |
70 | DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, 0), | 70 | DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW), |
71 | DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, 0), | 71 | DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW), |
72 | DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0), | 72 | DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW), |
73 | DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0), | 73 | DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW), |
74 | DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0), | 74 | DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW), |
75 | DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl, | 75 | DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl, |
76 | DRM_ROOT_ONLY), | 76 | DRM_ROOT_ONLY), |
77 | }; | 77 | }; |
@@ -91,7 +91,7 @@ static struct drm_driver vc4_drm_driver = { | |||
91 | 91 | ||
92 | .enable_vblank = vc4_enable_vblank, | 92 | .enable_vblank = vc4_enable_vblank, |
93 | .disable_vblank = vc4_disable_vblank, | 93 | .disable_vblank = vc4_disable_vblank, |
94 | .get_vblank_counter = drm_vblank_count, | 94 | .get_vblank_counter = drm_vblank_no_hw_counter, |
95 | 95 | ||
96 | #if defined(CONFIG_DEBUG_FS) | 96 | #if defined(CONFIG_DEBUG_FS) |
97 | .debugfs_init = vc4_debugfs_init, | 97 | .debugfs_init = vc4_debugfs_init, |
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index cb37751bc99f..861a623bc185 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c | |||
@@ -117,10 +117,18 @@ static int vc4_atomic_commit(struct drm_device *dev, | |||
117 | return -ENOMEM; | 117 | return -ENOMEM; |
118 | 118 | ||
119 | /* Make sure that any outstanding modesets have finished. */ | 119 | /* Make sure that any outstanding modesets have finished. */ |
120 | ret = down_interruptible(&vc4->async_modeset); | 120 | if (nonblock) { |
121 | if (ret) { | 121 | ret = down_trylock(&vc4->async_modeset); |
122 | kfree(c); | 122 | if (ret) { |
123 | return ret; | 123 | kfree(c); |
124 | return -EBUSY; | ||
125 | } | ||
126 | } else { | ||
127 | ret = down_interruptible(&vc4->async_modeset); | ||
128 | if (ret) { | ||
129 | kfree(c); | ||
130 | return ret; | ||
131 | } | ||
124 | } | 132 | } |
125 | 133 | ||
126 | ret = drm_atomic_helper_prepare_planes(dev, state); | 134 | ret = drm_atomic_helper_prepare_planes(dev, state); |
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 6163b95c5411..f99eece4cc97 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h | |||
@@ -341,6 +341,10 @@ | |||
341 | #define SCALER_DISPLACT0 0x00000030 | 341 | #define SCALER_DISPLACT0 0x00000030 |
342 | #define SCALER_DISPLACT1 0x00000034 | 342 | #define SCALER_DISPLACT1 0x00000034 |
343 | #define SCALER_DISPLACT2 0x00000038 | 343 | #define SCALER_DISPLACT2 0x00000038 |
344 | #define SCALER_DISPLACTX(x) (SCALER_DISPLACT0 + \ | ||
345 | (x) * (SCALER_DISPLACT1 - \ | ||
346 | SCALER_DISPLACT0)) | ||
347 | |||
344 | #define SCALER_DISPCTRL0 0x00000040 | 348 | #define SCALER_DISPCTRL0 0x00000040 |
345 | # define SCALER_DISPCTRLX_ENABLE BIT(31) | 349 | # define SCALER_DISPCTRLX_ENABLE BIT(31) |
346 | # define SCALER_DISPCTRLX_RESET BIT(30) | 350 | # define SCALER_DISPCTRLX_RESET BIT(30) |