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authorJohn Crispin <blogic@openwrt.org>2015-11-04 07:14:15 -0500
committerRalf Baechle <ralf@linux-mips.org>2015-11-11 02:38:23 -0500
commit9eb8c69e0b00d5e7970a682454180780b6a3d020 (patch)
tree70484815a6057ba04681c27e415d9b45daa88f50
parent26cfdbe30d81c209a5e81c4c311b02b10b5821c3 (diff)
MIPS: lantiq: Force the crossbar to big endian
Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11450/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/lantiq/xway/reset.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index 4b52ce6d38f8..bc29bb349e94 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -40,6 +40,10 @@
40#define RCU_GFS_ADD2_XRX330 0x00AC 40#define RCU_GFS_ADD2_XRX330 0x00AC
41#define RCU_GFS_ADD3_XRX330 0x0264 41#define RCU_GFS_ADD3_XRX330 0x0264
42 42
43/* xbar BE flag */
44#define RCU_AHB_ENDIAN 0x004C
45#define RCU_VR9_BE_AHB1S 0x00000008
46
43/* reboot bit */ 47/* reboot bit */
44#define RCU_RD_GPHY0_XRX200 BIT(31) 48#define RCU_RD_GPHY0_XRX200 BIT(31)
45#define RCU_RD_SRST BIT(30) 49#define RCU_RD_SRST BIT(30)
@@ -369,6 +373,10 @@ static int __init mips_reboot_setup(void)
369 of_machine_is_compatible("lantiq,vr9")) 373 of_machine_is_compatible("lantiq,vr9"))
370 ltq_usb_init(); 374 ltq_usb_init();
371 375
376 if (of_machine_is_compatible("lantiq,vr9"))
377 ltq_rcu_w32(ltq_rcu_r32(RCU_AHB_ENDIAN) | RCU_VR9_BE_AHB1S,
378 RCU_AHB_ENDIAN);
379
372 _machine_restart = ltq_machine_restart; 380 _machine_restart = ltq_machine_restart;
373 _machine_halt = ltq_machine_halt; 381 _machine_halt = ltq_machine_halt;
374 pm_power_off = ltq_machine_power_off; 382 pm_power_off = ltq_machine_power_off;