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authorCarlo Caione <carlo@endlessm.com>2016-03-01 17:04:34 -0500
committerLinus Walleij <linus.walleij@linaro.org>2016-03-09 01:00:28 -0500
commit9dab1868ec0db4bce44db2759beadf1b2156085a (patch)
tree99f1a7baf782f0c59fb8d7aa5647b489e99d78e8
parentac1afc46573a7d5447f23be5f88bc43580a92530 (diff)
pinctrl: amlogic: Make driver independent from two-domain configuration
In the Amlogic Meson8 / Meson8b platforms we have two different buses: cbus and aobus, corresponding to 2 different power domains (regular and always-on). On each bus a different set of registers is mapped to manage muxes, GPIOs and in general to control a clear subset of the pins. Considering this architecture, having two different pinctrl devices, one for each bus / power domain, makes much more sense than just having one single device. Right now we have one single pin controller driver that uses two different domains (represented by 'gpio' and 'gpio-ao' sub-nodes in the DTS) to manage the set of registers on the two buses. This dual-domain configuration is hardcoded into the driver that strictly requires one domain for each bus in the same pin controller device. With this patch we refactor the driver to allow splitting the driver in two parts. This change is needed to have a proper description of the HW in the device-tree where we want to introduce aobus and cbus. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.c135
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h21
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson8.c137
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson8b.c159
4 files changed, 228 insertions, 224 deletions
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index 3dd1a446f6f4..0bdb8fd3afd1 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -103,15 +103,13 @@ static int meson_get_domain_and_bank(struct meson_pinctrl *pc, unsigned int pin,
103 struct meson_bank **bank) 103 struct meson_bank **bank)
104{ 104{
105 struct meson_domain *d; 105 struct meson_domain *d;
106 int i;
107 106
108 for (i = 0; i < pc->data->num_domains; i++) { 107 d = pc->domain;
109 d = &pc->domains[i]; 108
110 if (pin >= d->data->pin_base && 109 if (pin >= d->data->pin_base &&
111 pin < d->data->pin_base + d->data->num_pins) { 110 pin < d->data->pin_base + d->data->num_pins) {
112 *domain = d; 111 *domain = d;
113 return meson_get_bank(d, pin, bank); 112 return meson_get_bank(d, pin, bank);
114 }
115 } 113 }
116 114
117 return -EINVAL; 115 return -EINVAL;
@@ -203,7 +201,7 @@ static void meson_pmx_disable_other_groups(struct meson_pinctrl *pc,
203 for (j = 0; j < group->num_pins; j++) { 201 for (j = 0; j < group->num_pins; j++) {
204 if (group->pins[j] == pin) { 202 if (group->pins[j] == pin) {
205 /* We have found a group using the pin */ 203 /* We have found a group using the pin */
206 domain = &pc->domains[group->domain]; 204 domain = pc->domain;
207 regmap_update_bits(domain->reg_mux, 205 regmap_update_bits(domain->reg_mux,
208 group->reg * 4, 206 group->reg * 4,
209 BIT(group->bit), 0); 207 BIT(group->bit), 0);
@@ -218,7 +216,7 @@ static int meson_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
218 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); 216 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
219 struct meson_pmx_func *func = &pc->data->funcs[func_num]; 217 struct meson_pmx_func *func = &pc->data->funcs[func_num];
220 struct meson_pmx_group *group = &pc->data->groups[group_num]; 218 struct meson_pmx_group *group = &pc->data->groups[group_num];
221 struct meson_domain *domain = &pc->domains[group->domain]; 219 struct meson_domain *domain = pc->domain;
222 int i, ret = 0; 220 int i, ret = 0;
223 221
224 dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, 222 dev_dbg(pc->dev, "enable function %s, group %s\n", func->name,
@@ -536,12 +534,20 @@ static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
536 534
537static const struct of_device_id meson_pinctrl_dt_match[] = { 535static const struct of_device_id meson_pinctrl_dt_match[] = {
538 { 536 {
539 .compatible = "amlogic,meson8-pinctrl", 537 .compatible = "amlogic,meson8-cbus-pinctrl",
540 .data = &meson8_pinctrl_data, 538 .data = &meson8_cbus_pinctrl_data,
539 },
540 {
541 .compatible = "amlogic,meson8b-cbus-pinctrl",
542 .data = &meson8b_cbus_pinctrl_data,
543 },
544 {
545 .compatible = "amlogic,meson8-aobus-pinctrl",
546 .data = &meson8_aobus_pinctrl_data,
541 }, 547 },
542 { 548 {
543 .compatible = "amlogic,meson8b-pinctrl", 549 .compatible = "amlogic,meson8b-aobus-pinctrl",
544 .data = &meson8b_pinctrl_data, 550 .data = &meson8b_aobus_pinctrl_data,
545 }, 551 },
546 { }, 552 { },
547}; 553};
@@ -549,62 +555,46 @@ static const struct of_device_id meson_pinctrl_dt_match[] = {
549static int meson_gpiolib_register(struct meson_pinctrl *pc) 555static int meson_gpiolib_register(struct meson_pinctrl *pc)
550{ 556{
551 struct meson_domain *domain; 557 struct meson_domain *domain;
552 int i, ret; 558 int ret;
553 559
554 for (i = 0; i < pc->data->num_domains; i++) { 560 domain = pc->domain;
555 domain = &pc->domains[i]; 561
556 562 domain->chip.label = domain->data->name;
557 domain->chip.label = domain->data->name; 563 domain->chip.parent = pc->dev;
558 domain->chip.parent = pc->dev; 564 domain->chip.request = meson_gpio_request;
559 domain->chip.request = meson_gpio_request; 565 domain->chip.free = meson_gpio_free;
560 domain->chip.free = meson_gpio_free; 566 domain->chip.direction_input = meson_gpio_direction_input;
561 domain->chip.direction_input = meson_gpio_direction_input; 567 domain->chip.direction_output = meson_gpio_direction_output;
562 domain->chip.direction_output = meson_gpio_direction_output; 568 domain->chip.get = meson_gpio_get;
563 domain->chip.get = meson_gpio_get; 569 domain->chip.set = meson_gpio_set;
564 domain->chip.set = meson_gpio_set; 570 domain->chip.base = domain->data->pin_base;
565 domain->chip.base = domain->data->pin_base; 571 domain->chip.ngpio = domain->data->num_pins;
566 domain->chip.ngpio = domain->data->num_pins; 572 domain->chip.can_sleep = false;
567 domain->chip.can_sleep = false; 573 domain->chip.of_node = domain->of_node;
568 domain->chip.of_node = domain->of_node; 574 domain->chip.of_gpio_n_cells = 2;
569 domain->chip.of_gpio_n_cells = 2; 575
570 576 ret = gpiochip_add_data(&domain->chip, domain);
571 ret = gpiochip_add_data(&domain->chip, domain); 577 if (ret) {
572 if (ret) { 578 dev_err(pc->dev, "can't add gpio chip %s\n",
573 dev_err(pc->dev, "can't add gpio chip %s\n", 579 domain->data->name);
574 domain->data->name); 580 goto fail;
575 goto fail; 581 }
576 }
577 582
578 ret = gpiochip_add_pin_range(&domain->chip, dev_name(pc->dev), 583 ret = gpiochip_add_pin_range(&domain->chip, dev_name(pc->dev),
579 0, domain->data->pin_base, 584 0, domain->data->pin_base,
580 domain->chip.ngpio); 585 domain->chip.ngpio);
581 if (ret) { 586 if (ret) {
582 dev_err(pc->dev, "can't add pin range\n"); 587 dev_err(pc->dev, "can't add pin range\n");
583 goto fail; 588 goto fail;
584 }
585 } 589 }
586 590
587 return 0; 591 return 0;
588fail: 592fail:
589 for (i--; i >= 0; i--) 593 gpiochip_remove(&pc->domain->chip);
590 gpiochip_remove(&pc->domains[i].chip);
591 594
592 return ret; 595 return ret;
593} 596}
594 597
595static struct meson_domain_data *meson_get_domain_data(struct meson_pinctrl *pc,
596 struct device_node *np)
597{
598 int i;
599
600 for (i = 0; i < pc->data->num_domains; i++) {
601 if (!strcmp(np->name, pc->data->domain_data[i].name))
602 return &pc->data->domain_data[i];
603 }
604
605 return NULL;
606}
607
608static struct regmap_config meson_regmap_config = { 598static struct regmap_config meson_regmap_config = {
609 .reg_bits = 32, 599 .reg_bits = 32,
610 .val_bits = 32, 600 .val_bits = 32,
@@ -641,7 +631,7 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
641{ 631{
642 struct device_node *np; 632 struct device_node *np;
643 struct meson_domain *domain; 633 struct meson_domain *domain;
644 int i = 0, num_domains = 0; 634 int num_domains = 0;
645 635
646 for_each_child_of_node(node, np) { 636 for_each_child_of_node(node, np) {
647 if (!of_find_property(np, "gpio-controller", NULL)) 637 if (!of_find_property(np, "gpio-controller", NULL))
@@ -649,29 +639,22 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
649 num_domains++; 639 num_domains++;
650 } 640 }
651 641
652 if (num_domains != pc->data->num_domains) { 642 if (num_domains != 1) {
653 dev_err(pc->dev, "wrong number of subnodes\n"); 643 dev_err(pc->dev, "wrong number of subnodes\n");
654 return -EINVAL; 644 return -EINVAL;
655 } 645 }
656 646
657 pc->domains = devm_kzalloc(pc->dev, num_domains * 647 pc->domain = devm_kzalloc(pc->dev, sizeof(struct meson_domain), GFP_KERNEL);
658 sizeof(struct meson_domain), GFP_KERNEL); 648 if (!pc->domain)
659 if (!pc->domains)
660 return -ENOMEM; 649 return -ENOMEM;
661 650
651 domain = pc->domain;
652 domain->data = pc->data->domain_data;
653
662 for_each_child_of_node(node, np) { 654 for_each_child_of_node(node, np) {
663 if (!of_find_property(np, "gpio-controller", NULL)) 655 if (!of_find_property(np, "gpio-controller", NULL))
664 continue; 656 continue;
665 657
666 domain = &pc->domains[i];
667
668 domain->data = meson_get_domain_data(pc, np);
669 if (!domain->data) {
670 dev_err(pc->dev, "domain data not found for node %s\n",
671 np->name);
672 return -ENODEV;
673 }
674
675 domain->of_node = np; 658 domain->of_node = np;
676 659
677 domain->reg_mux = meson_map_resource(pc, np, "mux"); 660 domain->reg_mux = meson_map_resource(pc, np, "mux");
@@ -697,7 +680,7 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
697 return PTR_ERR(domain->reg_gpio); 680 return PTR_ERR(domain->reg_gpio);
698 } 681 }
699 682
700 i++; 683 break;
701 } 684 }
702 685
703 return 0; 686 return 0;
@@ -716,7 +699,7 @@ static int meson_pinctrl_probe(struct platform_device *pdev)
716 699
717 pc->dev = dev; 700 pc->dev = dev;
718 match = of_match_node(meson_pinctrl_dt_match, pdev->dev.of_node); 701 match = of_match_node(meson_pinctrl_dt_match, pdev->dev.of_node);
719 pc->data = (struct meson_pinctrl_data *)match->data; 702 pc->data = (struct meson_pinctrl_data *) match->data;
720 703
721 ret = meson_pinctrl_parse_dt(pc, pdev->dev.of_node); 704 ret = meson_pinctrl_parse_dt(pc, pdev->dev.of_node);
722 if (ret) 705 if (ret)
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index 0fe7d53849ce..9c93e0d494a3 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -34,7 +34,6 @@ struct meson_pmx_group {
34 bool is_gpio; 34 bool is_gpio;
35 unsigned int reg; 35 unsigned int reg;
36 unsigned int bit; 36 unsigned int bit;
37 unsigned int domain;
38}; 37};
39 38
40/** 39/**
@@ -144,7 +143,6 @@ struct meson_pinctrl_data {
144 unsigned int num_pins; 143 unsigned int num_pins;
145 unsigned int num_groups; 144 unsigned int num_groups;
146 unsigned int num_funcs; 145 unsigned int num_funcs;
147 unsigned int num_domains;
148}; 146};
149 147
150struct meson_pinctrl { 148struct meson_pinctrl {
@@ -152,7 +150,7 @@ struct meson_pinctrl {
152 struct pinctrl_dev *pcdev; 150 struct pinctrl_dev *pcdev;
153 struct pinctrl_desc desc; 151 struct pinctrl_desc desc;
154 struct meson_pinctrl_data *data; 152 struct meson_pinctrl_data *data;
155 struct meson_domain *domains; 153 struct meson_domain *domain;
156}; 154};
157 155
158#define PIN(x, b) (b + x) 156#define PIN(x, b) (b + x)
@@ -164,7 +162,6 @@ struct meson_pinctrl {
164 .num_pins = ARRAY_SIZE(grp ## _pins), \ 162 .num_pins = ARRAY_SIZE(grp ## _pins), \
165 .reg = r, \ 163 .reg = r, \
166 .bit = b, \ 164 .bit = b, \
167 .domain = 0, \
168 } 165 }
169 166
170#define GPIO_GROUP(gpio, b) \ 167#define GPIO_GROUP(gpio, b) \
@@ -175,16 +172,6 @@ struct meson_pinctrl {
175 .is_gpio = true, \ 172 .is_gpio = true, \
176 } 173 }
177 174
178#define GROUP_AO(grp, r, b) \
179 { \
180 .name = #grp, \
181 .pins = grp ## _pins, \
182 .num_pins = ARRAY_SIZE(grp ## _pins), \
183 .reg = r, \
184 .bit = b, \
185 .domain = 1, \
186 }
187
188#define FUNCTION(fn) \ 175#define FUNCTION(fn) \
189 { \ 176 { \
190 .name = #fn, \ 177 .name = #fn, \
@@ -208,5 +195,7 @@ struct meson_pinctrl {
208 195
209#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x) 196#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
210 197
211extern struct meson_pinctrl_data meson8_pinctrl_data; 198extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
212extern struct meson_pinctrl_data meson8b_pinctrl_data; 199extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
200extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
201extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index 7b1cc91733ef..32de191e0807 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -16,7 +16,7 @@
16 16
17#define AO_OFF 120 17#define AO_OFF 120
18 18
19static const struct pinctrl_pin_desc meson8_pins[] = { 19static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
20 MESON_PIN(GPIOX_0, 0), 20 MESON_PIN(GPIOX_0, 0),
21 MESON_PIN(GPIOX_1, 0), 21 MESON_PIN(GPIOX_1, 0),
22 MESON_PIN(GPIOX_2, 0), 22 MESON_PIN(GPIOX_2, 0),
@@ -137,6 +137,9 @@ static const struct pinctrl_pin_desc meson8_pins[] = {
137 MESON_PIN(BOOT_16, 0), 137 MESON_PIN(BOOT_16, 0),
138 MESON_PIN(BOOT_17, 0), 138 MESON_PIN(BOOT_17, 0),
139 MESON_PIN(BOOT_18, 0), 139 MESON_PIN(BOOT_18, 0),
140};
141
142static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
140 MESON_PIN(GPIOAO_0, AO_OFF), 143 MESON_PIN(GPIOAO_0, AO_OFF),
141 MESON_PIN(GPIOAO_1, AO_OFF), 144 MESON_PIN(GPIOAO_1, AO_OFF),
142 MESON_PIN(GPIOAO_2, AO_OFF), 145 MESON_PIN(GPIOAO_2, AO_OFF),
@@ -379,7 +382,7 @@ static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
379static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; 382static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
380static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; 383static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
381 384
382static struct meson_pmx_group meson8_groups[] = { 385static struct meson_pmx_group meson8_cbus_groups[] = {
383 GPIO_GROUP(GPIOX_0, 0), 386 GPIO_GROUP(GPIOX_0, 0),
384 GPIO_GROUP(GPIOX_1, 0), 387 GPIO_GROUP(GPIOX_1, 0),
385 GPIO_GROUP(GPIOX_2, 0), 388 GPIO_GROUP(GPIOX_2, 0),
@@ -474,22 +477,6 @@ static struct meson_pmx_group meson8_groups[] = {
474 GPIO_GROUP(GPIOZ_12, 0), 477 GPIO_GROUP(GPIOZ_12, 0),
475 GPIO_GROUP(GPIOZ_13, 0), 478 GPIO_GROUP(GPIOZ_13, 0),
476 GPIO_GROUP(GPIOZ_14, 0), 479 GPIO_GROUP(GPIOZ_14, 0),
477 GPIO_GROUP(GPIOAO_0, AO_OFF),
478 GPIO_GROUP(GPIOAO_1, AO_OFF),
479 GPIO_GROUP(GPIOAO_2, AO_OFF),
480 GPIO_GROUP(GPIOAO_3, AO_OFF),
481 GPIO_GROUP(GPIOAO_4, AO_OFF),
482 GPIO_GROUP(GPIOAO_5, AO_OFF),
483 GPIO_GROUP(GPIOAO_6, AO_OFF),
484 GPIO_GROUP(GPIOAO_7, AO_OFF),
485 GPIO_GROUP(GPIOAO_8, AO_OFF),
486 GPIO_GROUP(GPIOAO_9, AO_OFF),
487 GPIO_GROUP(GPIOAO_10, AO_OFF),
488 GPIO_GROUP(GPIOAO_11, AO_OFF),
489 GPIO_GROUP(GPIOAO_12, AO_OFF),
490 GPIO_GROUP(GPIOAO_13, AO_OFF),
491 GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
492 GPIO_GROUP(GPIO_TEST_N, AO_OFF),
493 480
494 /* bank X */ 481 /* bank X */
495 GROUP(sd_d0_a, 8, 5), 482 GROUP(sd_d0_a, 8, 5),
@@ -675,26 +662,45 @@ static struct meson_pmx_group meson8_groups[] = {
675 GROUP(sdxc_d0_b, 2, 7), 662 GROUP(sdxc_d0_b, 2, 7),
676 GROUP(sdxc_clk_b, 2, 5), 663 GROUP(sdxc_clk_b, 2, 5),
677 GROUP(sdxc_cmd_b, 2, 4), 664 GROUP(sdxc_cmd_b, 2, 4),
665};
666
667static struct meson_pmx_group meson8_aobus_groups[] = {
668 GPIO_GROUP(GPIOAO_0, AO_OFF),
669 GPIO_GROUP(GPIOAO_1, AO_OFF),
670 GPIO_GROUP(GPIOAO_2, AO_OFF),
671 GPIO_GROUP(GPIOAO_3, AO_OFF),
672 GPIO_GROUP(GPIOAO_4, AO_OFF),
673 GPIO_GROUP(GPIOAO_5, AO_OFF),
674 GPIO_GROUP(GPIOAO_6, AO_OFF),
675 GPIO_GROUP(GPIOAO_7, AO_OFF),
676 GPIO_GROUP(GPIOAO_8, AO_OFF),
677 GPIO_GROUP(GPIOAO_9, AO_OFF),
678 GPIO_GROUP(GPIOAO_10, AO_OFF),
679 GPIO_GROUP(GPIOAO_11, AO_OFF),
680 GPIO_GROUP(GPIOAO_12, AO_OFF),
681 GPIO_GROUP(GPIOAO_13, AO_OFF),
682 GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
683 GPIO_GROUP(GPIO_TEST_N, AO_OFF),
678 684
679 /* bank AO */ 685 /* bank AO */
680 GROUP_AO(uart_tx_ao_a, 0, 12), 686 GROUP(uart_tx_ao_a, 0, 12),
681 GROUP_AO(uart_rx_ao_a, 0, 11), 687 GROUP(uart_rx_ao_a, 0, 11),
682 GROUP_AO(uart_cts_ao_a, 0, 10), 688 GROUP(uart_cts_ao_a, 0, 10),
683 GROUP_AO(uart_rts_ao_a, 0, 9), 689 GROUP(uart_rts_ao_a, 0, 9),
684 690
685 GROUP_AO(remote_input, 0, 0), 691 GROUP(remote_input, 0, 0),
686 692
687 GROUP_AO(i2c_slave_sck_ao, 0, 2), 693 GROUP(i2c_slave_sck_ao, 0, 2),
688 GROUP_AO(i2c_slave_sda_ao, 0, 1), 694 GROUP(i2c_slave_sda_ao, 0, 1),
689 695
690 GROUP_AO(uart_tx_ao_b0, 0, 26), 696 GROUP(uart_tx_ao_b0, 0, 26),
691 GROUP_AO(uart_rx_ao_b0, 0, 25), 697 GROUP(uart_rx_ao_b0, 0, 25),
692 698
693 GROUP_AO(uart_tx_ao_b1, 0, 24), 699 GROUP(uart_tx_ao_b1, 0, 24),
694 GROUP_AO(uart_rx_ao_b1, 0, 23), 700 GROUP(uart_rx_ao_b1, 0, 23),
695 701
696 GROUP_AO(i2c_mst_sck_ao, 0, 6), 702 GROUP(i2c_mst_sck_ao, 0, 6),
697 GROUP_AO(i2c_mst_sda_ao, 0, 5), 703 GROUP(i2c_mst_sda_ao, 0, 5),
698}; 704};
699 705
700static const char * const gpio_groups[] = { 706static const char * const gpio_groups[] = {
@@ -872,7 +878,7 @@ static const char * const i2c_mst_ao_groups[] = {
872 "i2c_mst_sck_ao", "i2c_mst_sda_ao" 878 "i2c_mst_sck_ao", "i2c_mst_sda_ao"
873}; 879};
874 880
875static struct meson_pmx_func meson8_functions[] = { 881static struct meson_pmx_func meson8_cbus_functions[] = {
876 FUNCTION(gpio), 882 FUNCTION(gpio),
877 FUNCTION(sd_a), 883 FUNCTION(sd_a),
878 FUNCTION(sdxc_a), 884 FUNCTION(sdxc_a),
@@ -899,6 +905,9 @@ static struct meson_pmx_func meson8_functions[] = {
899 FUNCTION(nor), 905 FUNCTION(nor),
900 FUNCTION(sd_b), 906 FUNCTION(sd_b),
901 FUNCTION(sdxc_b), 907 FUNCTION(sdxc_b),
908};
909
910static struct meson_pmx_func meson8_aobus_functions[] = {
902 FUNCTION(uart_ao), 911 FUNCTION(uart_ao),
903 FUNCTION(remote), 912 FUNCTION(remote),
904 FUNCTION(i2c_slave_ao), 913 FUNCTION(i2c_slave_ao),
@@ -906,7 +915,7 @@ static struct meson_pmx_func meson8_functions[] = {
906 FUNCTION(i2c_mst_ao), 915 FUNCTION(i2c_mst_ao),
907}; 916};
908 917
909static struct meson_bank meson8_banks[] = { 918static struct meson_bank meson8_cbus_banks[] = {
910 /* name first last pullen pull dir out in */ 919 /* name first last pullen pull dir out in */
911 BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), 920 BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
912 BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), 921 BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
@@ -917,35 +926,43 @@ static struct meson_bank meson8_banks[] = {
917 BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), 926 BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
918}; 927};
919 928
920static struct meson_bank meson8_ao_banks[] = { 929static struct meson_bank meson8_aobus_banks[] = {
921 /* name first last pullen pull dir out in */ 930 /* name first last pullen pull dir out in */
922 BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), 931 BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
923}; 932};
924 933
925static struct meson_domain_data meson8_domain_data[] = { 934static struct meson_domain_data meson8_cbus_domain_data = {
926 { 935 .name = "cbus-banks",
927 .name = "banks", 936 .banks = meson8_cbus_banks,
928 .banks = meson8_banks, 937 .num_banks = ARRAY_SIZE(meson8_cbus_banks),
929 .num_banks = ARRAY_SIZE(meson8_banks), 938 .pin_base = 0,
930 .pin_base = 0, 939 .num_pins = 120,
931 .num_pins = 120, 940};
932 }, 941
933 { 942static struct meson_domain_data meson8_aobus_domain_data = {
934 .name = "ao-bank", 943 .name = "ao-bank",
935 .banks = meson8_ao_banks, 944 .banks = meson8_aobus_banks,
936 .num_banks = ARRAY_SIZE(meson8_ao_banks), 945 .num_banks = ARRAY_SIZE(meson8_aobus_banks),
937 .pin_base = 120, 946 .pin_base = 120,
938 .num_pins = 16, 947 .num_pins = 16,
939 }, 948};
940}; 949
941 950struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
942struct meson_pinctrl_data meson8_pinctrl_data = { 951 .pins = meson8_cbus_pins,
943 .pins = meson8_pins, 952 .groups = meson8_cbus_groups,
944 .groups = meson8_groups, 953 .funcs = meson8_cbus_functions,
945 .funcs = meson8_functions, 954 .domain_data = &meson8_cbus_domain_data,
946 .domain_data = meson8_domain_data, 955 .num_pins = ARRAY_SIZE(meson8_cbus_pins),
947 .num_pins = ARRAY_SIZE(meson8_pins), 956 .num_groups = ARRAY_SIZE(meson8_cbus_groups),
948 .num_groups = ARRAY_SIZE(meson8_groups), 957 .num_funcs = ARRAY_SIZE(meson8_cbus_functions),
949 .num_funcs = ARRAY_SIZE(meson8_functions), 958};
950 .num_domains = ARRAY_SIZE(meson8_domain_data), 959
960struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
961 .pins = meson8_aobus_pins,
962 .groups = meson8_aobus_groups,
963 .funcs = meson8_aobus_functions,
964 .domain_data = &meson8_aobus_domain_data,
965 .num_pins = ARRAY_SIZE(meson8_aobus_pins),
966 .num_groups = ARRAY_SIZE(meson8_aobus_groups),
967 .num_funcs = ARRAY_SIZE(meson8_aobus_functions),
951}; 968};
diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
index 0c9572edd843..a100bcf4b17f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8b.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
@@ -17,7 +17,7 @@
17 17
18#define AO_OFF 130 18#define AO_OFF 130
19 19
20static const struct pinctrl_pin_desc meson8b_pins[] = { 20static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
21 MESON_PIN(GPIOX_0, 0), 21 MESON_PIN(GPIOX_0, 0),
22 MESON_PIN(GPIOX_1, 0), 22 MESON_PIN(GPIOX_1, 0),
23 MESON_PIN(GPIOX_2, 0), 23 MESON_PIN(GPIOX_2, 0),
@@ -107,7 +107,9 @@ static const struct pinctrl_pin_desc meson8b_pins[] = {
107 MESON_PIN(DIF_3_N, 0), 107 MESON_PIN(DIF_3_N, 0),
108 MESON_PIN(DIF_4_P, 0), 108 MESON_PIN(DIF_4_P, 0),
109 MESON_PIN(DIF_4_N, 0), 109 MESON_PIN(DIF_4_N, 0),
110};
110 111
112static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
111 MESON_PIN(GPIOAO_0, AO_OFF), 113 MESON_PIN(GPIOAO_0, AO_OFF),
112 MESON_PIN(GPIOAO_1, AO_OFF), 114 MESON_PIN(GPIOAO_1, AO_OFF),
113 MESON_PIN(GPIOAO_2, AO_OFF), 115 MESON_PIN(GPIOAO_2, AO_OFF),
@@ -346,7 +348,7 @@ static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) };
346static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) }; 348static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) };
347static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) }; 349static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) };
348 350
349static struct meson_pmx_group meson8b_groups[] = { 351static struct meson_pmx_group meson8b_cbus_groups[] = {
350 GPIO_GROUP(GPIOX_0, 0), 352 GPIO_GROUP(GPIOX_0, 0),
351 GPIO_GROUP(GPIOX_1, 0), 353 GPIO_GROUP(GPIOX_1, 0),
352 GPIO_GROUP(GPIOX_2, 0), 354 GPIO_GROUP(GPIOX_2, 0),
@@ -409,23 +411,6 @@ static struct meson_pmx_group meson8b_groups[] = {
409 GPIO_GROUP(DIF_4_P, 0), 411 GPIO_GROUP(DIF_4_P, 0),
410 GPIO_GROUP(DIF_4_N, 0), 412 GPIO_GROUP(DIF_4_N, 0),
411 413
412 GPIO_GROUP(GPIOAO_0, AO_OFF),
413 GPIO_GROUP(GPIOAO_1, AO_OFF),
414 GPIO_GROUP(GPIOAO_2, AO_OFF),
415 GPIO_GROUP(GPIOAO_3, AO_OFF),
416 GPIO_GROUP(GPIOAO_4, AO_OFF),
417 GPIO_GROUP(GPIOAO_5, AO_OFF),
418 GPIO_GROUP(GPIOAO_6, AO_OFF),
419 GPIO_GROUP(GPIOAO_7, AO_OFF),
420 GPIO_GROUP(GPIOAO_8, AO_OFF),
421 GPIO_GROUP(GPIOAO_9, AO_OFF),
422 GPIO_GROUP(GPIOAO_10, AO_OFF),
423 GPIO_GROUP(GPIOAO_11, AO_OFF),
424 GPIO_GROUP(GPIOAO_12, AO_OFF),
425 GPIO_GROUP(GPIOAO_13, AO_OFF),
426 GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
427 GPIO_GROUP(GPIO_TEST_N, AO_OFF),
428
429 /* bank X */ 414 /* bank X */
430 GROUP(sd_d0_a, 8, 5), 415 GROUP(sd_d0_a, 8, 5),
431 GROUP(sd_d1_a, 8, 4), 416 GROUP(sd_d1_a, 8, 4),
@@ -572,6 +557,37 @@ static struct meson_pmx_group meson8b_groups[] = {
572 GROUP(sdxc_clk_b, 2, 5), 557 GROUP(sdxc_clk_b, 2, 5),
573 GROUP(sdxc_cmd_b, 2, 4), 558 GROUP(sdxc_cmd_b, 2, 4),
574 559
560 /* bank DIF */
561 GROUP(eth_rxd1, 6, 0),
562 GROUP(eth_rxd0, 6, 1),
563 GROUP(eth_rx_dv, 6, 2),
564 GROUP(eth_rx_clk, 6, 3),
565 GROUP(eth_txd0_1, 6, 4),
566 GROUP(eth_txd1_1, 6, 5),
567 GROUP(eth_tx_en, 6, 0),
568 GROUP(eth_ref_clk, 6, 8),
569 GROUP(eth_mdc, 6, 9),
570 GROUP(eth_mdio_en, 6, 10),
571};
572
573static struct meson_pmx_group meson8b_aobus_groups[] = {
574 GPIO_GROUP(GPIOAO_0, AO_OFF),
575 GPIO_GROUP(GPIOAO_1, AO_OFF),
576 GPIO_GROUP(GPIOAO_2, AO_OFF),
577 GPIO_GROUP(GPIOAO_3, AO_OFF),
578 GPIO_GROUP(GPIOAO_4, AO_OFF),
579 GPIO_GROUP(GPIOAO_5, AO_OFF),
580 GPIO_GROUP(GPIOAO_6, AO_OFF),
581 GPIO_GROUP(GPIOAO_7, AO_OFF),
582 GPIO_GROUP(GPIOAO_8, AO_OFF),
583 GPIO_GROUP(GPIOAO_9, AO_OFF),
584 GPIO_GROUP(GPIOAO_10, AO_OFF),
585 GPIO_GROUP(GPIOAO_11, AO_OFF),
586 GPIO_GROUP(GPIOAO_12, AO_OFF),
587 GPIO_GROUP(GPIOAO_13, AO_OFF),
588 GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
589 GPIO_GROUP(GPIO_TEST_N, AO_OFF),
590
575 /* bank AO */ 591 /* bank AO */
576 GROUP(uart_tx_ao_a, 0, 12), 592 GROUP(uart_tx_ao_a, 0, 12),
577 GROUP(uart_rx_ao_a, 0, 11), 593 GROUP(uart_rx_ao_a, 0, 11),
@@ -601,18 +617,6 @@ static struct meson_pmx_group meson8b_groups[] = {
601 GROUP(i2s_in_ch01, 0, 13), 617 GROUP(i2s_in_ch01, 0, 13),
602 GROUP(i2s_ao_clk_in, 0, 15), 618 GROUP(i2s_ao_clk_in, 0, 15),
603 GROUP(i2s_lr_clk_in, 0, 14), 619 GROUP(i2s_lr_clk_in, 0, 14),
604
605 /* bank DIF */
606 GROUP(eth_rxd1, 6, 0),
607 GROUP(eth_rxd0, 6, 1),
608 GROUP(eth_rx_dv, 6, 2),
609 GROUP(eth_rx_clk, 6, 3),
610 GROUP(eth_txd0_1, 6, 4),
611 GROUP(eth_txd1_1, 6, 5),
612 GROUP(eth_tx_en, 6, 0),
613 GROUP(eth_ref_clk, 6, 8),
614 GROUP(eth_mdc, 6, 9),
615 GROUP(eth_mdio_en, 6, 10),
616}; 620};
617 621
618static const char * const gpio_groups[] = { 622static const char * const gpio_groups[] = {
@@ -774,11 +778,11 @@ static const char * const i2c_mst_ao_groups[] = {
774}; 778};
775 779
776static const char * const clk_24m_groups[] = { 780static const char * const clk_24m_groups[] = {
777 "clk_24m_out", 781 "clk_24m_out"
778}; 782};
779 783
780static const char * const clk_32k_groups[] = { 784static const char * const clk_32k_groups[] = {
781 "clk_32k_in_out", 785 "clk_32k_in_out"
782}; 786};
783 787
784static const char * const spdif_0_groups[] = { 788static const char * const spdif_0_groups[] = {
@@ -829,7 +833,7 @@ static const char * const tsin_b_groups[] = {
829 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b" 833 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
830}; 834};
831 835
832static struct meson_pmx_func meson8b_functions[] = { 836static struct meson_pmx_func meson8b_cbus_functions[] = {
833 FUNCTION(gpio), 837 FUNCTION(gpio),
834 FUNCTION(sd_a), 838 FUNCTION(sd_a),
835 FUNCTION(sdxc_a), 839 FUNCTION(sdxc_a),
@@ -842,7 +846,6 @@ static struct meson_pmx_func meson8b_functions[] = {
842 FUNCTION(uart_c), 846 FUNCTION(uart_c),
843 FUNCTION(i2c_c), 847 FUNCTION(i2c_c),
844 FUNCTION(hdmi), 848 FUNCTION(hdmi),
845 FUNCTION(hdmi_cec),
846 FUNCTION(spi), 849 FUNCTION(spi),
847 FUNCTION(ethernet), 850 FUNCTION(ethernet),
848 FUNCTION(i2c_a), 851 FUNCTION(i2c_a),
@@ -853,18 +856,9 @@ static struct meson_pmx_func meson8b_functions[] = {
853 FUNCTION(nor), 856 FUNCTION(nor),
854 FUNCTION(sd_b), 857 FUNCTION(sd_b),
855 FUNCTION(sdxc_b), 858 FUNCTION(sdxc_b),
856 FUNCTION(uart_ao),
857 FUNCTION(remote),
858 FUNCTION(i2c_slave_ao),
859 FUNCTION(uart_ao_b),
860 FUNCTION(i2c_mst_ao),
861 FUNCTION(clk_32k),
862 FUNCTION(spdif_0), 859 FUNCTION(spdif_0),
863 FUNCTION(spdif_1),
864 FUNCTION(i2s),
865 FUNCTION(pwm_b), 860 FUNCTION(pwm_b),
866 FUNCTION(pwm_c), 861 FUNCTION(pwm_c),
867 FUNCTION(pwm_c_ao),
868 FUNCTION(pwm_d), 862 FUNCTION(pwm_d),
869 FUNCTION(pwm_e), 863 FUNCTION(pwm_e),
870 FUNCTION(pwm_vs), 864 FUNCTION(pwm_vs),
@@ -873,7 +867,20 @@ static struct meson_pmx_func meson8b_functions[] = {
873 FUNCTION(clk_24m), 867 FUNCTION(clk_24m),
874}; 868};
875 869
876static struct meson_bank meson8b_banks[] = { 870static struct meson_pmx_func meson8b_aobus_functions[] = {
871 FUNCTION(uart_ao),
872 FUNCTION(uart_ao_b),
873 FUNCTION(i2c_slave_ao),
874 FUNCTION(i2c_mst_ao),
875 FUNCTION(i2s),
876 FUNCTION(remote),
877 FUNCTION(clk_32k),
878 FUNCTION(pwm_c_ao),
879 FUNCTION(spdif_1),
880 FUNCTION(hdmi_cec),
881};
882
883static struct meson_bank meson8b_cbus_banks[] = {
877 /* name first last pullen pull dir out in */ 884 /* name first last pullen pull dir out in */
878 BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), 885 BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
879 BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), 886 BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
@@ -884,35 +891,43 @@ static struct meson_bank meson8b_banks[] = {
884 BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), 5, 8, 5, 8, 12, 12, 13, 12, 14, 12), 891 BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
885}; 892};
886 893
887static struct meson_bank meson8b_ao_banks[] = { 894static struct meson_bank meson8b_aobus_banks[] = {
888 /* name first last pullen pull dir out in */ 895 /* name first last pullen pull dir out in */
889 BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), 896 BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
890}; 897};
891 898
892static struct meson_domain_data meson8b_domain_data[] = { 899static struct meson_domain_data meson8b_cbus_domain_data = {
893 { 900 .name = "cbus-banks",
894 .name = "banks", 901 .banks = meson8b_cbus_banks,
895 .banks = meson8b_banks, 902 .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
896 .num_banks = ARRAY_SIZE(meson8b_banks), 903 .pin_base = 0,
897 .pin_base = 0, 904 .num_pins = 130,
898 .num_pins = 130, 905};
899 }, 906
900 { 907static struct meson_domain_data meson8b_aobus_domain_data = {
901 .name = "ao-bank", 908 .name = "aobus-banks",
902 .banks = meson8b_ao_banks, 909 .banks = meson8b_aobus_banks,
903 .num_banks = ARRAY_SIZE(meson8b_ao_banks), 910 .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
904 .pin_base = 130, 911 .pin_base = 130,
905 .num_pins = 16, 912 .num_pins = 16,
906 }, 913};
907}; 914
908 915struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
909struct meson_pinctrl_data meson8b_pinctrl_data = { 916 .pins = meson8b_cbus_pins,
910 .pins = meson8b_pins, 917 .groups = meson8b_cbus_groups,
911 .groups = meson8b_groups, 918 .funcs = meson8b_cbus_functions,
912 .funcs = meson8b_functions, 919 .domain_data = &meson8b_cbus_domain_data,
913 .domain_data = meson8b_domain_data, 920 .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
914 .num_pins = ARRAY_SIZE(meson8b_pins), 921 .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
915 .num_groups = ARRAY_SIZE(meson8b_groups), 922 .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
916 .num_funcs = ARRAY_SIZE(meson8b_functions), 923};
917 .num_domains = ARRAY_SIZE(meson8b_domain_data), 924
925struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
926 .pins = meson8b_aobus_pins,
927 .groups = meson8b_aobus_groups,
928 .funcs = meson8b_aobus_functions,
929 .domain_data = &meson8b_aobus_domain_data,
930 .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
931 .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
932 .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
918}; 933};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 08:14:13 -0400