diff options
| author | Icenowy Zheng <icenowy@aosc.io> | 2018-11-04 13:26:55 -0500 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-05 05:49:04 -0500 |
| commit | 9d0fdd4843329ceee9a4fe0852becf7260c98095 (patch) | |
| tree | b1897662da34d80a961cf17da8f7f82a5a887a93 | |
| parent | 76ce87ca5063ae7b0bee00ce328cab362519d318 (diff) | |
dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI
The Allwinner H6 SoC uses a v2.12a DesignWare HDMI controller, with
dedicated CEC and HDCP clocks added; the PHY connected is a standard
DesignWare HDMI PHY.
Add binding for it.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[added HDCP clock and reset]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-19-jernej.skrabec@siol.net
| -rw-r--r-- | Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 62c83b351344..478b288eebd9 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | |||
| @@ -79,6 +79,7 @@ Required properties: | |||
| 79 | - compatible: value must be one of: | 79 | - compatible: value must be one of: |
| 80 | * "allwinner,sun8i-a83t-dw-hdmi" | 80 | * "allwinner,sun8i-a83t-dw-hdmi" |
| 81 | * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi" | 81 | * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi" |
| 82 | * "allwinner,sun50i-h6-dw-hdmi" | ||
| 82 | - reg: base address and size of memory-mapped region | 83 | - reg: base address and size of memory-mapped region |
| 83 | - reg-io-width: See dw_hdmi.txt. Shall be 1. | 84 | - reg-io-width: See dw_hdmi.txt. Shall be 1. |
| 84 | - interrupts: HDMI interrupt number | 85 | - interrupts: HDMI interrupt number |
| @@ -86,9 +87,14 @@ Required properties: | |||
| 86 | * iahb: the HDMI bus clock | 87 | * iahb: the HDMI bus clock |
| 87 | * isfr: the HDMI register clock | 88 | * isfr: the HDMI register clock |
| 88 | * tmds: TMDS clock | 89 | * tmds: TMDS clock |
| 90 | * cec: HDMI CEC clock (H6 only) | ||
| 91 | * hdcp: HDCP clock (H6 only) | ||
| 92 | * hdcp-bus: HDCP bus clock (H6 only) | ||
| 89 | - clock-names: the clock names mentioned above | 93 | - clock-names: the clock names mentioned above |
| 90 | - resets: phandle to the reset controller | 94 | - resets: |
| 91 | - reset-names: must be "ctrl" | 95 | * ctrl: HDMI controller reset |
| 96 | * hdcp: HDCP reset (H6 only) | ||
| 97 | - reset-names: reset names mentioned above | ||
| 92 | - phys: phandle to the DWC HDMI PHY | 98 | - phys: phandle to the DWC HDMI PHY |
| 93 | - phy-names: must be "phy" | 99 | - phy-names: must be "phy" |
| 94 | 100 | ||
| @@ -109,6 +115,7 @@ Required properties: | |||
| 109 | * allwinner,sun8i-h3-hdmi-phy | 115 | * allwinner,sun8i-h3-hdmi-phy |
| 110 | * allwinner,sun8i-r40-hdmi-phy | 116 | * allwinner,sun8i-r40-hdmi-phy |
| 111 | * allwinner,sun50i-a64-hdmi-phy | 117 | * allwinner,sun50i-a64-hdmi-phy |
| 118 | * allwinner,sun50i-h6-hdmi-phy | ||
| 112 | - reg: base address and size of memory-mapped region | 119 | - reg: base address and size of memory-mapped region |
| 113 | - clocks: phandles to the clocks feeding the HDMI PHY | 120 | - clocks: phandles to the clocks feeding the HDMI PHY |
| 114 | * bus: the HDMI PHY interface clock | 121 | * bus: the HDMI PHY interface clock |