diff options
author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2014-09-12 04:52:05 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-10-26 20:17:05 -0400 |
commit | 9ce3fa6816c2fb59d128248c9b0509aef1c5dae7 (patch) | |
tree | 097a244b7b227e46d93bca2695431596555fec8c | |
parent | 27c1bb20d45830a64bf344cc1cb5e0a745e2d206 (diff) |
ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794
On E2, the arch timer is hooked up to a different clock, and the CA7's arch
timer CNTVOFF register must be initialized.
Based on work by Hisashi Nakamura.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/setup-rcar-gen2.c | 72 |
1 files changed, 49 insertions, 23 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 42d5b4308923..7ed92790d13f 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | 4 | * Copyright (C) 2013 Renesas Solutions Corp. |
5 | * Copyright (C) 2013 Magnus Damm | 5 | * Copyright (C) 2013 Magnus Damm |
6 | * Copyright (C) 2014 Ulrich Hecht | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -24,6 +25,7 @@ | |||
24 | #include <linux/dma-contiguous.h> | 25 | #include <linux/dma-contiguous.h> |
25 | #include <linux/io.h> | 26 | #include <linux/io.h> |
26 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/of.h> | ||
27 | #include <linux/of_fdt.h> | 29 | #include <linux/of_fdt.h> |
28 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
29 | #include "common.h" | 31 | #include "common.h" |
@@ -54,37 +56,61 @@ void __init rcar_gen2_timer_init(void) | |||
54 | { | 56 | { |
55 | #if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) | 57 | #if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) |
56 | u32 mode = rcar_gen2_read_mode_pins(); | 58 | u32 mode = rcar_gen2_read_mode_pins(); |
59 | bool is_e2 = (bool)of_find_compatible_node(NULL, NULL, | ||
60 | "renesas,r8a7794"); | ||
57 | #endif | 61 | #endif |
58 | #ifdef CONFIG_ARM_ARCH_TIMER | 62 | #ifdef CONFIG_ARM_ARCH_TIMER |
59 | void __iomem *base; | 63 | void __iomem *base; |
60 | int extal_mhz = 0; | 64 | int extal_mhz = 0; |
61 | u32 freq; | 65 | u32 freq; |
62 | 66 | ||
63 | /* At Linux boot time the r8a7790 arch timer comes up | 67 | if (is_e2) { |
64 | * with the counter disabled. Moreover, it may also report | 68 | freq = 260000000 / 8; /* ZS / 8 */ |
65 | * a potentially incorrect fixed 13 MHz frequency. To be | 69 | /* CNTVOFF has to be initialized either from non-secure |
66 | * correct these registers need to be updated to use the | 70 | * Hypervisor mode or secure Monitor mode with SCR.NS==1. |
67 | * frequency EXTAL / 2 which can be determined by the MD pins. | 71 | * If TrustZone is enabled then it should be handled by the |
68 | */ | 72 | * secure code. |
69 | 73 | */ | |
70 | switch (mode & (MD(14) | MD(13))) { | 74 | asm volatile( |
71 | case 0: | 75 | " cps 0x16\n" |
72 | extal_mhz = 15; | 76 | " mrc p15, 0, r1, c1, c1, 0\n" |
73 | break; | 77 | " orr r0, r1, #1\n" |
74 | case MD(13): | 78 | " mcr p15, 0, r0, c1, c1, 0\n" |
75 | extal_mhz = 20; | 79 | " isb\n" |
76 | break; | 80 | " mov r0, #0\n" |
77 | case MD(14): | 81 | " mcrr p15, 4, r0, r0, c14\n" |
78 | extal_mhz = 26; | 82 | " isb\n" |
79 | break; | 83 | " mcr p15, 0, r1, c1, c1, 0\n" |
80 | case MD(13) | MD(14): | 84 | " isb\n" |
81 | extal_mhz = 30; | 85 | " cps 0x13\n" |
82 | break; | 86 | : : : "r0", "r1"); |
87 | } else { | ||
88 | /* At Linux boot time the r8a7790 arch timer comes up | ||
89 | * with the counter disabled. Moreover, it may also report | ||
90 | * a potentially incorrect fixed 13 MHz frequency. To be | ||
91 | * correct these registers need to be updated to use the | ||
92 | * frequency EXTAL / 2 which can be determined by the MD pins. | ||
93 | */ | ||
94 | |||
95 | switch (mode & (MD(14) | MD(13))) { | ||
96 | case 0: | ||
97 | extal_mhz = 15; | ||
98 | break; | ||
99 | case MD(13): | ||
100 | extal_mhz = 20; | ||
101 | break; | ||
102 | case MD(14): | ||
103 | extal_mhz = 26; | ||
104 | break; | ||
105 | case MD(13) | MD(14): | ||
106 | extal_mhz = 30; | ||
107 | break; | ||
108 | } | ||
109 | |||
110 | /* The arch timer frequency equals EXTAL / 2 */ | ||
111 | freq = extal_mhz * (1000000 / 2); | ||
83 | } | 112 | } |
84 | 113 | ||
85 | /* The arch timer frequency equals EXTAL / 2 */ | ||
86 | freq = extal_mhz * (1000000 / 2); | ||
87 | |||
88 | /* Remap "armgcnt address map" space */ | 114 | /* Remap "armgcnt address map" space */ |
89 | base = ioremap(0xe6080000, PAGE_SIZE); | 115 | base = ioremap(0xe6080000, PAGE_SIZE); |
90 | 116 | ||